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TsiChung Liewf6afe722007-06-18 13:50:13 -05001/*
TsiChungLiew36d5b1a2007-07-05 23:17:36 -05002 * (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
TsiChung Liewf6afe722007-06-18 13:50:13 -05003 * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 */
24
25/*
26 * Minimal serial functions needed to use one of the uart ports
27 * as serial console interface.
28 */
29
30#include <common.h>
Wolfgang Denkc30709a2007-08-19 10:27:34 +020031
32#ifdef CONFIG_MCFUART
33
TsiChungLiew36d5b1a2007-07-05 23:17:36 -050034#include <asm/immap.h>
35#include <asm/uart.h>
TsiChung Liewf6afe722007-06-18 13:50:13 -050036
37DECLARE_GLOBAL_DATA_PTR;
38
TsiChungLiew74634c82007-08-05 03:55:21 -050039extern void uart_port_conf(void);
40
TsiChung Liewf6afe722007-06-18 13:50:13 -050041int serial_init(void)
42{
43 volatile uart_t *uart;
44 u32 counter;
45
46 uart = (volatile uart_t *)(CFG_UART_BASE);
47
TsiChungLiew74634c82007-08-05 03:55:21 -050048 uart_port_conf();
49
TsiChung Liewf6afe722007-06-18 13:50:13 -050050 /* write to SICR: SIM2 = uart mode,dcd does not affect rx */
51 uart->ucr = UART_UCR_RESET_RX;
52 uart->ucr = UART_UCR_RESET_TX;
53 uart->ucr = UART_UCR_RESET_ERROR;
54 uart->ucr = UART_UCR_RESET_MR;
55 __asm__("nop");
56
57 uart->uimr = 0;
58
59 /* write to CSR: RX/TX baud rate from timers */
60 uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK);
61
62 uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE);
63 uart->umr = UART_UMR_SB_STOP_BITS_1;
64
65 /* Setting up BaudRate */
66 counter = (u32) (gd->bus_clk / (gd->baudrate));
67 counter >>= 5;
68
69 /* write to CTUR: divide counter upper byte */
70 uart->ubg1 = (u8) ((counter & 0xff00) >> 8);
71 /* write to CTLR: divide counter lower byte */
72 uart->ubg2 = (u8) (counter & 0x00ff);
73
74 uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED);
75
76 return (0);
77}
78
79void serial_putc(const char c)
80{
81 volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
82
83 if (c == '\n')
84 serial_putc('\r');
85
86 /* Wait for last character to go. */
87 while (!(uart->usr & UART_USR_TXRDY)) ;
88
89 uart->utb = c;
90}
91
92void serial_puts(const char *s)
93{
94 while (*s) {
95 serial_putc(*s++);
96 }
97}
98
99int serial_getc(void)
100{
101 volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
102
103 /* Wait for a character to arrive. */
104 while (!(uart->usr & UART_USR_RXRDY)) ;
105 return uart->urb;
106}
107
108int serial_tstc(void)
109{
110 volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
111
112 return (uart->usr & UART_USR_RXRDY);
113}
114
115void serial_setbrg(void)
116{
117 volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
118 u32 counter;
119
120 counter = ((gd->bus_clk / gd->baudrate)) >> 5;
121 counter++;
122
123 /* write to CTUR: divide counter upper byte */
124 uart->ubg1 = ((counter & 0xff00) >> 8);
125 /* write to CTLR: divide counter lower byte */
126 uart->ubg2 = (counter & 0x00ff);
127
128 uart->ucr = UART_UCR_RESET_RX;
129 uart->ucr = UART_UCR_RESET_TX;
130
131 uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED;
132}
TsiChungLiewdb0022d2007-08-05 03:19:10 -0500133#endif /* CONFIG_MCFUART */