blob: 0e02b779656c3b9ea0490145db0981906d8890d2 [file] [log] [blame]
Vignesh Raghavendrab1a49282019-10-01 17:26:33 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Cadence USBSS DRD Driver - gadget side.
4 *
5 * Copyright (C) 2018-2019 Cadence Design Systems.
6 * Copyright (C) 2017-2018 NXP
7 *
8 * Authors: Pawel Jez <pjez@cadence.com>,
9 * Pawel Laszczak <pawell@cadence.com>
10 * Peter Chen <peter.chen@nxp.com>
11 */
12
13/*
14 * Work around 1:
15 * At some situations, the controller may get stale data address in TRB
16 * at below sequences:
17 * 1. Controller read TRB includes data address
18 * 2. Software updates TRBs includes data address and Cycle bit
19 * 3. Controller read TRB which includes Cycle bit
20 * 4. DMA run with stale data address
21 *
22 * To fix this problem, driver needs to make the first TRB in TD as invalid.
23 * After preparing all TRBs driver needs to check the position of DMA and
24 * if the DMA point to the first just added TRB and doorbell is 1,
25 * then driver must defer making this TRB as valid. This TRB will be make
26 * as valid during adding next TRB only if DMA is stopped or at TRBERR
27 * interrupt.
28 *
29 * Issue has been fixed in DEV_VER_V3 version of controller.
30 *
31 * Work around 2:
32 * Controller for OUT endpoints has shared on-chip buffers for all incoming
33 * packets, including ep0out. It's FIFO buffer, so packets must be handle by DMA
34 * in correct order. If the first packet in the buffer will not be handled,
35 * then the following packets directed for other endpoints and functions
36 * will be blocked.
37 * Additionally the packets directed to one endpoint can block entire on-chip
38 * buffers. In this case transfer to other endpoints also will blocked.
39 *
40 * To resolve this issue after raising the descriptor missing interrupt
41 * driver prepares internal usb_request object and use it to arm DMA transfer.
42 *
43 * The problematic situation was observed in case when endpoint has been enabled
44 * but no usb_request were queued. Driver try detects such endpoints and will
45 * use this workaround only for these endpoint.
46 *
47 * Driver use limited number of buffer. This number can be set by macro
48 * CDNS3_WA2_NUM_BUFFERS.
49 *
50 * Such blocking situation was observed on ACM gadget. For this function
51 * host send OUT data packet but ACM function is not prepared for this packet.
52 * It's cause that buffer placed in on chip memory block transfer to other
53 * endpoints.
54 *
55 * Issue has been fixed in DEV_VER_V2 version of controller.
56 *
57 */
58
59#include <dm.h>
60#include <linux/usb/gadget.h>
61#include <linux/compat.h>
62#include <linux/iopoll.h>
63#include <asm/dma-mapping.h>
64#include <linux/bitmap.h>
65#include <linux/bug.h>
66
67#include "core.h"
68#include "gadget-export.h"
69#include "gadget.h"
70#include "trace.h"
71#include "drd.h"
72
73#define readl_poll_timeout_atomic readl_poll_timeout
74#define usleep_range(a, b) udelay((b))
75
76static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
77 struct usb_request *request,
78 gfp_t gfp_flags);
79
80/**
81 * cdns3_set_register_bit - set bit in given register.
82 * @ptr: address of device controller register to be read and changed
83 * @mask: bits requested to set
84 */
85void cdns3_set_register_bit(void __iomem *ptr, u32 mask)
86{
87 mask = readl(ptr) | mask;
88 writel(mask, ptr);
89}
90
91/**
92 * cdns3_ep_addr_to_index - Macro converts endpoint address to
93 * index of endpoint object in cdns3_device.eps[] container
94 * @ep_addr: endpoint address for which endpoint object is required
95 *
96 */
97u8 cdns3_ep_addr_to_index(u8 ep_addr)
98{
99 return (((ep_addr & 0x7F)) + ((ep_addr & USB_DIR_IN) ? 16 : 0));
100}
101
102static int cdns3_get_dma_pos(struct cdns3_device *priv_dev,
103 struct cdns3_endpoint *priv_ep)
104{
105 int dma_index;
106
107 dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
108
109 return dma_index / TRB_SIZE;
110}
111
112/**
113 * cdns3_next_request - returns next request from list
114 * @list: list containing requests
115 *
116 * Returns request or NULL if no requests in list
117 */
118struct usb_request *cdns3_next_request(struct list_head *list)
119{
120 return list_first_entry_or_null(list, struct usb_request, list);
121}
122
123/**
124 * cdns3_next_align_buf - returns next buffer from list
125 * @list: list containing buffers
126 *
127 * Returns buffer or NULL if no buffers in list
128 */
129struct cdns3_aligned_buf *cdns3_next_align_buf(struct list_head *list)
130{
131 return list_first_entry_or_null(list, struct cdns3_aligned_buf, list);
132}
133
134/**
135 * cdns3_next_priv_request - returns next request from list
136 * @list: list containing requests
137 *
138 * Returns request or NULL if no requests in list
139 */
140struct cdns3_request *cdns3_next_priv_request(struct list_head *list)
141{
142 return list_first_entry_or_null(list, struct cdns3_request, list);
143}
144
145/**
146 * select_ep - selects endpoint
147 * @priv_dev: extended gadget object
148 * @ep: endpoint address
149 */
150void cdns3_select_ep(struct cdns3_device *priv_dev, u32 ep)
151{
152 if (priv_dev->selected_ep == ep)
153 return;
154
155 priv_dev->selected_ep = ep;
156 writel(ep, &priv_dev->regs->ep_sel);
157}
158
159dma_addr_t cdns3_trb_virt_to_dma(struct cdns3_endpoint *priv_ep,
160 struct cdns3_trb *trb)
161{
162 u32 offset = (char *)trb - (char *)priv_ep->trb_pool;
163
164 return priv_ep->trb_pool_dma + offset;
165}
166
167int cdns3_ring_size(struct cdns3_endpoint *priv_ep)
168{
169 switch (priv_ep->type) {
170 case USB_ENDPOINT_XFER_ISOC:
171 return TRB_ISO_RING_SIZE;
172 case USB_ENDPOINT_XFER_CONTROL:
173 return TRB_CTRL_RING_SIZE;
174 default:
175 return TRB_RING_SIZE;
176 }
177}
178
179/**
180 * cdns3_allocate_trb_pool - Allocates TRB's pool for selected endpoint
181 * @priv_ep: endpoint object
182 *
183 * Function will return 0 on success or -ENOMEM on allocation error
184 */
185int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep)
186{
187 int ring_size = cdns3_ring_size(priv_ep);
188 struct cdns3_trb *link_trb;
189
190 if (!priv_ep->trb_pool) {
191 priv_ep->trb_pool =
192 dma_alloc_coherent(ring_size,
193 (unsigned long *)&priv_ep->trb_pool_dma);
194 if (!priv_ep->trb_pool)
195 return -ENOMEM;
196 } else {
197 memset(priv_ep->trb_pool, 0, ring_size);
198 }
199
200 if (!priv_ep->num)
201 return 0;
202
203 priv_ep->num_trbs = ring_size / TRB_SIZE;
204 /* Initialize the last TRB as Link TRB. */
205 link_trb = (priv_ep->trb_pool + (priv_ep->num_trbs - 1));
206 link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma);
207 link_trb->control = TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE;
208
209 return 0;
210}
211
212static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep)
213{
214 if (priv_ep->trb_pool) {
215 dma_free_coherent(priv_ep->trb_pool);
216 priv_ep->trb_pool = NULL;
217 }
218}
219
220/**
221 * cdns3_ep_stall_flush - Stalls and flushes selected endpoint
222 * @priv_ep: endpoint object
223 *
224 * Endpoint must be selected before call to this function
225 */
226static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep)
227{
228 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
229 int val;
230
231 trace_cdns3_halt(priv_ep, 1, 1);
232
233 writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL,
234 &priv_dev->regs->ep_cmd);
235
236 /* wait for DFLUSH cleared */
237 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
238 !(val & EP_CMD_DFLUSH), 1000);
239 priv_ep->flags |= EP_STALLED;
240 priv_ep->flags &= ~EP_STALL_PENDING;
241}
242
243/**
244 * cdns3_hw_reset_eps_config - reset endpoints configuration kept by controller.
245 * @priv_dev: extended gadget object
246 */
247void cdns3_hw_reset_eps_config(struct cdns3_device *priv_dev)
248{
249 writel(USB_CONF_CFGRST, &priv_dev->regs->usb_conf);
250
251 cdns3_allow_enable_l1(priv_dev, 0);
252 priv_dev->hw_configured_flag = 0;
253 priv_dev->onchip_used_size = 0;
254 priv_dev->out_mem_is_allocated = 0;
255 priv_dev->wait_for_setup = 0;
256}
257
258/**
259 * cdns3_ep_inc_trb - increment a trb index.
260 * @index: Pointer to the TRB index to increment.
261 * @cs: Cycle state
262 * @trb_in_seg: number of TRBs in segment
263 *
264 * The index should never point to the link TRB. After incrementing,
265 * if it is point to the link TRB, wrap around to the beginning and revert
266 * cycle state bit The
267 * link TRB is always at the last TRB entry.
268 */
269static void cdns3_ep_inc_trb(int *index, u8 *cs, int trb_in_seg)
270{
271 (*index)++;
272 if (*index == (trb_in_seg - 1)) {
273 *index = 0;
274 *cs ^= 1;
275 }
276}
277
278/**
279 * cdns3_ep_inc_enq - increment endpoint's enqueue pointer
280 * @priv_ep: The endpoint whose enqueue pointer we're incrementing
281 */
282static void cdns3_ep_inc_enq(struct cdns3_endpoint *priv_ep)
283{
284 priv_ep->free_trbs--;
285 cdns3_ep_inc_trb(&priv_ep->enqueue, &priv_ep->pcs, priv_ep->num_trbs);
286}
287
288/**
289 * cdns3_ep_inc_deq - increment endpoint's dequeue pointer
290 * @priv_ep: The endpoint whose dequeue pointer we're incrementing
291 */
292static void cdns3_ep_inc_deq(struct cdns3_endpoint *priv_ep)
293{
294 priv_ep->free_trbs++;
295 cdns3_ep_inc_trb(&priv_ep->dequeue, &priv_ep->ccs, priv_ep->num_trbs);
296}
297
298void cdns3_move_deq_to_next_trb(struct cdns3_request *priv_req)
299{
300 struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
301 int current_trb = priv_req->start_trb;
302
303 while (current_trb != priv_req->end_trb) {
304 cdns3_ep_inc_deq(priv_ep);
305 current_trb = priv_ep->dequeue;
306 }
307
308 cdns3_ep_inc_deq(priv_ep);
309}
310
311/**
312 * cdns3_allow_enable_l1 - enable/disable permits to transition to L1.
313 * @priv_dev: Extended gadget object
314 * @enable: Enable/disable permit to transition to L1.
315 *
316 * If bit USB_CONF_L1EN is set and device receive Extended Token packet,
317 * then controller answer with ACK handshake.
318 * If bit USB_CONF_L1DS is set and device receive Extended Token packet,
319 * then controller answer with NYET handshake.
320 */
321void cdns3_allow_enable_l1(struct cdns3_device *priv_dev, int enable)
322{
323 if (enable)
324 writel(USB_CONF_L1EN, &priv_dev->regs->usb_conf);
325 else
326 writel(USB_CONF_L1DS, &priv_dev->regs->usb_conf);
327}
328
329enum usb_device_speed cdns3_get_speed(struct cdns3_device *priv_dev)
330{
331 u32 reg;
332
333 reg = readl(&priv_dev->regs->usb_sts);
334
335 if (DEV_SUPERSPEED(reg))
336 return USB_SPEED_SUPER;
337 else if (DEV_HIGHSPEED(reg))
338 return USB_SPEED_HIGH;
339 else if (DEV_FULLSPEED(reg))
340 return USB_SPEED_FULL;
341 else if (DEV_LOWSPEED(reg))
342 return USB_SPEED_LOW;
343 return USB_SPEED_UNKNOWN;
344}
345
346/**
347 * cdns3_start_all_request - add to ring all request not started
348 * @priv_dev: Extended gadget object
349 * @priv_ep: The endpoint for whom request will be started.
350 *
351 * Returns return ENOMEM if transfer ring i not enough TRBs to start
352 * all requests.
353 */
354static int cdns3_start_all_request(struct cdns3_device *priv_dev,
355 struct cdns3_endpoint *priv_ep)
356{
357 struct usb_request *request;
358 int ret = 0;
359
360 while (!list_empty(&priv_ep->deferred_req_list)) {
361 request = cdns3_next_request(&priv_ep->deferred_req_list);
362
363 ret = cdns3_ep_run_transfer(priv_ep, request);
364 if (ret)
365 return ret;
366
367 list_del(&request->list);
368 list_add_tail(&request->list,
369 &priv_ep->pending_req_list);
370 }
371
372 priv_ep->flags &= ~EP_RING_FULL;
373 return ret;
374}
375
376/*
377 * WA2: Set flag for all not ISOC OUT endpoints. If this flag is set
378 * driver try to detect whether endpoint need additional internal
379 * buffer for unblocking on-chip FIFO buffer. This flag will be cleared
380 * if before first DESCMISS interrupt the DMA will be armed.
381 */
382#define cdns3_wa2_enable_detection(priv_dev, ep_priv, reg) do { \
383 if (!priv_ep->dir && priv_ep->type != USB_ENDPOINT_XFER_ISOC) { \
384 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_DET; \
385 (reg) |= EP_STS_EN_DESCMISEN; \
386 } } while (0)
387
388/**
389 * cdns3_wa2_descmiss_copy_data copy data from internal requests to
390 * request queued by class driver.
391 * @priv_ep: extended endpoint object
392 * @request: request object
393 */
394static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint *priv_ep,
395 struct usb_request *request)
396{
397 struct usb_request *descmiss_req;
398 struct cdns3_request *descmiss_priv_req;
399
400 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
401 int chunk_end;
402 int length;
403
404 descmiss_priv_req =
405 cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
406 descmiss_req = &descmiss_priv_req->request;
407
408 /* driver can't touch pending request */
409 if (descmiss_priv_req->flags & REQUEST_PENDING)
410 break;
411
412 chunk_end = descmiss_priv_req->flags & REQUEST_INTERNAL_CH;
413 length = request->actual + descmiss_req->actual;
414
415 request->status = descmiss_req->status;
416
417 if (length <= request->length) {
418 memcpy(&((u8 *)request->buf)[request->actual],
419 descmiss_req->buf,
420 descmiss_req->actual);
421 request->actual = length;
422 } else {
423 /* It should never occur */
424 request->status = -ENOMEM;
425 }
426
427 list_del_init(&descmiss_priv_req->list);
428
429 kfree(descmiss_req->buf);
430 cdns3_gadget_ep_free_request(&priv_ep->endpoint, descmiss_req);
431 --priv_ep->wa2_counter;
432
433 if (!chunk_end)
434 break;
435 }
436}
437
438struct usb_request *cdns3_wa2_gadget_giveback(struct cdns3_device *priv_dev,
439 struct cdns3_endpoint *priv_ep,
440 struct cdns3_request *priv_req)
441{
442 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN &&
443 priv_req->flags & REQUEST_INTERNAL) {
444 struct usb_request *req;
445
446 req = cdns3_next_request(&priv_ep->deferred_req_list);
447
448 priv_ep->descmis_req = NULL;
449
450 if (!req)
451 return NULL;
452
453 cdns3_wa2_descmiss_copy_data(priv_ep, req);
454 if (!(priv_ep->flags & EP_QUIRK_END_TRANSFER) &&
455 req->length != req->actual) {
456 /* wait for next part of transfer */
457 return NULL;
458 }
459
460 if (req->status == -EINPROGRESS)
461 req->status = 0;
462
463 list_del_init(&req->list);
464 cdns3_start_all_request(priv_dev, priv_ep);
465 return req;
466 }
467
468 return &priv_req->request;
469}
470
471int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
472 struct cdns3_endpoint *priv_ep,
473 struct cdns3_request *priv_req)
474{
475 int deferred = 0;
476
477 /*
478 * If transfer was queued before DESCMISS appear than we
479 * can disable handling of DESCMISS interrupt. Driver assumes that it
480 * can disable special treatment for this endpoint.
481 */
482 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
483 u32 reg;
484
485 cdns3_select_ep(priv_dev, priv_ep->num | priv_ep->dir);
486 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
487 reg = readl(&priv_dev->regs->ep_sts_en);
488 reg &= ~EP_STS_EN_DESCMISEN;
489 trace_cdns3_wa2(priv_ep, "workaround disabled\n");
490 writel(reg, &priv_dev->regs->ep_sts_en);
491 }
492
493 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
494 u8 pending_empty = list_empty(&priv_ep->pending_req_list);
495 u8 descmiss_empty = list_empty(&priv_ep->wa2_descmiss_req_list);
496
497 /*
498 * DESCMISS transfer has been finished, so data will be
499 * directly copied from internal allocated usb_request
500 * objects.
501 */
502 if (pending_empty && !descmiss_empty &&
503 !(priv_req->flags & REQUEST_INTERNAL)) {
504 cdns3_wa2_descmiss_copy_data(priv_ep,
505 &priv_req->request);
506
507 trace_cdns3_wa2(priv_ep, "get internal stored data");
508
509 list_add_tail(&priv_req->request.list,
510 &priv_ep->pending_req_list);
511 cdns3_gadget_giveback(priv_ep, priv_req,
512 priv_req->request.status);
513
514 /*
515 * Intentionally driver returns positive value as
516 * correct value. It informs that transfer has
517 * been finished.
518 */
519 return EINPROGRESS;
520 }
521
522 /*
523 * Driver will wait for completion DESCMISS transfer,
524 * before starts new, not DESCMISS transfer.
525 */
526 if (!pending_empty && !descmiss_empty) {
527 trace_cdns3_wa2(priv_ep, "wait for pending transfer\n");
528 deferred = 1;
529 }
530
531 if (priv_req->flags & REQUEST_INTERNAL)
532 list_add_tail(&priv_req->list,
533 &priv_ep->wa2_descmiss_req_list);
534 }
535
536 return deferred;
537}
538
539static void cdns3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
540{
541 struct cdns3_request *priv_req;
542
543 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
544 u8 chain;
545
546 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
547 chain = !!(priv_req->flags & REQUEST_INTERNAL_CH);
548
549 trace_cdns3_wa2(priv_ep, "removes eldest request");
550
551 kfree(priv_req->request.buf);
552 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
553 &priv_req->request);
554 list_del_init(&priv_req->list);
555 --priv_ep->wa2_counter;
556
557 if (!chain)
558 break;
559 }
560}
561
562/**
563 * cdns3_wa2_descmissing_packet - handles descriptor missing event.
564 * @priv_dev: extended gadget object
565 *
566 * This function is used only for WA2. For more information see Work around 2
567 * description.
568 */
569static void cdns3_wa2_descmissing_packet(struct cdns3_endpoint *priv_ep)
570{
571 struct cdns3_request *priv_req;
572 struct usb_request *request;
573
574 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET) {
575 priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
576 priv_ep->flags |= EP_QUIRK_EXTRA_BUF_EN;
577 }
578
579 trace_cdns3_wa2(priv_ep, "Description Missing detected\n");
580
581 if (priv_ep->wa2_counter >= CDNS3_WA2_NUM_BUFFERS)
582 cdns3_wa2_remove_old_request(priv_ep);
583
584 request = cdns3_gadget_ep_alloc_request(&priv_ep->endpoint,
585 GFP_ATOMIC);
586 if (!request)
587 goto err;
588
589 priv_req = to_cdns3_request(request);
590 priv_req->flags |= REQUEST_INTERNAL;
591
592 /* if this field is still assigned it indicate that transfer related
593 * with this request has not been finished yet. Driver in this
594 * case simply allocate next request and assign flag REQUEST_INTERNAL_CH
595 * flag to previous one. It will indicate that current request is
596 * part of the previous one.
597 */
598 if (priv_ep->descmis_req)
599 priv_ep->descmis_req->flags |= REQUEST_INTERNAL_CH;
600
601 priv_req->request.buf = kzalloc(CDNS3_DESCMIS_BUF_SIZE,
602 GFP_ATOMIC);
603 priv_ep->wa2_counter++;
604
605 if (!priv_req->request.buf) {
606 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
607 goto err;
608 }
609
610 priv_req->request.length = CDNS3_DESCMIS_BUF_SIZE;
611 priv_ep->descmis_req = priv_req;
612
613 __cdns3_gadget_ep_queue(&priv_ep->endpoint,
614 &priv_ep->descmis_req->request,
615 GFP_ATOMIC);
616
617 return;
618
619err:
620 dev_err(priv_ep->cdns3_dev->dev,
621 "Failed: No sufficient memory for DESCMIS\n");
622}
623
624/**
625 * cdns3_gadget_giveback - call struct usb_request's ->complete callback
626 * @priv_ep: The endpoint to whom the request belongs to
627 * @priv_req: The request we're giving back
628 * @status: completion code for the request
629 *
630 * Must be called with controller's lock held and interrupts disabled. This
631 * function will unmap @req and call its ->complete() callback to notify upper
632 * layers that it has completed.
633 */
634void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
635 struct cdns3_request *priv_req,
636 int status)
637{
638 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
639 struct usb_request *request = &priv_req->request;
640
641 list_del_init(&request->list);
642
643 if (request->status == -EINPROGRESS)
644 request->status = status;
645
646 usb_gadget_unmap_request(&priv_dev->gadget, request,
647 priv_ep->dir);
648
649 if ((priv_req->flags & REQUEST_UNALIGNED) &&
650 priv_ep->dir == USB_DIR_OUT && !request->status)
651 memcpy(request->buf, priv_req->aligned_buf->buf,
652 request->length);
653
654 priv_req->flags &= ~(REQUEST_PENDING | REQUEST_UNALIGNED);
655 trace_cdns3_gadget_giveback(priv_req);
656
657 if (priv_dev->dev_ver < DEV_VER_V2) {
658 request = cdns3_wa2_gadget_giveback(priv_dev, priv_ep,
659 priv_req);
660 if (!request)
661 return;
662 }
663
664 if (request->complete) {
665 spin_unlock(&priv_dev->lock);
666 usb_gadget_giveback_request(&priv_ep->endpoint,
667 request);
668 spin_lock(&priv_dev->lock);
669 }
670
671 if (request->buf == priv_dev->zlp_buf)
672 cdns3_gadget_ep_free_request(&priv_ep->endpoint, request);
673}
674
675void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep)
676{
677 /* Work around for stale data address in TRB*/
678 if (priv_ep->wa1_set) {
679 trace_cdns3_wa1(priv_ep, "restore cycle bit");
680
681 priv_ep->wa1_set = 0;
682 priv_ep->wa1_trb_index = 0xFFFF;
683 if (priv_ep->wa1_cycle_bit) {
684 priv_ep->wa1_trb->control =
685 priv_ep->wa1_trb->control | 0x1;
686 } else {
687 priv_ep->wa1_trb->control =
688 priv_ep->wa1_trb->control & ~0x1;
689 }
690 }
691}
692
693static void cdns3_free_aligned_request_buf(struct cdns3_device *priv_dev)
694{
695 struct cdns3_aligned_buf *buf, *tmp;
696 unsigned long flags;
697
698 spin_lock_irqsave(&priv_dev->lock, flags);
699
700 list_for_each_entry_safe(buf, tmp, &priv_dev->aligned_buf_list, list) {
701 if (!buf->in_use) {
702 list_del(&buf->list);
703
704 /*
705 * Re-enable interrupts to free DMA capable memory.
706 * Driver can't free this memory with disabled
707 * interrupts.
708 */
709 spin_unlock_irqrestore(&priv_dev->lock, flags);
710 dma_free_coherent(buf->buf);
711 kfree(buf);
712 spin_lock_irqsave(&priv_dev->lock, flags);
713 }
714 }
715
716 spin_unlock_irqrestore(&priv_dev->lock, flags);
717}
718
719static int cdns3_prepare_aligned_request_buf(struct cdns3_request *priv_req)
720{
721 struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
722 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
723 struct cdns3_aligned_buf *buf;
724
725 /* check if buffer is aligned to 8. */
726 if (!((uintptr_t)priv_req->request.buf & 0x7))
727 return 0;
728
729 buf = priv_req->aligned_buf;
730
731 if (!buf || priv_req->request.length > buf->size) {
732 buf = kzalloc(sizeof(*buf), GFP_ATOMIC);
733 if (!buf)
734 return -ENOMEM;
735
736 buf->size = priv_req->request.length;
737
738 buf->buf = dma_alloc_coherent(buf->size,
739 (unsigned long *)&buf->dma);
740 if (!buf->buf) {
741 kfree(buf);
742 return -ENOMEM;
743 }
744
745 if (priv_req->aligned_buf) {
746 trace_cdns3_free_aligned_request(priv_req);
747 priv_req->aligned_buf->in_use = 0;
748#ifndef __UBOOT__
749 queue_work(system_freezable_wq,
750 &priv_dev->aligned_buf_wq);
751#else
752 cdns3_free_aligned_request_buf(priv_dev);
753#endif
754 }
755
756 buf->in_use = 1;
757 priv_req->aligned_buf = buf;
758
759 list_add_tail(&buf->list,
760 &priv_dev->aligned_buf_list);
761 }
762
763 if (priv_ep->dir == USB_DIR_IN) {
764 memcpy(buf->buf, priv_req->request.buf,
765 priv_req->request.length);
766 }
767
768 priv_req->flags |= REQUEST_UNALIGNED;
769 trace_cdns3_prepare_aligned_request(priv_req);
770
771 return 0;
772}
773
774static int cdns3_wa1_update_guard(struct cdns3_endpoint *priv_ep,
775 struct cdns3_trb *trb)
776{
777 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
778
779 if (!priv_ep->wa1_set) {
780 u32 doorbell;
781
782 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
783
784 if (doorbell) {
785 priv_ep->wa1_cycle_bit = priv_ep->pcs ? TRB_CYCLE : 0;
786 priv_ep->wa1_set = 1;
787 priv_ep->wa1_trb = trb;
788 priv_ep->wa1_trb_index = priv_ep->enqueue;
789 trace_cdns3_wa1(priv_ep, "set guard");
790 return 0;
791 }
792 }
793 return 1;
794}
795
796static void cdns3_wa1_tray_restore_cycle_bit(struct cdns3_device *priv_dev,
797 struct cdns3_endpoint *priv_ep)
798{
799 int dma_index;
800 u32 doorbell;
801
802 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
803 dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
804
805 if (!doorbell || dma_index != priv_ep->wa1_trb_index)
806 cdns3_wa1_restore_cycle_bit(priv_ep);
807}
808
809/**
810 * cdns3_ep_run_transfer - start transfer on no-default endpoint hardware
811 * @priv_ep: endpoint object
812 *
813 * Returns zero on success or negative value on failure
814 */
815int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
816 struct usb_request *request)
817{
818 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
819 struct cdns3_request *priv_req;
820 struct cdns3_trb *trb;
821 dma_addr_t trb_dma;
822 u32 togle_pcs = 1;
823 int sg_iter = 0;
824 int num_trb = 1;
825 int address;
826 u32 control;
827 int pcs;
828
829 if (num_trb > priv_ep->free_trbs) {
830 priv_ep->flags |= EP_RING_FULL;
831 return -ENOBUFS;
832 }
833
834 priv_req = to_cdns3_request(request);
835 address = priv_ep->endpoint.desc->bEndpointAddress;
836
837 priv_ep->flags |= EP_PENDING_REQUEST;
838
839 /* must allocate buffer aligned to 8 */
840 if (priv_req->flags & REQUEST_UNALIGNED)
841 trb_dma = priv_req->aligned_buf->dma;
842 else
843 trb_dma = request->dma;
844
845 trb = priv_ep->trb_pool + priv_ep->enqueue;
846 priv_req->start_trb = priv_ep->enqueue;
847 priv_req->trb = trb;
848
849 cdns3_select_ep(priv_ep->cdns3_dev, address);
850
851 /* prepare ring */
852 if ((priv_ep->enqueue + num_trb) >= (priv_ep->num_trbs - 1)) {
853 struct cdns3_trb *link_trb;
854 int doorbell, dma_index;
855 u32 ch_bit = 0;
856
857 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
858 dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
859
860 /* Driver can't update LINK TRB if it is current processed. */
861 if (doorbell && dma_index == priv_ep->num_trbs - 1) {
862 priv_ep->flags |= EP_DEFERRED_DRDY;
863 return -ENOBUFS;
864 }
865
866 /*updating C bt in Link TRB before starting DMA*/
867 link_trb = priv_ep->trb_pool + (priv_ep->num_trbs - 1);
868 /*
869 * For TRs size equal 2 enabling TRB_CHAIN for epXin causes
870 * that DMA stuck at the LINK TRB.
871 * On the other hand, removing TRB_CHAIN for longer TRs for
872 * epXout cause that DMA stuck after handling LINK TRB.
873 * To eliminate this strange behavioral driver set TRB_CHAIN
874 * bit only for TR size > 2.
875 */
876 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC ||
877 TRBS_PER_SEGMENT > 2)
878 ch_bit = TRB_CHAIN;
879
880 link_trb->control = ((priv_ep->pcs) ? TRB_CYCLE : 0) |
881 TRB_TYPE(TRB_LINK) | TRB_TOGGLE | ch_bit;
882 }
883
884 if (priv_dev->dev_ver <= DEV_VER_V2)
885 togle_pcs = cdns3_wa1_update_guard(priv_ep, trb);
886
887 /* set incorrect Cycle Bit for first trb*/
888 control = priv_ep->pcs ? 0 : TRB_CYCLE;
889
890 do {
891 u32 length;
892 u16 td_size = 0;
893
894 /* fill TRB */
895 control |= TRB_TYPE(TRB_NORMAL);
896 trb->buffer = TRB_BUFFER(trb_dma);
897
898 length = request->length;
899
900 if (likely(priv_dev->dev_ver >= DEV_VER_V2))
901 td_size = DIV_ROUND_UP(length,
902 priv_ep->endpoint.maxpacket);
903
904 trb->length = TRB_BURST_LEN(priv_ep->trb_burst_size) |
905 TRB_LEN(length);
906 if (priv_dev->gadget.speed == USB_SPEED_SUPER)
907 trb->length |= TRB_TDL_SS_SIZE(td_size);
908 else
909 control |= TRB_TDL_HS_SIZE(td_size);
910
911 pcs = priv_ep->pcs ? TRB_CYCLE : 0;
912
913 /*
914 * first trb should be prepared as last to avoid processing
915 * transfer to early
916 */
917 if (sg_iter != 0)
918 control |= pcs;
919
920 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir) {
921 control |= TRB_IOC | TRB_ISP;
922 } else {
923 /* for last element in TD or in SG list */
924 if (sg_iter == (num_trb - 1) && sg_iter != 0)
925 control |= pcs | TRB_IOC | TRB_ISP;
926 }
927
928 if (sg_iter)
929 trb->control = control;
930 else
931 priv_req->trb->control = control;
932
933 control = 0;
934 ++sg_iter;
935 priv_req->end_trb = priv_ep->enqueue;
936 cdns3_ep_inc_enq(priv_ep);
937 trb = priv_ep->trb_pool + priv_ep->enqueue;
938 } while (sg_iter < num_trb);
939
940 trb = priv_req->trb;
941
942 priv_req->flags |= REQUEST_PENDING;
943
944 if (sg_iter == 1)
945 trb->control |= TRB_IOC | TRB_ISP;
946
947 /*
948 * Memory barrier - cycle bit must be set before other filds in trb.
949 */
950 dmb();
951
952 /* give the TD to the consumer*/
953 if (togle_pcs)
954 trb->control = trb->control ^ 1;
955
956 if (priv_dev->dev_ver <= DEV_VER_V2)
957 cdns3_wa1_tray_restore_cycle_bit(priv_dev, priv_ep);
958
959 trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
960
961 /*
962 * Memory barrier - Cycle Bit must be set before trb->length and
963 * trb->buffer fields.
964 */
965 dmb();
966
967 /*
968 * For DMULT mode we can set address to transfer ring only once after
969 * enabling endpoint.
970 */
971 if (priv_ep->flags & EP_UPDATE_EP_TRBADDR) {
972 /*
973 * Until SW is not ready to handle the OUT transfer the ISO OUT
974 * Endpoint should be disabled (EP_CFG.ENABLE = 0).
975 * EP_CFG_ENABLE must be set before updating ep_traddr.
976 */
977 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir &&
978 !(priv_ep->flags & EP_QUIRK_ISO_OUT_EN)) {
979 priv_ep->flags |= EP_QUIRK_ISO_OUT_EN;
980 cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
981 EP_CFG_ENABLE);
982 }
983
984 writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma +
985 priv_req->start_trb * TRB_SIZE),
986 &priv_dev->regs->ep_traddr);
987
988 priv_ep->flags &= ~EP_UPDATE_EP_TRBADDR;
989 }
990
991 if (!priv_ep->wa1_set && !(priv_ep->flags & EP_STALLED)) {
992 trace_cdns3_ring(priv_ep);
993 /*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
994 writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
995 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
996 trace_cdns3_doorbell_epx(priv_ep->name,
997 readl(&priv_dev->regs->ep_traddr));
998 }
999
1000 /* WORKAROUND for transition to L0 */
1001 __cdns3_gadget_wakeup(priv_dev);
1002
1003 return 0;
1004}
1005
1006void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
1007{
1008 struct cdns3_endpoint *priv_ep;
1009 struct usb_ep *ep;
1010 int val;
1011
1012 if (priv_dev->hw_configured_flag)
1013 return;
1014
1015 writel(USB_CONF_CFGSET, &priv_dev->regs->usb_conf);
1016 writel(EP_CMD_ERDY | EP_CMD_REQ_CMPL, &priv_dev->regs->ep_cmd);
1017
1018 cdns3_set_register_bit(&priv_dev->regs->usb_conf,
1019 USB_CONF_U1EN | USB_CONF_U2EN);
1020
1021 /* wait until configuration set */
1022 readl_poll_timeout_atomic(&priv_dev->regs->usb_sts, val,
1023 val & USB_STS_CFGSTS_MASK, 100);
1024
1025 priv_dev->hw_configured_flag = 1;
1026
1027 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
1028 priv_ep = ep_to_cdns3_ep(ep);
1029 if (priv_ep->flags & EP_ENABLED)
1030 cdns3_start_all_request(priv_dev, priv_ep);
1031 }
1032}
1033
1034/**
1035 * cdns3_request_handled - check whether request has been handled by DMA
1036 *
1037 * @priv_ep: extended endpoint object.
1038 * @priv_req: request object for checking
1039 *
1040 * Endpoint must be selected before invoking this function.
1041 *
1042 * Returns false if request has not been handled by DMA, else returns true.
1043 *
1044 * SR - start ring
1045 * ER - end ring
1046 * DQ = priv_ep->dequeue - dequeue position
1047 * EQ = priv_ep->enqueue - enqueue position
1048 * ST = priv_req->start_trb - index of first TRB in transfer ring
1049 * ET = priv_req->end_trb - index of last TRB in transfer ring
1050 * CI = current_index - index of processed TRB by DMA.
1051 *
1052 * As first step, function checks if cycle bit for priv_req->start_trb is
1053 * correct.
1054 *
1055 * some rules:
1056 * 1. priv_ep->dequeue never exceed current_index.
1057 * 2 priv_ep->enqueue never exceed priv_ep->dequeue
1058 * 3. exception: priv_ep->enqueue == priv_ep->dequeue
1059 * and priv_ep->free_trbs is zero.
1060 * This case indicate that TR is full.
1061 *
1062 * Then We can split recognition into two parts:
1063 * Case 1 - priv_ep->dequeue < current_index
1064 * SR ... EQ ... DQ ... CI ... ER
1065 * SR ... DQ ... CI ... EQ ... ER
1066 *
1067 * Request has been handled by DMA if ST and ET is between DQ and CI.
1068 *
1069 * Case 2 - priv_ep->dequeue > current_index
1070 * This situation take place when CI go through the LINK TRB at the end of
1071 * transfer ring.
1072 * SR ... CI ... EQ ... DQ ... ER
1073 *
1074 * Request has been handled by DMA if ET is less then CI or
1075 * ET is greater or equal DQ.
1076 */
1077static bool cdns3_request_handled(struct cdns3_endpoint *priv_ep,
1078 struct cdns3_request *priv_req)
1079{
1080 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1081 struct cdns3_trb *trb = priv_req->trb;
1082 int current_index = 0;
1083 int handled = 0;
1084 int doorbell;
1085
1086 current_index = cdns3_get_dma_pos(priv_dev, priv_ep);
1087 doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
1088
1089 trb = &priv_ep->trb_pool[priv_req->start_trb];
1090
1091 if ((trb->control & TRB_CYCLE) != priv_ep->ccs)
1092 goto finish;
1093
1094 if (doorbell == 1 && current_index == priv_ep->dequeue)
1095 goto finish;
1096
1097 /* The corner case for TRBS_PER_SEGMENT equal 2). */
1098 if (TRBS_PER_SEGMENT == 2 && priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
1099 handled = 1;
1100 goto finish;
1101 }
1102
1103 if (priv_ep->enqueue == priv_ep->dequeue &&
1104 priv_ep->free_trbs == 0) {
1105 handled = 1;
1106 } else if (priv_ep->dequeue < current_index) {
1107 if ((current_index == (priv_ep->num_trbs - 1)) &&
1108 !priv_ep->dequeue)
1109 goto finish;
1110
1111 if (priv_req->end_trb >= priv_ep->dequeue &&
1112 priv_req->end_trb < current_index)
1113 handled = 1;
1114 } else if (priv_ep->dequeue > current_index) {
1115 if (priv_req->end_trb < current_index ||
1116 priv_req->end_trb >= priv_ep->dequeue)
1117 handled = 1;
1118 }
1119
1120finish:
1121 trace_cdns3_request_handled(priv_req, current_index, handled);
1122
1123 return handled;
1124}
1125
1126static void cdns3_transfer_completed(struct cdns3_device *priv_dev,
1127 struct cdns3_endpoint *priv_ep)
1128{
1129 struct cdns3_request *priv_req;
1130 struct usb_request *request;
1131 struct cdns3_trb *trb;
1132
1133 while (!list_empty(&priv_ep->pending_req_list)) {
1134 request = cdns3_next_request(&priv_ep->pending_req_list);
1135 priv_req = to_cdns3_request(request);
1136
1137 /* Re-select endpoint. It could be changed by other CPU during
1138 * handling usb_gadget_giveback_request.
1139 */
1140#ifndef __UBOOT__
1141 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1142#else
1143 cdns3_select_ep(priv_dev,
1144 priv_ep->endpoint.desc->bEndpointAddress);
1145#endif
1146
1147 if (!cdns3_request_handled(priv_ep, priv_req))
1148 goto prepare_next_td;
1149
1150 trb = priv_ep->trb_pool + priv_ep->dequeue;
1151 trace_cdns3_complete_trb(priv_ep, trb);
1152
1153 if (trb != priv_req->trb)
1154 dev_warn(priv_dev->dev,
1155 "request_trb=0x%p, queue_trb=0x%p\n",
1156 priv_req->trb, trb);
1157
1158 request->actual = TRB_LEN(le32_to_cpu(trb->length));
1159 cdns3_move_deq_to_next_trb(priv_req);
1160 cdns3_gadget_giveback(priv_ep, priv_req, 0);
1161
1162 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC &&
1163 TRBS_PER_SEGMENT == 2)
1164 break;
1165 }
1166 priv_ep->flags &= ~EP_PENDING_REQUEST;
1167
1168prepare_next_td:
1169 if (!(priv_ep->flags & EP_STALLED) &&
1170 !(priv_ep->flags & EP_STALL_PENDING))
1171 cdns3_start_all_request(priv_dev, priv_ep);
1172}
1173
1174void cdns3_rearm_transfer(struct cdns3_endpoint *priv_ep, u8 rearm)
1175{
1176 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1177
1178 cdns3_wa1_restore_cycle_bit(priv_ep);
1179
1180 if (rearm) {
1181 trace_cdns3_ring(priv_ep);
1182
1183 /* Cycle Bit must be updated before arming DMA. */
1184 dmb();
1185 writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
1186
1187 __cdns3_gadget_wakeup(priv_dev);
1188
1189 trace_cdns3_doorbell_epx(priv_ep->name,
1190 readl(&priv_dev->regs->ep_traddr));
1191 }
1192}
1193
1194/**
1195 * cdns3_check_ep_interrupt_proceed - Processes interrupt related to endpoint
1196 * @priv_ep: endpoint object
1197 *
1198 * Returns 0
1199 */
1200static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep)
1201{
1202 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1203 u32 ep_sts_reg;
1204
1205#ifndef __UBOOT__
1206 cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
1207#else
1208 cdns3_select_ep(priv_dev, priv_ep->endpoint.desc->bEndpointAddress);
1209#endif
1210
1211 trace_cdns3_epx_irq(priv_dev, priv_ep);
1212
1213 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
1214 writel(ep_sts_reg, &priv_dev->regs->ep_sts);
1215
1216 if (ep_sts_reg & EP_STS_TRBERR) {
1217 if (priv_ep->flags & EP_STALL_PENDING &&
1218 !(ep_sts_reg & EP_STS_DESCMIS &&
1219 priv_dev->dev_ver < DEV_VER_V2)) {
1220 cdns3_ep_stall_flush(priv_ep);
1221 }
1222
1223 /*
1224 * For isochronous transfer driver completes request on
1225 * IOC or on TRBERR. IOC appears only when device receive
1226 * OUT data packet. If host disable stream or lost some packet
1227 * then the only way to finish all queued transfer is to do it
1228 * on TRBERR event.
1229 */
1230 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC &&
1231 !priv_ep->wa1_set) {
1232 if (!priv_ep->dir) {
1233 u32 ep_cfg = readl(&priv_dev->regs->ep_cfg);
1234
1235 ep_cfg &= ~EP_CFG_ENABLE;
1236 writel(ep_cfg, &priv_dev->regs->ep_cfg);
1237 priv_ep->flags &= ~EP_QUIRK_ISO_OUT_EN;
1238 }
1239 cdns3_transfer_completed(priv_dev, priv_ep);
1240 } else if (!(priv_ep->flags & EP_STALLED) &&
1241 !(priv_ep->flags & EP_STALL_PENDING)) {
1242 if (priv_ep->flags & EP_DEFERRED_DRDY) {
1243 priv_ep->flags &= ~EP_DEFERRED_DRDY;
1244 cdns3_start_all_request(priv_dev, priv_ep);
1245 } else {
1246 cdns3_rearm_transfer(priv_ep,
1247 priv_ep->wa1_set);
1248 }
1249 }
1250 }
1251
1252 if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP)) {
1253 if (priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN) {
1254 if (ep_sts_reg & EP_STS_ISP)
1255 priv_ep->flags |= EP_QUIRK_END_TRANSFER;
1256 else
1257 priv_ep->flags &= ~EP_QUIRK_END_TRANSFER;
1258 }
1259
1260 cdns3_transfer_completed(priv_dev, priv_ep);
1261 }
1262
1263 /*
1264 * WA2: this condition should only be meet when
1265 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_DET or
1266 * priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN.
1267 * In other cases this interrupt will be disabled/
1268 */
1269 if (ep_sts_reg & EP_STS_DESCMIS && priv_dev->dev_ver < DEV_VER_V2 &&
1270 !(priv_ep->flags & EP_STALLED))
1271 cdns3_wa2_descmissing_packet(priv_ep);
1272
1273 return 0;
1274}
1275
1276static void cdns3_disconnect_gadget(struct cdns3_device *priv_dev)
1277{
1278 if (priv_dev->gadget_driver && priv_dev->gadget_driver->disconnect) {
1279 spin_unlock(&priv_dev->lock);
1280 priv_dev->gadget_driver->disconnect(&priv_dev->gadget);
1281 spin_lock(&priv_dev->lock);
1282 }
1283}
1284
1285/**
1286 * cdns3_check_usb_interrupt_proceed - Processes interrupt related to device
1287 * @priv_dev: extended gadget object
1288 * @usb_ists: bitmap representation of device's reported interrupts
1289 * (usb_ists register value)
1290 */
1291static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev,
1292 u32 usb_ists)
1293{
1294 int speed = 0;
1295
1296 trace_cdns3_usb_irq(priv_dev, usb_ists);
1297 if (usb_ists & USB_ISTS_L1ENTI) {
1298 /*
1299 * WORKAROUND: CDNS3 controller has issue with hardware resuming
1300 * from L1. To fix it, if any DMA transfer is pending driver
1301 * must starts driving resume signal immediately.
1302 */
1303 if (readl(&priv_dev->regs->drbl))
1304 __cdns3_gadget_wakeup(priv_dev);
1305 }
1306
1307 /* Connection detected */
1308 if (usb_ists & (USB_ISTS_CON2I | USB_ISTS_CONI)) {
1309 speed = cdns3_get_speed(priv_dev);
1310 priv_dev->gadget.speed = speed;
1311 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_POWERED);
1312 cdns3_ep0_config(priv_dev);
1313 }
1314
1315 /* Disconnection detected */
1316 if (usb_ists & (USB_ISTS_DIS2I | USB_ISTS_DISI)) {
1317 cdns3_disconnect_gadget(priv_dev);
1318 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
1319 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
1320 cdns3_hw_reset_eps_config(priv_dev);
1321 }
1322
1323 if (usb_ists & (USB_ISTS_L2ENTI | USB_ISTS_U3ENTI)) {
1324 if (priv_dev->gadget_driver &&
1325 priv_dev->gadget_driver->suspend) {
1326 spin_unlock(&priv_dev->lock);
1327 priv_dev->gadget_driver->suspend(&priv_dev->gadget);
1328 spin_lock(&priv_dev->lock);
1329 }
1330 }
1331
1332 if (usb_ists & (USB_ISTS_L2EXTI | USB_ISTS_U3EXTI)) {
1333 if (priv_dev->gadget_driver &&
1334 priv_dev->gadget_driver->resume) {
1335 spin_unlock(&priv_dev->lock);
1336 priv_dev->gadget_driver->resume(&priv_dev->gadget);
1337 spin_lock(&priv_dev->lock);
1338 }
1339 }
1340
1341 /* reset*/
1342 if (usb_ists & (USB_ISTS_UWRESI | USB_ISTS_UHRESI | USB_ISTS_U2RESI)) {
1343 if (priv_dev->gadget_driver) {
1344 spin_unlock(&priv_dev->lock);
1345 usb_gadget_udc_reset(&priv_dev->gadget,
1346 priv_dev->gadget_driver);
1347 spin_lock(&priv_dev->lock);
1348
1349 /*read again to check the actual speed*/
1350 speed = cdns3_get_speed(priv_dev);
1351 priv_dev->gadget.speed = speed;
1352 cdns3_hw_reset_eps_config(priv_dev);
1353 cdns3_ep0_config(priv_dev);
1354 }
1355 }
1356}
1357
1358/**
1359 * cdns3_device_irq_handler- interrupt handler for device part of controller
1360 *
1361 * @irq: irq number for cdns3 core device
1362 * @data: structure of cdns3
1363 *
1364 * Returns IRQ_HANDLED or IRQ_NONE
1365 */
1366static irqreturn_t cdns3_device_irq_handler(int irq, void *data)
1367{
1368 struct cdns3_device *priv_dev;
1369 struct cdns3 *cdns = data;
1370 irqreturn_t ret = IRQ_NONE;
1371 u32 reg;
1372
1373 priv_dev = cdns->gadget_dev;
1374
1375 /* check USB device interrupt */
1376 reg = readl(&priv_dev->regs->usb_ists);
1377 if (reg) {
1378 /* After masking interrupts the new interrupts won't be
1379 * reported in usb_ists/ep_ists. In order to not lose some
1380 * of them driver disables only detected interrupts.
1381 * They will be enabled ASAP after clearing source of
1382 * interrupt. This an unusual behavior only applies to
1383 * usb_ists register.
1384 */
1385 reg = ~reg & readl(&priv_dev->regs->usb_ien);
1386 /* mask deferred interrupt. */
1387 writel(reg, &priv_dev->regs->usb_ien);
1388 ret = IRQ_WAKE_THREAD;
1389 }
1390
1391 /* check endpoint interrupt */
1392 reg = readl(&priv_dev->regs->ep_ists);
1393 if (reg) {
1394 writel(0, &priv_dev->regs->ep_ien);
1395 ret = IRQ_WAKE_THREAD;
1396 }
1397
1398 return ret;
1399}
1400
1401/**
1402 * cdns3_device_thread_irq_handler- interrupt handler for device part
1403 * of controller
1404 *
1405 * @irq: irq number for cdns3 core device
1406 * @data: structure of cdns3
1407 *
1408 * Returns IRQ_HANDLED or IRQ_NONE
1409 */
1410static irqreturn_t cdns3_device_thread_irq_handler(int irq, void *data)
1411{
1412 struct cdns3_device *priv_dev;
1413 struct cdns3 *cdns = data;
1414 irqreturn_t ret = IRQ_NONE;
1415 unsigned long flags;
1416 int bit;
1417 u32 reg;
1418
1419 priv_dev = cdns->gadget_dev;
1420 spin_lock_irqsave(&priv_dev->lock, flags);
1421
1422 reg = readl(&priv_dev->regs->usb_ists);
1423 if (reg) {
1424 writel(reg, &priv_dev->regs->usb_ists);
1425 writel(USB_IEN_INIT, &priv_dev->regs->usb_ien);
1426 cdns3_check_usb_interrupt_proceed(priv_dev, reg);
1427 ret = IRQ_HANDLED;
1428 }
1429
1430 reg = readl(&priv_dev->regs->ep_ists);
1431
1432 /* handle default endpoint OUT */
1433 if (reg & EP_ISTS_EP_OUT0) {
1434 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_OUT);
1435 ret = IRQ_HANDLED;
1436 }
1437
1438 /* handle default endpoint IN */
1439 if (reg & EP_ISTS_EP_IN0) {
1440 cdns3_check_ep0_interrupt_proceed(priv_dev, USB_DIR_IN);
1441 ret = IRQ_HANDLED;
1442 }
1443
1444 /* check if interrupt from non default endpoint, if no exit */
1445 reg &= ~(EP_ISTS_EP_OUT0 | EP_ISTS_EP_IN0);
1446 if (!reg)
1447 goto irqend;
1448
1449 for_each_set_bit(bit, (unsigned long *)&reg,
1450 sizeof(u32) * BITS_PER_BYTE) {
1451 cdns3_check_ep_interrupt_proceed(priv_dev->eps[bit]);
1452 ret = IRQ_HANDLED;
1453 }
1454
1455irqend:
1456 writel(~0, &priv_dev->regs->ep_ien);
1457 spin_unlock_irqrestore(&priv_dev->lock, flags);
1458
1459 return ret;
1460}
1461
1462/**
1463 * cdns3_ep_onchip_buffer_reserve - Try to reserve onchip buf for EP
1464 *
1465 * The real reservation will occur during write to EP_CFG register,
1466 * this function is used to check if the 'size' reservation is allowed.
1467 *
1468 * @priv_dev: extended gadget object
1469 * @size: the size (KB) for EP would like to allocate
1470 * @is_in: endpoint direction
1471 *
1472 * Return 0 if the required size can met or negative value on failure
1473 */
1474static int cdns3_ep_onchip_buffer_reserve(struct cdns3_device *priv_dev,
1475 int size, int is_in)
1476{
1477 int remained;
1478
1479 /* 2KB are reserved for EP0*/
1480 remained = priv_dev->onchip_buffers - priv_dev->onchip_used_size - 2;
1481
1482 if (is_in) {
1483 if (remained < size)
1484 return -EPERM;
1485
1486 priv_dev->onchip_used_size += size;
1487 } else {
1488 int required;
1489
1490 /**
1491 * ALL OUT EPs are shared the same chunk onchip memory, so
1492 * driver checks if it already has assigned enough buffers
1493 */
1494 if (priv_dev->out_mem_is_allocated >= size)
1495 return 0;
1496
1497 required = size - priv_dev->out_mem_is_allocated;
1498
1499 if (required > remained)
1500 return -EPERM;
1501
1502 priv_dev->out_mem_is_allocated += required;
1503 priv_dev->onchip_used_size += required;
1504 }
1505
1506 return 0;
1507}
1508
1509void cdns3_configure_dmult(struct cdns3_device *priv_dev,
1510 struct cdns3_endpoint *priv_ep)
1511{
1512 struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
1513
1514 /* For dev_ver > DEV_VER_V2 DMULT is configured per endpoint */
1515 if (priv_dev->dev_ver <= DEV_VER_V2)
1516 writel(USB_CONF_DMULT, &regs->usb_conf);
1517
1518 if (priv_dev->dev_ver == DEV_VER_V2)
1519 writel(USB_CONF2_EN_TDL_TRB, &regs->usb_conf2);
1520
1521 if (priv_dev->dev_ver >= DEV_VER_V3 && priv_ep) {
1522 u32 mask;
1523
1524 if (priv_ep->dir)
1525 mask = BIT(priv_ep->num + 16);
1526 else
1527 mask = BIT(priv_ep->num);
1528
1529 if (priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
1530 cdns3_set_register_bit(&regs->tdl_from_trb, mask);
1531 cdns3_set_register_bit(&regs->tdl_beh, mask);
1532 cdns3_set_register_bit(&regs->tdl_beh2, mask);
1533 cdns3_set_register_bit(&regs->dma_adv_td, mask);
1534 }
1535
1536 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
1537 cdns3_set_register_bit(&regs->tdl_from_trb, mask);
1538
1539 cdns3_set_register_bit(&regs->dtrans, mask);
1540 }
1541}
1542
1543/**
1544 * cdns3_ep_config Configure hardware endpoint
1545 * @priv_ep: extended endpoint object
1546 */
1547void cdns3_ep_config(struct cdns3_endpoint *priv_ep)
1548{
1549 bool is_iso_ep = (priv_ep->type == USB_ENDPOINT_XFER_ISOC);
1550 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1551 u32 bEndpointAddress = priv_ep->num | priv_ep->dir;
1552 u32 max_packet_size = 0;
1553 u8 maxburst = 0;
1554 u32 ep_cfg = 0;
1555 u8 buffering;
1556 u8 mult = 0;
1557 int ret;
1558
1559 buffering = CDNS3_EP_BUF_SIZE - 1;
1560
1561 cdns3_configure_dmult(priv_dev, priv_ep);
1562
1563 switch (priv_ep->type) {
1564 case USB_ENDPOINT_XFER_INT:
1565 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_INT);
1566
1567 if ((priv_dev->dev_ver == DEV_VER_V2 && !priv_ep->dir) ||
1568 priv_dev->dev_ver > DEV_VER_V2)
1569 ep_cfg |= EP_CFG_TDL_CHK;
1570 break;
1571 case USB_ENDPOINT_XFER_BULK:
1572 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_BULK);
1573
1574 if ((priv_dev->dev_ver == DEV_VER_V2 && !priv_ep->dir) ||
1575 priv_dev->dev_ver > DEV_VER_V2)
1576 ep_cfg |= EP_CFG_TDL_CHK;
1577 break;
1578 default:
1579 ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_ISOC);
1580 mult = CDNS3_EP_ISO_HS_MULT - 1;
1581 buffering = mult + 1;
1582 }
1583
1584 switch (priv_dev->gadget.speed) {
1585 case USB_SPEED_FULL:
1586 max_packet_size = is_iso_ep ? 1023 : 64;
1587 break;
1588 case USB_SPEED_HIGH:
1589 max_packet_size = is_iso_ep ? 1024 : 512;
1590 break;
1591 case USB_SPEED_SUPER:
1592 /* It's limitation that driver assumes in driver. */
1593 mult = 0;
1594 max_packet_size = 1024;
1595 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
1596 maxburst = CDNS3_EP_ISO_SS_BURST - 1;
1597 buffering = (mult + 1) *
1598 (maxburst + 1);
1599
1600 if (priv_ep->interval > 1)
1601 buffering++;
1602 } else {
1603 maxburst = CDNS3_EP_BUF_SIZE - 1;
1604 }
1605 break;
1606 default:
1607 /* all other speed are not supported */
1608 return;
1609 }
1610
1611 if (max_packet_size == 1024)
1612 priv_ep->trb_burst_size = 128;
1613 else if (max_packet_size >= 512)
1614 priv_ep->trb_burst_size = 64;
1615 else
1616 priv_ep->trb_burst_size = 16;
1617
1618 ret = cdns3_ep_onchip_buffer_reserve(priv_dev, buffering + 1,
1619 !!priv_ep->dir);
1620 if (ret) {
1621 dev_err(priv_dev->dev, "onchip mem is full, ep is invalid\n");
1622 return;
1623 }
1624
1625 ep_cfg |= EP_CFG_MAXPKTSIZE(max_packet_size) |
1626 EP_CFG_MULT(mult) |
1627 EP_CFG_BUFFERING(buffering) |
1628 EP_CFG_MAXBURST(maxburst);
1629
1630 cdns3_select_ep(priv_dev, bEndpointAddress);
1631 writel(ep_cfg, &priv_dev->regs->ep_cfg);
1632
1633 dev_dbg(priv_dev->dev, "Configure %s: with val %08x\n",
1634 priv_ep->name, ep_cfg);
1635}
1636
1637/* Find correct direction for HW endpoint according to description */
1638static int cdns3_ep_dir_is_correct(struct usb_endpoint_descriptor *desc,
1639 struct cdns3_endpoint *priv_ep)
1640{
1641 return (priv_ep->endpoint.caps.dir_in && usb_endpoint_dir_in(desc)) ||
1642 (priv_ep->endpoint.caps.dir_out && usb_endpoint_dir_out(desc));
1643}
1644
1645static struct
1646cdns3_endpoint *cdns3_find_available_ep(struct cdns3_device *priv_dev,
1647 struct usb_endpoint_descriptor *desc)
1648{
1649 struct usb_ep *ep;
1650 struct cdns3_endpoint *priv_ep;
1651
1652 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
1653 unsigned long num;
1654 /* ep name pattern likes epXin or epXout */
1655 char c[2] = {ep->name[2], '\0'};
1656
1657 num = simple_strtoul(c, NULL, 10);
1658
1659 priv_ep = ep_to_cdns3_ep(ep);
1660 if (cdns3_ep_dir_is_correct(desc, priv_ep)) {
1661 if (!(priv_ep->flags & EP_CLAIMED)) {
1662 priv_ep->num = num;
1663 return priv_ep;
1664 }
1665 }
1666 }
1667
1668 return ERR_PTR(-ENOENT);
1669}
1670
1671/*
1672 * Cadence IP has one limitation that all endpoints must be configured
1673 * (Type & MaxPacketSize) before setting configuration through hardware
1674 * register, it means we can't change endpoints configuration after
1675 * set_configuration.
1676 *
1677 * This function set EP_CLAIMED flag which is added when the gadget driver
1678 * uses usb_ep_autoconfig to configure specific endpoint;
1679 * When the udc driver receives set_configurion request,
1680 * it goes through all claimed endpoints, and configure all endpoints
1681 * accordingly.
1682 *
1683 * At usb_ep_ops.enable/disable, we only enable and disable endpoint through
1684 * ep_cfg register which can be changed after set_configuration, and do
1685 * some software operation accordingly.
1686 */
1687static struct
1688usb_ep *cdns3_gadget_match_ep(struct usb_gadget *gadget,
1689 struct usb_endpoint_descriptor *desc,
1690 struct usb_ss_ep_comp_descriptor *comp_desc)
1691{
1692 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
1693 struct cdns3_endpoint *priv_ep;
1694 unsigned long flags;
1695
1696 priv_ep = cdns3_find_available_ep(priv_dev, desc);
1697 if (IS_ERR(priv_ep)) {
1698 dev_err(priv_dev->dev, "no available ep\n");
1699 return NULL;
1700 }
1701
1702 dev_dbg(priv_dev->dev, "match endpoint: %s\n", priv_ep->name);
1703
1704 spin_lock_irqsave(&priv_dev->lock, flags);
1705 priv_ep->endpoint.desc = desc;
1706 priv_ep->dir = usb_endpoint_dir_in(desc) ? USB_DIR_IN : USB_DIR_OUT;
1707 priv_ep->type = usb_endpoint_type(desc);
1708 priv_ep->flags |= EP_CLAIMED;
1709 priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
1710
1711 spin_unlock_irqrestore(&priv_dev->lock, flags);
1712 return &priv_ep->endpoint;
1713}
1714
1715/**
1716 * cdns3_gadget_ep_alloc_request Allocates request
1717 * @ep: endpoint object associated with request
1718 * @gfp_flags: gfp flags
1719 *
1720 * Returns allocated request address, NULL on allocation error
1721 */
1722struct usb_request *cdns3_gadget_ep_alloc_request(struct usb_ep *ep,
1723 gfp_t gfp_flags)
1724{
1725 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
1726 struct cdns3_request *priv_req;
1727
1728 priv_req = kzalloc(sizeof(*priv_req), gfp_flags);
1729 if (!priv_req)
1730 return NULL;
1731
1732 priv_req->priv_ep = priv_ep;
1733
1734 trace_cdns3_alloc_request(priv_req);
1735 return &priv_req->request;
1736}
1737
1738/**
1739 * cdns3_gadget_ep_free_request Free memory occupied by request
1740 * @ep: endpoint object associated with request
1741 * @request: request to free memory
1742 */
1743void cdns3_gadget_ep_free_request(struct usb_ep *ep,
1744 struct usb_request *request)
1745{
1746 struct cdns3_request *priv_req = to_cdns3_request(request);
1747
1748 if (priv_req->aligned_buf)
1749 priv_req->aligned_buf->in_use = 0;
1750
1751 trace_cdns3_free_request(priv_req);
1752 kfree(priv_req);
1753}
1754
1755/**
1756 * cdns3_gadget_ep_enable Enable endpoint
1757 * @ep: endpoint object
1758 * @desc: endpoint descriptor
1759 *
1760 * Returns 0 on success, error code elsewhere
1761 */
1762static int cdns3_gadget_ep_enable(struct usb_ep *ep,
1763 const struct usb_endpoint_descriptor *desc)
1764{
1765 struct cdns3_endpoint *priv_ep;
1766 struct cdns3_device *priv_dev;
1767 u32 reg = EP_STS_EN_TRBERREN;
1768 u32 bEndpointAddress;
1769 unsigned long flags;
1770 int enable = 1;
1771 int ret;
1772 int val;
1773
1774 priv_ep = ep_to_cdns3_ep(ep);
1775 priv_dev = priv_ep->cdns3_dev;
1776
1777 if (!ep || !desc || desc->bDescriptorType != USB_DT_ENDPOINT) {
1778 dev_dbg(priv_dev->dev, "usbss: invalid parameters\n");
1779 return -EINVAL;
1780 }
1781
1782 if (!desc->wMaxPacketSize) {
1783 dev_err(priv_dev->dev, "usbss: missing wMaxPacketSize\n");
1784 return -EINVAL;
1785 }
1786
1787 if (WARN_ON(priv_ep->flags & EP_ENABLED))
1788 return 0;
1789
1790 spin_lock_irqsave(&priv_dev->lock, flags);
1791
1792 priv_ep->endpoint.desc = desc;
1793 priv_ep->type = usb_endpoint_type(desc);
1794 priv_ep->interval = desc->bInterval ? BIT(desc->bInterval - 1) : 0;
1795
1796 if (priv_ep->interval > ISO_MAX_INTERVAL &&
1797 priv_ep->type == USB_ENDPOINT_XFER_ISOC) {
1798 dev_err(priv_dev->dev, "Driver is limited to %d period\n",
1799 ISO_MAX_INTERVAL);
1800
1801 ret = -EINVAL;
1802 goto exit;
1803 }
1804
1805 ret = cdns3_allocate_trb_pool(priv_ep);
1806
1807 if (ret)
1808 goto exit;
1809
1810 bEndpointAddress = priv_ep->num | priv_ep->dir;
1811 cdns3_select_ep(priv_dev, bEndpointAddress);
1812
1813 trace_cdns3_gadget_ep_enable(priv_ep);
1814
1815 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
1816
1817 ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
1818 !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
1819 1000);
1820
1821 if (unlikely(ret)) {
1822 cdns3_free_trb_pool(priv_ep);
1823 ret = -EINVAL;
1824 goto exit;
1825 }
1826
1827 /* enable interrupt for selected endpoint */
1828 cdns3_set_register_bit(&priv_dev->regs->ep_ien,
1829 BIT(cdns3_ep_addr_to_index(bEndpointAddress)));
1830
1831 if (priv_dev->dev_ver < DEV_VER_V2)
1832 cdns3_wa2_enable_detection(priv_dev, priv_ep, reg);
1833
1834 writel(reg, &priv_dev->regs->ep_sts_en);
1835
1836 /*
1837 * For some versions of controller at some point during ISO OUT traffic
1838 * DMA reads Transfer Ring for the EP which has never got doorbell.
1839 * This issue was detected only on simulation, but to avoid this issue
1840 * driver add protection against it. To fix it driver enable ISO OUT
1841 * endpoint before setting DRBL. This special treatment of ISO OUT
1842 * endpoints are recommended by controller specification.
1843 */
1844 if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
1845 enable = 0;
1846
1847 if (enable)
1848 cdns3_set_register_bit(&priv_dev->regs->ep_cfg, EP_CFG_ENABLE);
1849
1850 ep->desc = desc;
1851 priv_ep->flags &= ~(EP_PENDING_REQUEST | EP_STALLED | EP_STALL_PENDING |
1852 EP_QUIRK_ISO_OUT_EN | EP_QUIRK_EXTRA_BUF_EN);
1853 priv_ep->flags |= EP_ENABLED | EP_UPDATE_EP_TRBADDR;
1854 priv_ep->wa1_set = 0;
1855 priv_ep->enqueue = 0;
1856 priv_ep->dequeue = 0;
1857 reg = readl(&priv_dev->regs->ep_sts);
1858 priv_ep->pcs = !!EP_STS_CCS(reg);
1859 priv_ep->ccs = !!EP_STS_CCS(reg);
1860 /* one TRB is reserved for link TRB used in DMULT mode*/
1861 priv_ep->free_trbs = priv_ep->num_trbs - 1;
1862exit:
1863 spin_unlock_irqrestore(&priv_dev->lock, flags);
1864
1865 return ret;
1866}
1867
1868/**
1869 * cdns3_gadget_ep_disable Disable endpoint
1870 * @ep: endpoint object
1871 *
1872 * Returns 0 on success, error code elsewhere
1873 */
1874static int cdns3_gadget_ep_disable(struct usb_ep *ep)
1875{
1876 struct cdns3_endpoint *priv_ep;
1877 struct cdns3_request *priv_req;
1878 struct cdns3_device *priv_dev;
1879 struct usb_request *request;
1880 unsigned long flags;
1881 int ret = 0;
1882 u32 ep_cfg;
1883 int val;
1884
1885 if (!ep) {
1886 pr_err("usbss: invalid parameters\n");
1887 return -EINVAL;
1888 }
1889
1890 priv_ep = ep_to_cdns3_ep(ep);
1891 priv_dev = priv_ep->cdns3_dev;
1892
1893 if (WARN_ON(!(priv_ep->flags & EP_ENABLED)))
1894 return 0;
1895
1896 spin_lock_irqsave(&priv_dev->lock, flags);
1897
1898 trace_cdns3_gadget_ep_disable(priv_ep);
1899
1900 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
1901
1902 ep_cfg = readl(&priv_dev->regs->ep_cfg);
1903 ep_cfg &= ~EP_CFG_ENABLE;
1904 writel(ep_cfg, &priv_dev->regs->ep_cfg);
1905
1906 /**
1907 * Driver needs some time before resetting endpoint.
1908 * It need waits for clearing DBUSY bit or for timeout expired.
1909 * 10us is enough time for controller to stop transfer.
1910 */
1911 readl_poll_timeout_atomic(&priv_dev->regs->ep_sts, val,
1912 !(val & EP_STS_DBUSY), 10);
1913 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
1914
1915 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
1916 !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
1917 1000);
1918 if (unlikely(ret))
1919 dev_err(priv_dev->dev, "Timeout: %s resetting failed.\n",
1920 priv_ep->name);
1921
1922 while (!list_empty(&priv_ep->pending_req_list)) {
1923 request = cdns3_next_request(&priv_ep->pending_req_list);
1924
1925 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
1926 -ESHUTDOWN);
1927 }
1928
1929 while (!list_empty(&priv_ep->wa2_descmiss_req_list)) {
1930 priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
1931
1932 kfree(priv_req->request.buf);
1933 cdns3_gadget_ep_free_request(&priv_ep->endpoint,
1934 &priv_req->request);
1935 list_del_init(&priv_req->list);
1936 --priv_ep->wa2_counter;
1937 }
1938
1939 while (!list_empty(&priv_ep->deferred_req_list)) {
1940 request = cdns3_next_request(&priv_ep->deferred_req_list);
1941
1942 cdns3_gadget_giveback(priv_ep, to_cdns3_request(request),
1943 -ESHUTDOWN);
1944 }
1945
1946 priv_ep->descmis_req = NULL;
1947
1948 ep->desc = NULL;
1949 priv_ep->flags &= ~EP_ENABLED;
1950
1951 spin_unlock_irqrestore(&priv_dev->lock, flags);
1952
1953 return ret;
1954}
1955
1956/**
1957 * cdns3_gadget_ep_queue Transfer data on endpoint
1958 * @ep: endpoint object
1959 * @request: request object
1960 * @gfp_flags: gfp flags
1961 *
1962 * Returns 0 on success, error code elsewhere
1963 */
1964static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
1965 struct usb_request *request,
1966 gfp_t gfp_flags)
1967{
1968 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
1969 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
1970 struct cdns3_request *priv_req;
1971 int ret = 0;
1972
1973 request->actual = 0;
1974 request->status = -EINPROGRESS;
1975 priv_req = to_cdns3_request(request);
1976 trace_cdns3_ep_queue(priv_req);
1977
1978 if (priv_dev->dev_ver < DEV_VER_V2) {
1979 ret = cdns3_wa2_gadget_ep_queue(priv_dev, priv_ep,
1980 priv_req);
1981
1982 if (ret == EINPROGRESS)
1983 return 0;
1984 }
1985
1986 ret = cdns3_prepare_aligned_request_buf(priv_req);
1987 if (ret < 0)
1988 return ret;
1989
1990 ret = usb_gadget_map_request(&priv_dev->gadget, request,
1991 usb_endpoint_dir_in(ep->desc));
1992 if (ret)
1993 return ret;
1994
1995 list_add_tail(&request->list, &priv_ep->deferred_req_list);
1996
1997 /*
1998 * If hardware endpoint configuration has not been set yet then
1999 * just queue request in deferred list. Transfer will be started in
2000 * cdns3_set_hw_configuration.
2001 */
2002 if (priv_dev->hw_configured_flag && !(priv_ep->flags & EP_STALLED) &&
2003 !(priv_ep->flags & EP_STALL_PENDING))
2004 cdns3_start_all_request(priv_dev, priv_ep);
2005
2006 return 0;
2007}
2008
2009static int cdns3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
2010 gfp_t gfp_flags)
2011{
2012 struct usb_request *zlp_request;
2013 struct cdns3_endpoint *priv_ep;
2014 struct cdns3_device *priv_dev;
2015 unsigned long flags;
2016 int ret;
2017
2018 if (!request || !ep)
2019 return -EINVAL;
2020
2021 priv_ep = ep_to_cdns3_ep(ep);
2022 priv_dev = priv_ep->cdns3_dev;
2023
2024 spin_lock_irqsave(&priv_dev->lock, flags);
2025
2026 ret = __cdns3_gadget_ep_queue(ep, request, gfp_flags);
2027
2028 if (ret == 0 && request->zero && request->length &&
2029 (request->length % ep->maxpacket == 0)) {
2030 struct cdns3_request *priv_req;
2031
2032 zlp_request = cdns3_gadget_ep_alloc_request(ep, GFP_ATOMIC);
2033 zlp_request->buf = priv_dev->zlp_buf;
2034 zlp_request->length = 0;
2035
2036 priv_req = to_cdns3_request(zlp_request);
2037 priv_req->flags |= REQUEST_ZLP;
2038
2039 dev_dbg(priv_dev->dev, "Queuing ZLP for endpoint: %s\n",
2040 priv_ep->name);
2041 ret = __cdns3_gadget_ep_queue(ep, zlp_request, gfp_flags);
2042 }
2043
2044 spin_unlock_irqrestore(&priv_dev->lock, flags);
2045 return ret;
2046}
2047
2048/**
2049 * cdns3_gadget_ep_dequeue Remove request from transfer queue
2050 * @ep: endpoint object associated with request
2051 * @request: request object
2052 *
2053 * Returns 0 on success, error code elsewhere
2054 */
2055int cdns3_gadget_ep_dequeue(struct usb_ep *ep,
2056 struct usb_request *request)
2057{
2058 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2059 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2060 struct usb_request *req, *req_temp;
2061 struct cdns3_request *priv_req;
2062 struct cdns3_trb *link_trb;
2063 unsigned long flags;
2064 int ret = 0;
2065
2066 if (!ep || !request || !ep->desc)
2067 return -EINVAL;
2068
2069 spin_lock_irqsave(&priv_dev->lock, flags);
2070
2071 priv_req = to_cdns3_request(request);
2072
2073 trace_cdns3_ep_dequeue(priv_req);
2074
2075 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2076
2077 list_for_each_entry_safe(req, req_temp, &priv_ep->pending_req_list,
2078 list) {
2079 if (request == req)
2080 goto found;
2081 }
2082
2083 list_for_each_entry_safe(req, req_temp, &priv_ep->deferred_req_list,
2084 list) {
2085 if (request == req)
2086 goto found;
2087 }
2088
2089 goto not_found;
2090
2091found:
2092
2093 if (priv_ep->wa1_trb == priv_req->trb)
2094 cdns3_wa1_restore_cycle_bit(priv_ep);
2095
2096 link_trb = priv_req->trb;
2097 cdns3_move_deq_to_next_trb(priv_req);
2098 cdns3_gadget_giveback(priv_ep, priv_req, -ECONNRESET);
2099
2100 /* Update ring */
2101 request = cdns3_next_request(&priv_ep->deferred_req_list);
2102 if (request) {
2103 priv_req = to_cdns3_request(request);
2104
2105 link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma +
2106 (priv_req->start_trb * TRB_SIZE));
2107 link_trb->control = (link_trb->control & TRB_CYCLE) |
2108 TRB_TYPE(TRB_LINK) | TRB_CHAIN | TRB_TOGGLE;
2109 } else {
2110 priv_ep->flags |= EP_UPDATE_EP_TRBADDR;
2111 }
2112
2113not_found:
2114 spin_unlock_irqrestore(&priv_dev->lock, flags);
2115 return ret;
2116}
2117
2118/**
2119 * __cdns3_gadget_ep_set_halt Sets stall on selected endpoint
2120 * Should be called after acquiring spin_lock and selecting ep
2121 * @ep: endpoint object to set stall on.
2122 */
2123void __cdns3_gadget_ep_set_halt(struct cdns3_endpoint *priv_ep)
2124{
2125 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2126
2127 trace_cdns3_halt(priv_ep, 1, 0);
2128
2129 if (!(priv_ep->flags & EP_STALLED)) {
2130 u32 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
2131
2132 if (!(ep_sts_reg & EP_STS_DBUSY))
2133 cdns3_ep_stall_flush(priv_ep);
2134 else
2135 priv_ep->flags |= EP_STALL_PENDING;
2136 }
2137}
2138
2139/**
2140 * __cdns3_gadget_ep_clear_halt Clears stall on selected endpoint
2141 * Should be called after acquiring spin_lock and selecting ep
2142 * @ep: endpoint object to clear stall on
2143 */
2144int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
2145{
2146 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2147 struct usb_request *request;
2148 int ret = 0;
2149 int val;
2150
2151 trace_cdns3_halt(priv_ep, 0, 0);
2152
2153 writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2154
2155 /* wait for EPRST cleared */
2156 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2157 !(val & EP_CMD_EPRST), 100);
2158 if (ret)
2159 return -EINVAL;
2160
2161 priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING);
2162
2163 request = cdns3_next_request(&priv_ep->pending_req_list);
2164
2165 if (request)
2166 cdns3_rearm_transfer(priv_ep, 1);
2167
2168 cdns3_start_all_request(priv_dev, priv_ep);
2169 return ret;
2170}
2171
2172/**
2173 * cdns3_gadget_ep_set_halt Sets/clears stall on selected endpoint
2174 * @ep: endpoint object to set/clear stall on
2175 * @value: 1 for set stall, 0 for clear stall
2176 *
2177 * Returns 0 on success, error code elsewhere
2178 */
2179int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value)
2180{
2181 struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
2182 struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
2183 unsigned long flags;
2184 int ret = 0;
2185
2186 if (!(priv_ep->flags & EP_ENABLED))
2187 return -EPERM;
2188
2189 spin_lock_irqsave(&priv_dev->lock, flags);
2190
2191 cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
2192
2193 if (!value) {
2194 priv_ep->flags &= ~EP_WEDGE;
2195 ret = __cdns3_gadget_ep_clear_halt(priv_ep);
2196 } else {
2197 __cdns3_gadget_ep_set_halt(priv_ep);
2198 }
2199
2200 spin_unlock_irqrestore(&priv_dev->lock, flags);
2201
2202 return ret;
2203}
2204
2205extern const struct usb_ep_ops cdns3_gadget_ep0_ops;
2206
2207static const struct usb_ep_ops cdns3_gadget_ep_ops = {
2208 .enable = cdns3_gadget_ep_enable,
2209 .disable = cdns3_gadget_ep_disable,
2210 .alloc_request = cdns3_gadget_ep_alloc_request,
2211 .free_request = cdns3_gadget_ep_free_request,
2212 .queue = cdns3_gadget_ep_queue,
2213 .dequeue = cdns3_gadget_ep_dequeue,
2214 .set_halt = cdns3_gadget_ep_set_halt,
2215 .set_wedge = cdns3_gadget_ep_set_wedge,
2216};
2217
2218/**
2219 * cdns3_gadget_get_frame Returns number of actual ITP frame
2220 * @gadget: gadget object
2221 *
2222 * Returns number of actual ITP frame
2223 */
2224static int cdns3_gadget_get_frame(struct usb_gadget *gadget)
2225{
2226 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2227
2228 return readl(&priv_dev->regs->usb_itpn);
2229}
2230
2231int __cdns3_gadget_wakeup(struct cdns3_device *priv_dev)
2232{
2233 enum usb_device_speed speed;
2234
2235 speed = cdns3_get_speed(priv_dev);
2236
2237 if (speed >= USB_SPEED_SUPER)
2238 return 0;
2239
2240 /* Start driving resume signaling to indicate remote wakeup. */
2241 writel(USB_CONF_LGO_L0, &priv_dev->regs->usb_conf);
2242
2243 return 0;
2244}
2245
2246static int cdns3_gadget_wakeup(struct usb_gadget *gadget)
2247{
2248 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2249 unsigned long flags;
2250 int ret = 0;
2251
2252 spin_lock_irqsave(&priv_dev->lock, flags);
2253 ret = __cdns3_gadget_wakeup(priv_dev);
2254 spin_unlock_irqrestore(&priv_dev->lock, flags);
2255 return ret;
2256}
2257
2258static int cdns3_gadget_set_selfpowered(struct usb_gadget *gadget,
2259 int is_selfpowered)
2260{
2261 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2262 unsigned long flags;
2263
2264 spin_lock_irqsave(&priv_dev->lock, flags);
2265 priv_dev->is_selfpowered = !!is_selfpowered;
2266 spin_unlock_irqrestore(&priv_dev->lock, flags);
2267 return 0;
2268}
2269
2270static int cdns3_gadget_pullup(struct usb_gadget *gadget, int is_on)
2271{
2272 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2273
2274 if (is_on)
2275 writel(USB_CONF_DEVEN, &priv_dev->regs->usb_conf);
2276 else
2277 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2278
2279 return 0;
2280}
2281
2282static void cdns3_gadget_config(struct cdns3_device *priv_dev)
2283{
2284 struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
2285 u32 reg;
2286
2287 cdns3_ep0_config(priv_dev);
2288
2289 /* enable interrupts for endpoint 0 (in and out) */
2290 writel(EP_IEN_EP_OUT0 | EP_IEN_EP_IN0, &regs->ep_ien);
2291
2292 /*
2293 * Driver needs to modify LFPS minimal U1 Exit time for DEV_VER_TI_V1
2294 * revision of controller.
2295 */
2296 if (priv_dev->dev_ver == DEV_VER_TI_V1) {
2297 reg = readl(&regs->dbg_link1);
2298
2299 reg &= ~DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_MASK;
2300 reg |= DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(0x55) |
2301 DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_SET;
2302 writel(reg, &regs->dbg_link1);
2303 }
2304
2305 /*
2306 * By default some platforms has set protected access to memory.
2307 * This cause problem with cache, so driver restore non-secure
2308 * access to memory.
2309 */
2310 reg = readl(&regs->dma_axi_ctrl);
2311 reg |= DMA_AXI_CTRL_MARPROT(DMA_AXI_CTRL_NON_SECURE) |
2312 DMA_AXI_CTRL_MAWPROT(DMA_AXI_CTRL_NON_SECURE);
2313 writel(reg, &regs->dma_axi_ctrl);
2314
2315 /* enable generic interrupt*/
2316 writel(USB_IEN_INIT, &regs->usb_ien);
2317 writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, &regs->usb_conf);
2318
2319 cdns3_configure_dmult(priv_dev, NULL);
2320
2321 cdns3_gadget_pullup(&priv_dev->gadget, 1);
2322}
2323
2324/**
2325 * cdns3_gadget_udc_start Gadget start
2326 * @gadget: gadget object
2327 * @driver: driver which operates on this gadget
2328 *
2329 * Returns 0 on success, error code elsewhere
2330 */
2331static int cdns3_gadget_udc_start(struct usb_gadget *gadget,
2332 struct usb_gadget_driver *driver)
2333{
2334 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2335 unsigned long flags;
2336
2337 spin_lock_irqsave(&priv_dev->lock, flags);
2338 priv_dev->gadget_driver = driver;
2339 cdns3_gadget_config(priv_dev);
2340 spin_unlock_irqrestore(&priv_dev->lock, flags);
2341 return 0;
2342}
2343
2344/**
2345 * cdns3_gadget_udc_stop Stops gadget
2346 * @gadget: gadget object
2347 *
2348 * Returns 0
2349 */
2350static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
2351{
2352 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2353 struct cdns3_endpoint *priv_ep;
2354 u32 bEndpointAddress;
2355 struct usb_ep *ep;
2356 int ret = 0;
2357 int val;
2358
2359 priv_dev->gadget_driver = NULL;
2360
2361 priv_dev->onchip_used_size = 0;
2362 priv_dev->out_mem_is_allocated = 0;
2363 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
2364
2365 list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
2366 priv_ep = ep_to_cdns3_ep(ep);
2367 bEndpointAddress = priv_ep->num | priv_ep->dir;
2368 cdns3_select_ep(priv_dev, bEndpointAddress);
2369 writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
2370 readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
2371 !(val & EP_CMD_EPRST), 100);
2372 }
2373
2374 /* disable interrupt for device */
2375 writel(0, &priv_dev->regs->usb_ien);
2376 writel(USB_CONF_DEVDS, &priv_dev->regs->usb_conf);
2377
2378 return ret;
2379}
2380
Vignesh Raghavendrac13e14f2019-10-01 17:26:34 +05302381static void cdns3_gadget_udc_set_speed(struct usb_gadget *gadget,
2382 enum usb_device_speed speed)
2383{
2384 struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
2385
2386 switch (speed) {
2387 case USB_SPEED_FULL:
2388 writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
2389 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2390 break;
2391 case USB_SPEED_HIGH:
2392 writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
2393 break;
2394 case USB_SPEED_SUPER:
2395 break;
2396 default:
2397 dev_err(cdns->dev, "invalid speed parameter %d\n",
2398 speed);
2399 }
2400
2401 priv_dev->gadget.speed = speed;
2402}
2403
Vignesh Raghavendrab1a49282019-10-01 17:26:33 +05302404static const struct usb_gadget_ops cdns3_gadget_ops = {
2405 .get_frame = cdns3_gadget_get_frame,
2406 .wakeup = cdns3_gadget_wakeup,
2407 .set_selfpowered = cdns3_gadget_set_selfpowered,
2408 .pullup = cdns3_gadget_pullup,
2409 .udc_start = cdns3_gadget_udc_start,
2410 .udc_stop = cdns3_gadget_udc_stop,
2411 .match_ep = cdns3_gadget_match_ep,
Vignesh Raghavendrac13e14f2019-10-01 17:26:34 +05302412 .udc_set_speed = cdns3_gadget_udc_set_speed,
Vignesh Raghavendrab1a49282019-10-01 17:26:33 +05302413};
2414
2415static void cdns3_free_all_eps(struct cdns3_device *priv_dev)
2416{
2417 int i;
2418
2419 /* ep0 OUT point to ep0 IN. */
2420 priv_dev->eps[16] = NULL;
2421
2422 for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
2423 if (priv_dev->eps[i]) {
2424 cdns3_free_trb_pool(priv_dev->eps[i]);
2425 devm_kfree(priv_dev->dev, priv_dev->eps[i]);
2426 }
2427}
2428
2429/**
2430 * cdns3_init_eps Initializes software endpoints of gadget
2431 * @cdns3: extended gadget object
2432 *
2433 * Returns 0 on success, error code elsewhere
2434 */
2435static int cdns3_init_eps(struct cdns3_device *priv_dev)
2436{
2437 u32 ep_enabled_reg, iso_ep_reg;
2438 struct cdns3_endpoint *priv_ep;
2439 int ep_dir, ep_number;
2440 u32 ep_mask;
2441 int ret = 0;
2442 int i;
2443
2444 /* Read it from USB_CAP3 to USB_CAP5 */
2445 ep_enabled_reg = readl(&priv_dev->regs->usb_cap3);
2446 iso_ep_reg = readl(&priv_dev->regs->usb_cap4);
2447
2448 dev_dbg(priv_dev->dev, "Initializing non-zero endpoints\n");
2449
2450 for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++) {
2451 ep_dir = i >> 4; /* i div 16 */
2452 ep_number = i & 0xF; /* i % 16 */
2453 ep_mask = BIT(i);
2454
2455 if (!(ep_enabled_reg & ep_mask))
2456 continue;
2457
2458 if (ep_dir && !ep_number) {
2459 priv_dev->eps[i] = priv_dev->eps[0];
2460 continue;
2461 }
2462
2463 priv_ep = devm_kzalloc(priv_dev->dev, sizeof(*priv_ep),
2464 GFP_KERNEL);
2465 if (!priv_ep) {
2466 ret = -ENOMEM;
2467 goto err;
2468 }
2469
2470 /* set parent of endpoint object */
2471 priv_ep->cdns3_dev = priv_dev;
2472 priv_dev->eps[i] = priv_ep;
2473 priv_ep->num = ep_number;
2474 priv_ep->dir = ep_dir ? USB_DIR_IN : USB_DIR_OUT;
2475
2476 if (!ep_number) {
2477 ret = cdns3_init_ep0(priv_dev, priv_ep);
2478 if (ret) {
2479 dev_err(priv_dev->dev, "Failed to init ep0\n");
2480 goto err;
2481 }
2482 } else {
2483 snprintf(priv_ep->name, sizeof(priv_ep->name), "ep%d%s",
2484 ep_number, !!ep_dir ? "in" : "out");
2485 priv_ep->endpoint.name = priv_ep->name;
2486
2487 usb_ep_set_maxpacket_limit(&priv_ep->endpoint,
2488 CDNS3_EP_MAX_PACKET_LIMIT);
2489 priv_ep->endpoint.max_streams = CDNS3_EP_MAX_STREAMS;
2490 priv_ep->endpoint.ops = &cdns3_gadget_ep_ops;
2491 if (ep_dir)
2492 priv_ep->endpoint.caps.dir_in = 1;
2493 else
2494 priv_ep->endpoint.caps.dir_out = 1;
2495
2496 if (iso_ep_reg & ep_mask)
2497 priv_ep->endpoint.caps.type_iso = 1;
2498
2499 priv_ep->endpoint.caps.type_bulk = 1;
2500 priv_ep->endpoint.caps.type_int = 1;
2501
2502 list_add_tail(&priv_ep->endpoint.ep_list,
2503 &priv_dev->gadget.ep_list);
2504 }
2505
2506 priv_ep->flags = 0;
2507
2508 dev_info(priv_dev->dev, "Initialized %s support: %s %s\n",
2509 priv_ep->name,
2510 priv_ep->endpoint.caps.type_bulk ? "BULK, INT" : "",
2511 priv_ep->endpoint.caps.type_iso ? "ISO" : "");
2512
2513 INIT_LIST_HEAD(&priv_ep->pending_req_list);
2514 INIT_LIST_HEAD(&priv_ep->deferred_req_list);
2515 INIT_LIST_HEAD(&priv_ep->wa2_descmiss_req_list);
2516 }
2517
2518 return 0;
2519err:
2520 cdns3_free_all_eps(priv_dev);
2521 return -ENOMEM;
2522}
2523
2524void cdns3_gadget_exit(struct cdns3 *cdns)
2525{
2526 struct cdns3_device *priv_dev;
2527
2528 priv_dev = cdns->gadget_dev;
2529
2530 usb_del_gadget_udc(&priv_dev->gadget);
2531
2532 cdns3_free_all_eps(priv_dev);
2533
2534 while (!list_empty(&priv_dev->aligned_buf_list)) {
2535 struct cdns3_aligned_buf *buf;
2536
2537 buf = cdns3_next_align_buf(&priv_dev->aligned_buf_list);
2538 dma_free_coherent(buf->buf);
2539
2540 list_del(&buf->list);
2541 kfree(buf);
2542 }
2543
2544 dma_free_coherent(priv_dev->setup_buf);
2545
2546 kfree(priv_dev->zlp_buf);
2547 kfree(priv_dev);
2548 cdns->gadget_dev = NULL;
2549 cdns3_drd_switch_gadget(cdns, 0);
2550}
2551
2552static int cdns3_gadget_start(struct cdns3 *cdns)
2553{
2554 struct cdns3_device *priv_dev;
2555 u32 max_speed;
2556 int ret;
2557
2558 priv_dev = kzalloc(sizeof(*priv_dev), GFP_KERNEL);
2559 if (!priv_dev)
2560 return -ENOMEM;
2561
2562 cdns->gadget_dev = priv_dev;
2563 priv_dev->sysdev = cdns->dev;
2564 priv_dev->dev = cdns->dev;
2565 priv_dev->regs = cdns->dev_regs;
2566
2567 dev_read_u32(priv_dev->dev, "cdns,on-chip-buff-size",
2568 &priv_dev->onchip_buffers);
2569
2570 if (priv_dev->onchip_buffers <= 0) {
2571 u32 reg = readl(&priv_dev->regs->usb_cap2);
2572
2573 priv_dev->onchip_buffers = USB_CAP2_ACTUAL_MEM_SIZE(reg);
2574 }
2575
2576 if (!priv_dev->onchip_buffers)
2577 priv_dev->onchip_buffers = 256;
2578
2579 max_speed = usb_get_maximum_speed(dev_of_offset(cdns->dev));
2580
2581 /* Check the maximum_speed parameter */
2582 switch (max_speed) {
2583 case USB_SPEED_FULL:
Vignesh Raghavendrac13e14f2019-10-01 17:26:34 +05302584 /* fall through */
Vignesh Raghavendrab1a49282019-10-01 17:26:33 +05302585 case USB_SPEED_HIGH:
Vignesh Raghavendrac13e14f2019-10-01 17:26:34 +05302586 /* fall through */
Vignesh Raghavendrab1a49282019-10-01 17:26:33 +05302587 case USB_SPEED_SUPER:
2588 break;
2589 default:
2590 dev_err(cdns->dev, "invalid maximum_speed parameter %d\n",
2591 max_speed);
2592 /* fall through */
2593 case USB_SPEED_UNKNOWN:
2594 /* default to superspeed */
2595 max_speed = USB_SPEED_SUPER;
2596 break;
2597 }
2598
2599 /* fill gadget fields */
2600 priv_dev->gadget.max_speed = max_speed;
2601 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
2602 priv_dev->gadget.ops = &cdns3_gadget_ops;
2603 priv_dev->gadget.name = "cdns3-gadget";
2604#ifndef __UBOOT__
2605 priv_dev->gadget.name = "usb-ss-gadget";
2606 priv_dev->gadget.sg_supported = 1;
2607 priv_dev->gadget.quirk_avoids_skb_reserve = 1;
2608#endif
2609
2610 spin_lock_init(&priv_dev->lock);
2611 INIT_WORK(&priv_dev->pending_status_wq,
2612 cdns3_pending_setup_status_handler);
2613
2614 /* initialize endpoint container */
2615 INIT_LIST_HEAD(&priv_dev->gadget.ep_list);
2616 INIT_LIST_HEAD(&priv_dev->aligned_buf_list);
2617
2618 ret = cdns3_init_eps(priv_dev);
2619 if (ret) {
2620 dev_err(priv_dev->dev, "Failed to create endpoints\n");
2621 goto err1;
2622 }
2623
2624 /* allocate memory for setup packet buffer */
2625 priv_dev->setup_buf =
2626 dma_alloc_coherent(8, (unsigned long *)&priv_dev->setup_dma);
2627 if (!priv_dev->setup_buf) {
2628 ret = -ENOMEM;
2629 goto err2;
2630 }
2631
2632 priv_dev->dev_ver = readl(&priv_dev->regs->usb_cap6);
2633
2634 dev_dbg(priv_dev->dev, "Device Controller version: %08x\n",
2635 readl(&priv_dev->regs->usb_cap6));
2636 dev_dbg(priv_dev->dev, "USB Capabilities:: %08x\n",
2637 readl(&priv_dev->regs->usb_cap1));
2638 dev_dbg(priv_dev->dev, "On-Chip memory cnfiguration: %08x\n",
2639 readl(&priv_dev->regs->usb_cap2));
2640
2641 priv_dev->dev_ver = GET_DEV_BASE_VERSION(priv_dev->dev_ver);
2642
2643 priv_dev->zlp_buf = kzalloc(CDNS3_EP_ZLP_BUF_SIZE, GFP_KERNEL);
2644 if (!priv_dev->zlp_buf) {
2645 ret = -ENOMEM;
2646 goto err3;
2647 }
2648
2649 /* add USB gadget device */
2650 ret = usb_add_gadget_udc((struct device *)priv_dev->dev,
2651 &priv_dev->gadget);
2652 if (ret < 0) {
2653 dev_err(priv_dev->dev,
2654 "Failed to register USB device controller\n");
2655 goto err4;
2656 }
2657
2658 return 0;
2659err4:
2660 kfree(priv_dev->zlp_buf);
2661err3:
2662 dma_free_coherent(priv_dev->setup_buf);
2663err2:
2664 cdns3_free_all_eps(priv_dev);
2665err1:
2666 cdns->gadget_dev = NULL;
2667 return ret;
2668}
2669
2670static int __cdns3_gadget_init(struct cdns3 *cdns)
2671{
2672 int ret = 0;
2673
2674 cdns3_drd_switch_gadget(cdns, 1);
2675
2676 ret = cdns3_gadget_start(cdns);
2677 if (ret)
2678 return ret;
2679
2680 return 0;
2681}
2682
2683static int cdns3_gadget_suspend(struct cdns3 *cdns, bool do_wakeup)
2684{
2685 struct cdns3_device *priv_dev = cdns->gadget_dev;
2686
2687 cdns3_disconnect_gadget(priv_dev);
2688
2689 priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
2690 usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
2691 cdns3_hw_reset_eps_config(priv_dev);
2692
2693 /* disable interrupt for device */
2694 writel(0, &priv_dev->regs->usb_ien);
2695
2696 cdns3_gadget_pullup(&priv_dev->gadget, 0);
2697
2698 return 0;
2699}
2700
2701static int cdns3_gadget_resume(struct cdns3 *cdns, bool hibernated)
2702{
2703 struct cdns3_device *priv_dev = cdns->gadget_dev;
2704
2705 if (!priv_dev->gadget_driver)
2706 return 0;
2707
2708 cdns3_gadget_config(priv_dev);
2709
2710 return 0;
2711}
2712
2713/**
2714 * cdns3_gadget_init - initialize device structure
2715 *
2716 * cdns: cdns3 instance
2717 *
2718 * This function initializes the gadget.
2719 */
2720int cdns3_gadget_init(struct cdns3 *cdns)
2721{
2722 struct cdns3_role_driver *rdrv;
2723
2724 rdrv = devm_kzalloc(cdns->dev, sizeof(*rdrv), GFP_KERNEL);
2725 if (!rdrv)
2726 return -ENOMEM;
2727
2728 rdrv->start = __cdns3_gadget_init;
2729 rdrv->stop = cdns3_gadget_exit;
2730 rdrv->suspend = cdns3_gadget_suspend;
2731 rdrv->resume = cdns3_gadget_resume;
2732 rdrv->state = CDNS3_ROLE_STATE_INACTIVE;
2733 rdrv->name = "gadget";
2734 cdns->roles[USB_ROLE_DEVICE] = rdrv;
2735
2736 return 0;
2737}
2738
2739/**
2740 * cdns3_gadget_uboot_handle_interrupt - handle cdns3 gadget interrupt
2741 * @cdns: pointer to struct cdns3
2742 *
2743 * Handles ep0 and gadget interrupt
2744 */
2745static void cdns3_gadget_uboot_handle_interrupt(struct cdns3 *cdns)
2746{
2747 int ret = cdns3_device_irq_handler(0, cdns);
2748
2749 if (ret == IRQ_WAKE_THREAD)
2750 cdns3_device_thread_irq_handler(0, cdns);
2751}
2752
2753int dm_usb_gadget_handle_interrupts(struct udevice *dev)
2754{
2755 struct cdns3 *cdns = dev_get_priv(dev);
2756
2757 cdns3_gadget_uboot_handle_interrupt(cdns);
2758
2759 return 0;
2760}