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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Chander Kashyap0e7ab682011-08-18 22:37:19 +00002/*
3 * Copyright (C) 2011 Samsung Electronics
4 *
Chander Kashyap4131a772011-12-06 23:34:12 +00005 * Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
Chander Kashyap0e7ab682011-08-18 22:37:19 +00006 */
7
Piotr Wilczekeb68f442014-03-07 14:59:46 +01008#ifndef __CONFIG_ORIGEN_H
9#define __CONFIG_ORIGEN_H
10
Simon Glassbe165002014-10-07 22:01:44 -060011#include <configs/exynos4-common.h>
Piotr Wilczekeb68f442014-03-07 14:59:46 +010012
Chander Kashyap0e7ab682011-08-18 22:37:19 +000013/* High Level Configuration Options */
Chander Kashyap4131a772011-12-06 23:34:12 +000014#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000015#define CONFIG_ORIGEN 1 /* working with ORIGEN*/
16
Chander Kashyap0e7ab682011-08-18 22:37:19 +000017#define CONFIG_SYS_DCACHE_OFF 1
18
Piotr Wilczekeb68f442014-03-07 14:59:46 +010019/* ORIGEN has 4 bank of DRAM */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000020#define CONFIG_SYS_SDRAM_BASE 0x40000000
Piotr Wilczekeb68f442014-03-07 14:59:46 +010021#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
22#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000023
Piotr Wilczekeb68f442014-03-07 14:59:46 +010024/* memtest works on */
25#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
26#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
27#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
Chander Kashyap0e7ab682011-08-18 22:37:19 +000028
Chander Kashyap0e7ab682011-08-18 22:37:19 +000029#define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN
30
Chander Kashyap0e7ab682011-08-18 22:37:19 +000031/* select serial console configuration */
Rajeshwari Shindebed24422013-07-04 12:29:17 +053032
Piotr Wilczekeb68f442014-03-07 14:59:46 +010033/* Console configuration */
Piotr Wilczekeb68f442014-03-07 14:59:46 +010034#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
Chander Kashyap0e7ab682011-08-18 22:37:19 +000035
Piotr Wilczekeb68f442014-03-07 14:59:46 +010036#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
Chander Kashyap0e7ab682011-08-18 22:37:19 +000037
Piotr Wilczekeb68f442014-03-07 14:59:46 +010038#define CONFIG_SYS_MONITOR_BASE 0x00000000
Chander Kashyap0e7ab682011-08-18 22:37:19 +000039
Piotr Wilczekeb68f442014-03-07 14:59:46 +010040/* Power Down Modes */
41#define S5P_CHECK_SLEEP 0x00000BAD
42#define S5P_CHECK_DIDLE 0xBAD00000
43#define S5P_CHECK_LPA 0xABAD0000
Chander Kashyap0e7ab682011-08-18 22:37:19 +000044
Chander Kashyap488ef1a2011-08-18 22:37:20 +000045/* MMC SPL */
Chander Kashyap488ef1a2011-08-18 22:37:20 +000046#define COPY_BL2_FNPTR_ADDR 0x02020030
Inderpal Singh4a699c72013-04-04 23:09:21 +000047#define CONFIG_SPL_TEXT_BASE 0x02021410
48
Guillaume GARDET0df3a9d2014-10-08 15:04:38 +020049#define CONFIG_EXTRA_ENV_SETTINGS \
50 "loadaddr=0x40007000\0" \
51 "rdaddr=0x48000000\0" \
52 "kerneladdr=0x40007000\0" \
53 "ramdiskaddr=0x48000000\0" \
54 "console=ttySAC2,115200n8\0" \
55 "mmcdev=0\0" \
56 "bootenv=uEnv.txt\0" \
57 "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
58 "importbootenv=echo Importing environment from mmc ...; " \
59 "env import -t $loadaddr $filesize\0" \
60 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
61 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
62 "source ${loadaddr}\0"
63#define CONFIG_BOOTCOMMAND \
64 "if mmc rescan; then " \
65 "echo SD/MMC found on device ${mmcdev};" \
66 "if run loadbootenv; then " \
67 "echo Loaded environment from ${bootenv};" \
68 "run importbootenv;" \
69 "fi;" \
70 "if test -n $uenvcmd; then " \
71 "echo Running uenvcmd ...;" \
72 "run uenvcmd;" \
73 "fi;" \
74 "if run loadbootscript; then " \
75 "run bootscript; " \
76 "fi; " \
77 "fi;" \
78 "load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
Chander Kashyap0e7ab682011-08-18 22:37:19 +000079
Chander Kashyap0e7ab682011-08-18 22:37:19 +000080#define CONFIG_CLK_1000_400_200
81
82/* MIU (Memory Interleaving Unit) */
83#define CONFIG_MIU_2BIT_21_7_INTERLEAVED
84
Chander Kashyap0e7ab682011-08-18 22:37:19 +000085#define CONFIG_SYS_MMC_ENV_DEV 0
86#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
87#define RESERVE_BLOCK_SIZE (512)
88#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
89#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
Chander Kashyap0e7ab682011-08-18 22:37:19 +000090
Rajeshwari Shindebed24422013-07-04 12:29:17 +053091#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
92
93#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
Chander Kashyap488ef1a2011-08-18 22:37:20 +000094
Bin Meng75574052016-02-05 19:30:11 -080095/* U-Boot copy size from boot Media to DRAM.*/
Chander Kashyap488ef1a2011-08-18 22:37:20 +000096#define COPY_BL2_SIZE 0x80000
97#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
98#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
Angus Ainslie54932fe2011-09-09 12:02:02 +000099
Chander Kashyap0e7ab682011-08-18 22:37:19 +0000100#endif /* __CONFIG_H */