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Fabio Estevamc1e26342021-08-23 21:11:09 -03001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019 NXP
4 */
5
Marcel Ziswiler9888e122021-10-23 01:15:12 +02006#include "imx8mm-u-boot.dtsi"
7
Fabio Estevamc1e26342021-08-23 21:11:09 -03008/ {
Fabio Estevamc1e26342021-08-23 21:11:09 -03009 firmware {
10 optee {
11 compatible = "linaro,optee-tz";
12 method = "smc";
13 };
14 };
Marcel Ziswilerec7b9e82021-10-23 01:15:11 +020015
16 wdt-reboot {
17 compatible = "wdt-reboot";
18 u-boot,dm-spl;
19 wdt = <&wdog1>;
20 };
Fabio Estevamc1e26342021-08-23 21:11:09 -030021};
22
Marcel Ziswilerec7b9e82021-10-23 01:15:11 +020023&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} {
Fabio Estevamc1e26342021-08-23 21:11:09 -030024 u-boot,dm-spl;
Fabio Estevamc1e26342021-08-23 21:11:09 -030025};
26
Marcel Ziswilerec7b9e82021-10-23 01:15:11 +020027&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b/regulators} {
Fabio Estevamc1e26342021-08-23 21:11:09 -030028 u-boot,dm-spl;
Fabio Estevamc1e26342021-08-23 21:11:09 -030029};
30
Marcel Ziswilerd56d1172021-10-23 01:15:13 +020031&binman_fip {
32 arch = "arm64";
33 compression = "none";
34 description = "Trusted Firmware FIP";
35 load = <0x40310000>;
36 type = "firmware";
Fabio Estevamc1e26342021-08-23 21:11:09 -030037
Marcel Ziswilerd56d1172021-10-23 01:15:13 +020038 fip_blob {
39 filename = "fip.bin";
40 type = "blob-ext";
Fabio Estevamc1e26342021-08-23 21:11:09 -030041 };
Marcel Ziswilerd56d1172021-10-23 01:15:13 +020042};
Fabio Estevamc1e26342021-08-23 21:11:09 -030043
Marcel Ziswilerd56d1172021-10-23 01:15:13 +020044&binman_configuration {
45 loadables = "atf", "fip";
Fabio Estevamc1e26342021-08-23 21:11:09 -030046};
Marcel Ziswilerec7b9e82021-10-23 01:15:11 +020047
Marcel Ziswilerec7b9e82021-10-23 01:15:11 +020048&fec1 {
49 phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
50};
51
52&gpio1 {
53 u-boot,dm-spl;
54};
55
56&gpio2 {
57 u-boot,dm-spl;
58};
59
60&gpio3 {
61 u-boot,dm-spl;
62};
63
64&gpio4 {
65 u-boot,dm-spl;
66};
67
68&gpio5 {
69 u-boot,dm-spl;
70};
71
72&i2c1 {
73 u-boot,dm-spl;
74};
75
76&i2c2 {
77 u-boot,dm-spl;
Marcel Ziswilerec7b9e82021-10-23 01:15:11 +020078};
79
80&pinctrl_i2c2 {
81 u-boot,dm-spl;
82};
83
84&pinctrl_pmic {
85 u-boot,dm-spl;
86};
87
88&pinctrl_uart3 {
89 u-boot,dm-spl;
90};
91
92&pinctrl_usdhc2 {
93 u-boot,dm-spl;
94};
95
96&pinctrl_usdhc2_gpio {
97 u-boot,dm-spl;
98};
99
100&pinctrl_usdhc3 {
101 u-boot,dm-spl;
102};
103
104&uart3 {
105 u-boot,dm-spl;
106};
107
108&usdhc1 {
109 u-boot,dm-spl;
110};
111
112&usdhc2 {
113 u-boot,dm-spl;
114};
115
116&usdhc3 {
117 u-boot,dm-spl;
118};
119
120&wdog1 {
121 u-boot,dm-spl;
122};