blob: 84f884d6e55bc2af7237dc7d5ca4a919e3289959 [file] [log] [blame]
Marcel Ziswiler5d4bcee2022-07-21 15:27:26 +02001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2021 PHYTEC Messtechnik GmbH
4 * Author: Yunus Bas <y.bas@phytec.de>
5 */
6
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/interrupt-controller/irq.h>
9
10/ {
11 reg_wl_en: regulator-wl-en {
12 compatible = "regulator-fixed";
13 regulator-name = "wlan_en";
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_wl>;
18 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
19 enable-active-high;
20 startup-delay-us = <100>;
21 status = "disabled";
22 };
23};
24
25&uart3 {
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_uart3_bt>;
28 uart-has-rtscts;
29
30 bluetooth {
31 compatible = "brcm,bcm43438-bt";
32 shutdown-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
33 device-wakeup-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
34 host-wakeup-gpios = <&gpio5 26 GPIO_ACTIVE_HIGH>;
35 status = "disabled";
36 };
37};
38
39&usdhc3 {
40 #address-cells = <1>;
41 #size-cells = <0>;
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_usdhc3_wl>;
44 vmmc-supply = <&reg_wl_en>;
45 bus-width = <4>;
46 non-removable;
47 no-1-8-v;
48 status = "disabled";
49
50 brmcf: wifi@1 {
51 compatible = "brcm,bcm4329-fmac";
52 reg = <1>;
53 };
54};
55
56&iomuxc {
57 pinctrl_uart3_bt: uart3grp-bt {
58 fsl,pins = <
59 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
60 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
61 MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
62 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
63 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0xb0b1 /* BT ENABLE */
64 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0xb0b1 /* DEV WAKEUP */
65 MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0xb0b1 /* HOST WAKEUP */
66 >;
67 };
68
69 pinctrl_usdhc3_wl: usdhc3grp-wl {
70 fsl,pins = <
71 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
72 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
73 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
74 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
75 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
76 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
77 >;
78 };
79
80 pinctrl_wl: wlgrp {
81 fsl,pins = <
82 MX6QDL_PAD_EIM_A25__GPIO5_IO02 0xb0b1 /* WLAN ENABLE */
83 >;
84 };
85};