Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Simon Glass | 5debe1f | 2015-02-07 10:47:30 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Utility functions for FEL mode. |
| 4 | * |
| 5 | * Copyright (c) 2015 Google, Inc |
Simon Glass | 5debe1f | 2015-02-07 10:47:30 -0700 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <asm-offsets.h> |
| 9 | #include <config.h> |
| 10 | #include <asm/system.h> |
| 11 | #include <linux/linkage.h> |
| 12 | |
| 13 | ENTRY(save_boot_params) |
| 14 | ldr r0, =fel_stash |
| 15 | str sp, [r0, #0] |
| 16 | str lr, [r0, #4] |
Siarhei Siamashka | 7ef91f0 | 2015-02-16 10:23:59 +0200 | [diff] [blame] | 17 | mrs lr, cpsr @ Read CPSR |
| 18 | str lr, [r0, #8] |
| 19 | mrc p15, 0, lr, c1, c0, 0 @ Read CP15 SCTLR Register |
| 20 | str lr, [r0, #12] |
| 21 | mrc p15, 0, lr, c12, c0, 0 @ Read VBAR |
| 22 | str lr, [r0, #16] |
| 23 | mrc p15, 0, lr, c1, c0, 0 @ Read CP15 Control Register |
| 24 | str lr, [r0, #20] |
Simon Glass | 5debe1f | 2015-02-07 10:47:30 -0700 | [diff] [blame] | 25 | b save_boot_params_ret |
| 26 | ENDPROC(save_boot_params) |
| 27 | |
| 28 | ENTRY(return_to_fel) |
| 29 | mov sp, r0 |
| 30 | mov lr, r1 |
Siarhei Siamashka | 7ef91f0 | 2015-02-16 10:23:59 +0200 | [diff] [blame] | 31 | ldr r0, =fel_stash |
| 32 | ldr r1, [r0, #20] |
| 33 | mcr p15, 0, r1, c1, c0, 0 @ Write CP15 Control Register |
| 34 | ldr r1, [r0, #16] |
| 35 | mcr p15, 0, r1, c12, c0, 0 @ Write VBAR |
| 36 | ldr r1, [r0, #12] |
| 37 | mcr p15, 0, r1, c1, c0, 0 @ Write CP15 SCTLR Register |
| 38 | ldr r1, [r0, #8] |
| 39 | msr cpsr, r1 @ Write CPSR |
Simon Glass | 5debe1f | 2015-02-07 10:47:30 -0700 | [diff] [blame] | 40 | bx lr |
| 41 | ENDPROC(return_to_fel) |