Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (c) Copyright 2016, Data61 |
| 4 | * Commonwealth Scientific and Industrial Research Organisation (CSIRO) |
| 5 | * |
| 6 | * Based on jetson-tk1.h which is: |
| 7 | * (C) Copyright 2013-2014 |
| 8 | * NVIDIA Corporation <www.nvidia.com> |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #ifndef __CONFIG_H |
| 12 | #define __CONFIG_H |
| 13 | |
| 14 | #include <linux/sizes.h> |
| 15 | |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 16 | #include "tegra124-common.h" |
| 17 | |
| 18 | /* High-level configuration options */ |
Tom Rini | ca2e1a5 | 2022-12-04 10:13:58 -0500 | [diff] [blame] | 19 | #define CFG_TEGRA_BOARD_STRING "CEI tk1-som" |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 20 | |
| 21 | /* Board-specific serial config */ |
Tom Rini | df6a215 | 2022-11-16 13:10:28 -0500 | [diff] [blame] | 22 | #define CFG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 23 | |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 24 | #include "tegra-common-post.h" |
| 25 | |
Peter Chubb | 441f238 | 2016-08-30 22:54:46 +0000 | [diff] [blame] | 26 | #endif /* __CONFIG_H */ |