Yuantian Tang | 4aefa16 | 2019-04-10 16:43:33 +0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2019 NXP |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <asm/arch/fsl_serdes.h> |
| 8 | |
| 9 | struct serdes_config { |
| 10 | u32 protocol; |
| 11 | u8 lanes[SRDS_MAX_LANES]; |
| 12 | u8 rcw_lanes[SRDS_MAX_LANES]; |
| 13 | }; |
| 14 | |
| 15 | static struct serdes_config serdes1_cfg_tbl[] = { |
| 16 | /* SerDes 1 */ |
| 17 | {0xCC5B, {PCIE1, QSGMII_B, PCIE2, PCIE2} }, |
| 18 | {0xEB99, {SGMII1, SGMII1, PCIE2, SATA1} }, |
| 19 | {0xCC99, {SGMII1, SGMII1, PCIE2, PCIE2} }, |
| 20 | {0xBB99, {SGMII1, SGMII1, PCIE2, PCIE1} }, |
| 21 | {0x9999, {SGMII1, SGMII2, SGMII3, SGMII4} }, |
| 22 | {0xEBCC, {PCIE1, PCIE1, PCIE2, SATA1} }, |
| 23 | {0xCCCC, {PCIE1, PCIE1, PCIE2, PCIE2} }, |
| 24 | {0xDDDD, {PCIE1, PCIE1, PCIE1, PCIE1} }, |
Xiaowei Bao | 1eb4459 | 2019-05-21 18:28:31 +0800 | [diff] [blame] | 25 | {0xE031, {SXGMII1, QXGMII2, NONE, SATA1} }, |
| 26 | {0xB991, {SXGMII1, SGMII1, SGMII2, PCIE1} }, |
| 27 | {0xBB31, {SXGMII1, QXGMII2, PCIE1, PCIE1} }, |
| 28 | {0xCC31, {SXGMII1, QXGMII2, PCIE2, PCIE2} }, |
| 29 | {0xBB51, {SXGMII1, QSGMII_B, PCIE2, PCIE1} }, |
| 30 | {0xBB38, {SGMII_T1, QXGMII2, PCIE2, PCIE1} }, |
| 31 | {0xCC38, {SGMII_T1, QXGMII2, PCIE2, PCIE2} }, |
| 32 | {0xBB58, {SGMII_T1, QSGMII_B, PCIE2, PCIE1} }, |
| 33 | {0xCC58, {SGMII_T1, QSGMII_B, PCIE2, PCIE2} }, |
| 34 | {0xCC8B, {PCIE1, SGMII_T1, PCIE2, PCIE2} }, |
| 35 | {0xEB58, {SGMII_T1, QSGMII_B, PCIE2, SATA1} }, |
| 36 | {0xEB8B, {PCIE1, SGMII_T1, PCIE2, SATA1} }, |
| 37 | {0xE8CC, {PCIE1, PCIE1, SGMII_T1, SATA1} }, |
Yuantian Tang | 4aefa16 | 2019-04-10 16:43:33 +0800 | [diff] [blame] | 38 | {} |
| 39 | }; |
| 40 | |
| 41 | static struct serdes_config *serdes_cfg_tbl[] = { |
| 42 | serdes1_cfg_tbl, |
| 43 | }; |
| 44 | |
| 45 | enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane) |
| 46 | { |
| 47 | struct serdes_config *ptr; |
| 48 | |
| 49 | if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) |
| 50 | return 0; |
| 51 | |
| 52 | ptr = serdes_cfg_tbl[serdes]; |
| 53 | while (ptr->protocol) { |
| 54 | if (ptr->protocol == cfg) |
| 55 | return ptr->lanes[lane]; |
| 56 | ptr++; |
| 57 | } |
| 58 | |
| 59 | return 0; |
| 60 | } |
| 61 | |
| 62 | int is_serdes_prtcl_valid(int serdes, u32 prtcl) |
| 63 | { |
| 64 | int i; |
| 65 | struct serdes_config *ptr; |
| 66 | |
| 67 | if (serdes >= ARRAY_SIZE(serdes_cfg_tbl)) |
| 68 | return 0; |
| 69 | |
| 70 | ptr = serdes_cfg_tbl[serdes]; |
| 71 | while (ptr->protocol) { |
| 72 | if (ptr->protocol == prtcl) |
| 73 | break; |
| 74 | ptr++; |
| 75 | } |
| 76 | |
| 77 | if (!ptr->protocol) |
| 78 | return 0; |
| 79 | |
| 80 | for (i = 0; i < SRDS_MAX_LANES; i++) { |
| 81 | if (ptr->lanes[i] != NONE) |
| 82 | return 1; |
| 83 | } |
| 84 | |
| 85 | return 0; |
| 86 | } |