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git01.mediatek.com / filogic / uboot / d16f3d7b40e1e4c099b5c4e46959242022abb446 / . / arch / arm / dts / r8a77980-condor-u-boot.dts
blob: f4a3b43b8ff1e239992e0653d27dcdb793bafe07 [file] [log] [blame]
Marek Vasutb700f032019-07-29 19:59:44 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source extras for U-Boot for the Condor board
4 *
5 * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
6 */
7
8#include "r8a77980-condor.dts"
9#include "r8a77980-u-boot.dtsi"
10
11/ {
12 aliases {
13 spi0 = &rpc;
14 };
Tam Nguyen5d5664f2023-02-27 23:58:47 +0100[diff] [blame]15
16 sysinfo {
17 compatible = "renesas,rcar-sysinfo";
18 i2c-eeprom = <&sysinfo_eeprom>;
Tom Rini8220add12023-03-14 10:58:41 -0400[diff] [blame]19 bootph-all;
Tam Nguyen5d5664f2023-02-27 23:58:47 +0100[diff] [blame]20 };
21};
22
23&i2c0 {
Tom Rini8220add12023-03-14 10:58:41 -0400[diff] [blame]24 bootph-all;
Tam Nguyen5d5664f2023-02-27 23:58:47 +0100[diff] [blame]25
26 sysinfo_eeprom: eeprom@50 {
27 compatible = "rohm,br24t01", "atmel,24c01";
28 reg = <0x50>;
29 pagesize = <8>;
Tom Rini8220add12023-03-14 10:58:41 -0400[diff] [blame]30 bootph-all;
Tam Nguyen5d5664f2023-02-27 23:58:47 +0100[diff] [blame]31 };
Marek Vasutb700f032019-07-29 19:59:44 +0200[diff] [blame]32};
33
34&rpc {
35 num-cs = <1>;
36 status = "okay";
37 spi-max-frequency = <50000000>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40
41 flash0: spi-flash@0 {
42 #address-cells = <1>;
43 #size-cells = <1>;
44 compatible = "s25fs512s", "jedec,spi-nor";
Marek Vasut94254b92022-12-22 22:17:20 +0100[diff] [blame]45 m25p,fast-read;
Marek Vasutb700f032019-07-29 19:59:44 +0200[diff] [blame]46 spi-max-frequency = <50000000>;
47 spi-tx-bus-width = <1>;
48 spi-rx-bus-width = <1>;
49 reg = <0>;
50 status = "okay";
51 };
52};