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git01.mediatek.com / filogic / uboot / d16f3d7b40e1e4c099b5c4e46959242022abb446 / . / arch / arm / dts / am335x-brppt1-mmc-u-boot.dtsi
blob: fe28ded757048f5d87611fe9ad32d053a675ce74 [file] [log] [blame]
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2022 B&R Industrial Automation GmbH -
4 * https://www.br-automation.com/
5 */
6
7/ {
8 ocp {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]9 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]10 };
11};
12
13&l4_wkup {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]14 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]15 segment@200000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]16 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]17 target-module@0
18 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]19 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]20 compatible = "simple-bus";
21 };
22 target-module@7000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]23 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]24 compatible = "simple-bus";
25 };
26 target-module@9000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]27 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]28 compatible = "simple-bus";
29 };
30 };
31};
32
33&wkup_cm {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]34 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]35};
36
37&l4_wkup_clkctrl {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]38 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]39};
40
41&l4_per {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]42 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]43 segment@0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]44 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]45 compatible = "simple-bus";
46 target-module@4c000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]47 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]48 compatible = "simple-bus";
49 };
50 };
51
52 segment@100000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]53 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]54 compatible = "simple-bus";
55 target-module@ac000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]56 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]57 compatible = "simple-bus";
58 };
59 target-module@ae000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]60 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]61 compatible = "simple-bus";
62 };
63 };
64};
65
66&prcm {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]67 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]68};
69
70&gpio0_target {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]71 bootph-all;
Bernhard Messerklingerdc490232022-08-25 08:54:01 +0200[diff] [blame]72};
73
74&prcm_clocks {
75 compatible = "simple-bus";
76};
77
78&scm_clocks {
79 compatible = "simple-bus";
80};
Bernhard Messerklingerefcf5422022-08-25 08:54:02 +0200[diff] [blame]81
82&i2c0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]83 bootph-all;
Bernhard Messerklingerefcf5422022-08-25 08:54:02 +0200[diff] [blame]84};
85
86&uart0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]87 bootph-all;
Bernhard Messerklingerefcf5422022-08-25 08:54:02 +0200[diff] [blame]88};
89
90&mmc1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]91 bootph-all;
Bernhard Messerklingerefcf5422022-08-25 08:54:02 +0200[diff] [blame]92};
93
94&mmc2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]95 bootph-all;
Bernhard Messerklingerefcf5422022-08-25 08:54:02 +0200[diff] [blame]96};
97
98&gpio0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]99 bootph-all;
Bernhard Messerklingerefcf5422022-08-25 08:54:02 +0200[diff] [blame]100};
101
102&gpio1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]103 bootph-all;
Bernhard Messerklingerefcf5422022-08-25 08:54:02 +0200[diff] [blame]104};
105
106&gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]107 bootph-all;
Bernhard Messerklingerefcf5422022-08-25 08:54:02 +0200[diff] [blame]108};
109
110&gpio3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]111 bootph-all;
Bernhard Messerklingerefcf5422022-08-25 08:54:02 +0200[diff] [blame]112};