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Simon Glass970b61e2019-11-14 12:57:09 -07001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2000-2009
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * Copyright 2019 Google LLC
6 */
7
8#ifndef __CPU_LEGACY_H
9#define __CPU_LEGACY_H
10
11#include <linux/types.h>
12
13/*
14 * Multicore arch functions
15 *
16 * These should be moved to use the CPU uclass.
17 */
18int cpu_status(u32 nr);
19int cpu_reset(u32 nr);
20int cpu_disable(u32 nr);
Simon Glassed38aef2020-05-10 11:40:03 -060021int cpu_release(u32 nr, int argc, char *const argv[]);
Simon Glass970b61e2019-11-14 12:57:09 -070022
Simon Glass1fa70f82019-11-14 12:57:34 -070023static inline int cpumask_next(int cpu, unsigned int mask)
24{
25 for (cpu++; !((1 << cpu) & mask); cpu++)
26 ;
27
28 return cpu;
29}
30
31#define for_each_cpu(iter, cpu, num_cpus, mask) \
32 for (iter = 0, cpu = cpumask_next(-1, mask); \
33 iter < num_cpus; \
34 iter++, cpu = cpumask_next(cpu, mask)) \
35
36int cpu_numcores(void);
37int cpu_num_dspcores(void);
38u32 cpu_mask(void);
39u32 cpu_dsp_mask(void);
40int is_core_valid(unsigned int core);
41
42/**
43 * checkcpu() - perform an early check of the CPU
44 *
45 * This is used on PowerPC, SH and X86 machines as a CPU init mechanism. It is
46 * called during the pre-relocation init sequence in board_init_f().
47 *
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010048 * Return: 0 if oK, -ve on error
Simon Glass1fa70f82019-11-14 12:57:34 -070049 */
50int checkcpu(void);
51
Simon Glass370382c2019-11-14 12:57:35 -070052void smp_set_core_boot_addr(unsigned long addr, int corenr);
53void smp_kick_all_cpus(void);
54
Simon Glass1d91ba72019-11-14 12:57:37 -070055int icache_status(void);
56void icache_enable(void);
57void icache_disable(void);
58int dcache_status(void);
59void dcache_enable(void);
60void dcache_disable(void);
61void mmu_disable(void);
Patrice Chotardee435c62021-07-19 11:21:51 +020062int mmu_status(void);
Simon Glass1d91ba72019-11-14 12:57:37 -070063
Simon Glass63334482019-11-14 12:57:39 -070064/* arch/$(ARCH)/lib/cache.c */
65void enable_caches(void);
66void flush_cache(unsigned long addr, unsigned long size);
67void flush_dcache_all(void);
68void flush_dcache_range(unsigned long start, unsigned long stop);
69void invalidate_dcache_range(unsigned long start, unsigned long stop);
70void invalidate_dcache_all(void);
71void invalidate_icache_all(void);
Tom Rini45a51b82024-10-22 10:31:17 -060072/**
73 * noncached_init() - Initialize non-cached memory region
74 *
75 * Initialize non-cached memory area. This memory region will be typically
76 * located right below the malloc() area and mapped uncached in the MMU.
77 *
78 * It is called during the generic post-relocation init sequence.
79 *
80 * Return: 0 if OK
81 */
82int noncached_init(void);
Jonas Jelonek0d669392024-10-22 10:31:18 -060083void noncached_set_region(void);
Tom Rini45a51b82024-10-22 10:31:17 -060084
85phys_addr_t noncached_alloc(size_t size, size_t align);
Simon Glass63334482019-11-14 12:57:39 -070086
87enum {
88 /* Disable caches (else flush caches but leave them active) */
89 CBL_DISABLE_CACHES = 1 << 0,
90 CBL_SHOW_BOOTSTAGE_REPORT = 1 << 1,
91
92 CBL_ALL = 3,
93};
94
95/**
96 * Clean up ready for linux
97 *
98 * @param flags Flags to control what is done
99 */
100int cleanup_before_linux_select(int flags);
Simon Glassafb02152019-12-28 10:45:01 -0700101
Harald Seiler6f14d5f2020-12-15 16:47:52 +0100102void reset_cpu(void);
103
Simon Glass970b61e2019-11-14 12:57:09 -0700104#endif