| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 1 | CONFIG_ARM=y |
| Trevor Woerner | 43ec7e0 | 2019-05-03 09:41:00 -0400 | [diff] [blame] | 2 | CONFIG_SPL_SYS_DCACHE_OFF=y |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 3 | CONFIG_ARCH_ZYNQ=y |
| 4 | CONFIG_SYS_TEXT_BASE=0x4000000 |
| Tom Rini | c9285bf | 2019-04-29 15:54:04 -0400 | [diff] [blame] | 5 | CONFIG_SPL_STACK_R_ADDR=0x200000 |
| Michal Simek | 040050b | 2018-03-23 09:34:00 +0100 | [diff] [blame] | 6 | CONFIG_SPL=y |
| Michal Simek | a932ae7 | 2018-06-04 08:33:30 +0200 | [diff] [blame] | 7 | CONFIG_DEBUG_UART_BASE=0xe0001000 |
| 8 | CONFIG_DEBUG_UART_CLOCK=50000000 |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 9 | CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM011 x16" |
| Tien Fong Chee | 6fd0a71 | 2019-01-23 14:20:03 +0800 | [diff] [blame] | 10 | # CONFIG_SPL_FS_FAT is not set |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 11 | CONFIG_DEBUG_UART=y |
| Tom Rini | 732aa4a | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 12 | CONFIG_DISTRO_DEFAULTS=y |
| Tom Rini | e478f70 | 2019-06-02 08:57:32 -0400 | [diff] [blame] | 13 | CONFIG_SYS_CUSTOM_LDSCRIPT=y |
| 14 | CONFIG_SYS_LDSCRIPT="arch/arm/mach-zynq/u-boot.lds" |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 15 | CONFIG_FIT=y |
| 16 | CONFIG_FIT_SIGNATURE=y |
| 17 | CONFIG_FIT_VERBOSE=y |
| Tom Rini | c220bd9 | 2019-05-23 07:14:07 -0400 | [diff] [blame] | 18 | CONFIG_LEGACY_IMAGE_FORMAT=y |
| Simon Glass | 4be229d | 2019-07-20 20:51:14 -0600 | [diff] [blame] | 19 | CONFIG_USE_PREBOOT=y |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 20 | CONFIG_SPL_STACK_R=y |
| 21 | CONFIG_SPL_OS_BOOT=y |
| Michal Simek | 04a80b7 | 2019-10-14 09:38:39 +0200 | [diff] [blame] | 22 | # CONFIG_BOOTM_NETBSD is not set |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 23 | # CONFIG_CMD_FLASH is not set |
| 24 | CONFIG_CMD_FPGA_LOADBP=y |
| 25 | CONFIG_CMD_FPGA_LOADFS=y |
| 26 | CONFIG_CMD_FPGA_LOADMK=y |
| 27 | CONFIG_CMD_FPGA_LOADP=y |
| 28 | CONFIG_CMD_GPIO=y |
| 29 | CONFIG_CMD_NAND_LOCK_UNLOCK=y |
| 30 | # CONFIG_CMD_SETEXPR is not set |
| 31 | # CONFIG_CMD_NET is not set |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 32 | CONFIG_CMD_CACHE=y |
| Tom Rini | 732aa4a | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 33 | # CONFIG_SPL_DOS_PARTITION is not set |
| Tom Rini | 732aa4a | 2018-02-10 16:54:38 -0500 | [diff] [blame] | 34 | # CONFIG_SPL_EFI_PARTITION is not set |
| Tom Rini | 7406032 | 2018-09-03 15:26:12 -0400 | [diff] [blame] | 35 | CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011-x16" |
| Tom Rini | ca63e71 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 36 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 37 | CONFIG_SPL_DM_SEQ_ALIAS=y |
| Michal Simek | 6605d8f | 2018-04-12 12:34:14 +0200 | [diff] [blame] | 38 | CONFIG_BLK=y |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 39 | CONFIG_FPGA_XILINX=y |
| Vipul Kumar | 4a4946b | 2018-02-16 18:02:51 +0530 | [diff] [blame] | 40 | CONFIG_FPGA_ZYNQPL=y |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 41 | CONFIG_DM_GPIO=y |
| 42 | # CONFIG_MMC is not set |
| Adam Ford | ac44a30 | 2018-07-07 22:18:22 -0500 | [diff] [blame] | 43 | CONFIG_MTD_DEVICE=y |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 44 | CONFIG_NAND=y |
| 45 | CONFIG_NAND_ZYNQ=y |
| 46 | CONFIG_DEBUG_UART_ZYNQ=y |
| Michal Simek | df7cfc7 | 2018-01-08 16:52:49 +0100 | [diff] [blame] | 47 | CONFIG_DEBUG_UART_ANNOUNCE=y |
| 48 | CONFIG_ZYNQ_SERIAL=y |