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git01.mediatek.com / filogic / uboot / cff1084f9dc3d03207db01cdcbce07030a9154df / . / configs / stm32f769-disco_spl_defconfig
blob: 92c8490a840b8844994a9aabc2eef84abe21932f [file] [log] [blame]
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]1CONFIG_ARM=y
Trevor Woerner2bcc1ed2020-05-06 08:02:42 -0400[diff] [blame]2CONFIG_ARCH_STM32=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x08008000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x100000
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]5CONFIG_SYS_MALLOC_F_LEN=0xE00
Patrice Chotardd3e0deb2022-04-27 13:53:55 +0200[diff] [blame]6CONFIG_SPL_GPIO=y
7CONFIG_SPL_LIBCOMMON_SUPPORT=y
8CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]9CONFIG_NR_DRAM_BANKS=1
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]10CONFIG_ENV_SIZE=0x2000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]12CONFIG_SPL_TEXT_BASE=0x8000000
Patrice Chotardd3e0deb2022-04-27 13:53:55 +0200[diff] [blame]13CONFIG_SPL_SERIAL=y
14CONFIG_SPL_DRIVERS_MISC=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]15CONFIG_STM32F7=y
16CONFIG_TARGET_STM32F746_DISCO=y
Patrice Chotardd3e0deb2022-04-27 13:53:55 +0200[diff] [blame]17CONFIG_SPL=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]18CONFIG_SYS_LOAD_ADDR=0x8008000
Tom Rini2e340532022-05-23 13:56:21 -0400[diff] [blame]19CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]20CONFIG_DISTRO_DEFAULTS=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]21CONFIG_BOOTDELAY=3
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]22CONFIG_AUTOBOOT_KEYED=y
23CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
24CONFIG_AUTOBOOT_STOP_STR=" "
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]25CONFIG_USE_BOOTARGS=y
26CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]27# CONFIG_DISPLAY_CPUINFO is not set
Patrice Chotardd3e0deb2022-04-27 13:53:55 +0200[diff] [blame]28CONFIG_SPL_BOARD_INIT=y
29CONFIG_SPL_SYS_MALLOC_SIMPLE=y
30CONFIG_SPL_MTD_SUPPORT=y
31CONFIG_SPL_XIP_SUPPORT=y
32CONFIG_SPL_DM_RESET=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]33CONFIG_SYS_PROMPT="U-Boot > "
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]34CONFIG_CMD_GPT=y
35# CONFIG_RANDOM_UUID is not set
36CONFIG_CMD_MMC=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]37# CONFIG_CMD_SETEXPR is not set
38CONFIG_CMD_SNTP=y
39CONFIG_CMD_DNS=y
40CONFIG_CMD_LINK_LOCAL=y
41CONFIG_CMD_BMP=y
42CONFIG_CMD_CACHE=y
43CONFIG_CMD_TIMER=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]44# CONFIG_ISO_PARTITION is not set
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]45CONFIG_OF_CONTROL=y
Patrice Chotardd3e0deb2022-04-27 13:53:55 +0200[diff] [blame]46CONFIG_SPL_OF_CONTROL=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]47CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]48CONFIG_NET_RANDOM_ETHADDR=y
49CONFIG_NETCONSOLE=y
Patrice Chotardd3e0deb2022-04-27 13:53:55 +0200[diff] [blame]50CONFIG_SPL_DM=y
51CONFIG_SPL_DM_SEQ_ALIAS=y
52CONFIG_SPL_OF_TRANSLATE=y
53CONFIG_SPL_CLK=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]54CONFIG_ARM_PL180_MMCI=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]55CONFIG_MTD=y
Miquel Raynala903be42019-10-03 19:50:04 +0200[diff] [blame]56CONFIG_DM_MTD=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]57CONFIG_MTD_NOR_FLASH=y
Patrick Delaunay754ff3b2021-10-04 11:05:52 +0200[diff] [blame]58CONFIG_STM32_FLASH=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]59CONFIG_DM_SPI_FLASH=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]60CONFIG_SPI_FLASH_MACRONIX=y
61CONFIG_SPI_FLASH_STMICRO=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]62CONFIG_PHY_SMSC=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]63CONFIG_DM_ETH=y
64CONFIG_ETH_DESIGNWARE=y
65CONFIG_MII=y
66# CONFIG_PINCTRL_FULL is not set
Patrice Chotardd3e0deb2022-04-27 13:53:55 +0200[diff] [blame]67CONFIG_SPL_PINCTRL=y
68CONFIG_SPL_RAM=y
69CONFIG_SPECIFY_CONSOLE_INDEX=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]70CONFIG_SPI=y
71CONFIG_DM_SPI=y
72CONFIG_STM32_QSPI=y
Patrice Chotardd3e0deb2022-04-27 13:53:55 +0200[diff] [blame]73CONFIG_SPL_TIMER=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]74CONFIG_DM_VIDEO=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]75CONFIG_BACKLIGHT_GPIO=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]76CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
77CONFIG_VIDEO_STM32=y
78CONFIG_VIDEO_STM32_DSI=y
79CONFIG_VIDEO_STM32_MAX_XRES=480
80CONFIG_VIDEO_STM32_MAX_YRES=800
Simon Glass2d7a7942020-08-11 11:23:35 -0600[diff] [blame]81CONFIG_SPLASH_SCREEN=y
82CONFIG_SPLASH_SCREEN_ALIGN=y
Patrick Delaunayc47fe772020-09-28 11:30:15 +0200[diff] [blame]83CONFIG_VIDEO_BMP_RLE8=y
Patrick Delaunayb1f17632020-09-28 11:30:16 +0200[diff] [blame]84CONFIG_BMP_16BPP=y
85CONFIG_BMP_24BPP=y
86CONFIG_BMP_32BPP=y
Yannick Fertréb495e132019-10-07 15:29:10 +0200[diff] [blame]87CONFIG_OF_LIBFDT_OVERLAY=y