blob: d5468fb26066ec86f937119ab325c06b29b06328 [file] [log] [blame]
Tim Harvey295c8f92021-03-01 14:33:30 -08001/*
2 * Copyright 2017 Gateworks Corporation
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this file; if not, write to the Free
21 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 *
24 * Or, alternatively,
25 *
26 * b) Permission is hereby granted, free of charge, to any person
27 * obtaining a copy of this software and associated documentation
28 * files (the "Software"), to deal in the Software without
29 * restriction, including without limitation the rights to use,
30 * copy, modify, merge, publish, distribute, sublicense, and/or
31 * sell copies of the Software, and to permit persons to whom the
32 * Software is furnished to do so, subject to the following
33 * conditions:
34 *
35 * The above copyright notice and this permission notice shall be
36 * included in all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
40 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
42 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
43 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
44 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
45 * OTHER DEALINGS IN THE SOFTWARE.
46 */
47
48#include <dt-bindings/gpio/gpio.h>
49#include <dt-bindings/input/input.h>
50#include <dt-bindings/interrupt-controller/irq.h>
51
52/ {
53 /* these are used by bootloader for disabling nodes */
54 aliases {
55 led0 = &led0;
56 led1 = &led1;
57 led2 = &led2;
58 ssi0 = &ssi1;
59 usb0 = &usbh1;
60 usb1 = &usbotg;
61 };
62
63 chosen {
64 stdout-path = &uart2;
65 };
66
67 backlight-display {
68 compatible = "pwm-backlight";
69 pwms = <&pwm4 0 5000000>;
70 brightness-levels = <
71 0 1 2 3 4 5 6 7 8 9
72 10 11 12 13 14 15 16 17 18 19
73 20 21 22 23 24 25 26 27 28 29
74 30 31 32 33 34 35 36 37 38 39
75 40 41 42 43 44 45 46 47 48 49
76 50 51 52 53 54 55 56 57 58 59
77 60 61 62 63 64 65 66 67 68 69
78 70 71 72 73 74 75 76 77 78 79
79 80 81 82 83 84 85 86 87 88 89
80 90 91 92 93 94 95 96 97 98 99
81 100
82 >;
83 default-brightness-level = <100>;
84 };
85
86 backlight-keypad {
87 compatible = "gpio-backlight";
88 gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
89 default-on;
90 };
91
92 gpio-keys {
93 compatible = "gpio-keys";
94 #address-cells = <1>;
95 #size-cells = <0>;
96
97 user-pb {
98 label = "user_pb";
99 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
100 linux,code = <BTN_0>;
101 };
102
103 user-pb1x {
104 label = "user_pb1x";
105 linux,code = <BTN_1>;
106 interrupt-parent = <&gsc>;
107 interrupts = <0>;
108 };
109
110 key-erased {
111 label = "key-erased";
112 linux,code = <BTN_2>;
113 interrupt-parent = <&gsc>;
114 interrupts = <1>;
115 };
116
117 eeprom-wp {
118 label = "eeprom_wp";
119 linux,code = <BTN_3>;
120 interrupt-parent = <&gsc>;
121 interrupts = <2>;
122 };
123
124 tamper {
125 label = "tamper";
126 linux,code = <BTN_4>;
127 interrupt-parent = <&gsc>;
128 interrupts = <5>;
129 };
130
131 switch-hold {
132 label = "switch_hold";
133 linux,code = <BTN_5>;
134 interrupt-parent = <&gsc>;
135 interrupts = <7>;
136 };
137 };
138
139 leds {
140 compatible = "gpio-leds";
141 pinctrl-names = "default";
142 pinctrl-0 = <&pinctrl_gpio_leds>;
143
144 led0: user1 {
145 label = "user1";
146 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
147 default-state = "on";
148 linux,default-trigger = "heartbeat";
149 };
150
151 led1: user2 {
152 label = "user2";
153 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
154 default-state = "off";
155 };
156
157 led2: user3 {
158 label = "user3";
159 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
160 default-state = "off";
161 };
162 };
163
164 memory@10000000 {
165 device_type = "memory";
166 reg = <0x10000000 0x40000000>;
167 };
168
169 pps {
170 compatible = "pps-gpio";
171 pinctrl-names = "default";
172 pinctrl-0 = <&pinctrl_pps>;
173 gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
174 };
175
176 reg_2p5v: regulator-2p5v {
177 compatible = "regulator-fixed";
178 regulator-name = "2P5V";
179 regulator-min-microvolt = <2500000>;
180 regulator-max-microvolt = <2500000>;
181 regulator-always-on;
182 };
183
184 reg_3p3v: regulator-3p3v {
185 compatible = "regulator-fixed";
186 regulator-name = "3P3V";
187 regulator-min-microvolt = <3300000>;
188 regulator-max-microvolt = <3300000>;
189 regulator-always-on;
190 };
191
192 reg_5p0v: regulator-5p0v {
193 compatible = "regulator-fixed";
194 regulator-name = "5P0V";
195 regulator-min-microvolt = <5000000>;
196 regulator-max-microvolt = <5000000>;
197 regulator-always-on;
198 };
199
200 reg_12p0v: regulator-12p0v {
201 compatible = "regulator-fixed";
202 regulator-name = "12P0V";
203 regulator-min-microvolt = <12000000>;
204 regulator-max-microvolt = <12000000>;
205 gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
206 enable-active-high;
207 };
208
209 reg_1p4v: regulator-vddsoc {
210 compatible = "regulator-fixed";
211 regulator-name = "vdd_soc";
212 regulator-min-microvolt = <1400000>;
213 regulator-max-microvolt = <1400000>;
214 regulator-always-on;
215 };
216
217 reg_usb_h1_vbus: regulator-usb-h1-vbus {
218 compatible = "regulator-fixed";
219 regulator-name = "usb_h1_vbus";
220 regulator-min-microvolt = <5000000>;
221 regulator-max-microvolt = <5000000>;
222 regulator-always-on;
223 };
224
225 reg_usb_otg_vbus: regulator-usb-otg-vbus {
226 compatible = "regulator-fixed";
227 regulator-name = "usb_otg_vbus";
228 regulator-min-microvolt = <5000000>;
229 regulator-max-microvolt = <5000000>;
230 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
231 enable-active-high;
232 };
233
234 sound {
235 compatible = "fsl,imx6q-ventana-sgtl5000",
236 "fsl,imx-audio-sgtl5000";
237 model = "sgtl5000-audio";
238 ssi-controller = <&ssi1>;
239 audio-codec = <&sgtl5000>;
240 audio-routing =
241 "MIC_IN", "Mic Jack",
242 "Mic Jack", "Mic Bias",
243 "Headphone Jack", "HP_OUT";
244 mux-int-port = <1>;
245 mux-ext-port = <4>;
246 };
247};
248
249&audmux {
250 pinctrl-names = "default";
251 pinctrl-0 = <&pinctrl_audmux>;
252 status = "okay";
253};
254
255&ecspi3 {
256 cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
257 pinctrl-names = "default";
258 pinctrl-0 = <&pinctrl_ecspi3>;
259 status = "okay";
260};
261
262&can1 {
263 pinctrl-names = "default";
264 pinctrl-0 = <&pinctrl_flexcan>;
265 status = "okay";
266};
267
268&clks {
269 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
270 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
271 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
272 <&clks IMX6QDL_CLK_PLL3_USB_OTG>;
273};
274
275&fec {
276 pinctrl-names = "default";
277 pinctrl-0 = <&pinctrl_enet>;
278 phy-mode = "rgmii-id";
279 phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>;
280 status = "okay";
281};
282
283&hdmi {
284 ddc-i2c-bus = <&i2c3>;
285 status = "okay";
286};
287
288&i2c1 {
289 clock-frequency = <100000>;
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_i2c1>;
292 status = "okay";
293
294 gsc: gsc@20 {
295 compatible = "gw,gsc";
296 reg = <0x20>;
297 interrupt-parent = <&gpio1>;
298 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
299 interrupt-controller;
300 #interrupt-cells = <1>;
301 #size-cells = <0>;
302
303 adc {
304 compatible = "gw,gsc-adc";
305 #address-cells = <1>;
306 #size-cells = <0>;
307
308 channel@0 {
309 gw,mode = <0>;
310 reg = <0x00>;
311 label = "temp";
312 };
313
314 channel@2 {
315 gw,mode = <1>;
316 reg = <0x02>;
317 label = "vdd_vin";
318 };
319
320 channel@5 {
321 gw,mode = <1>;
322 reg = <0x05>;
323 label = "vdd_3p3";
324 };
325
326 channel@8 {
327 gw,mode = <1>;
328 reg = <0x08>;
329 label = "vdd_bat";
330 };
331
332 channel@b {
333 gw,mode = <1>;
334 reg = <0x0b>;
335 label = "vdd_5p0";
336 };
337
338 channel@e {
339 gw,mode = <1>;
340 reg = <0xe>;
341 label = "vdd_arm";
342 };
343
344 channel@11 {
345 gw,mode = <1>;
346 reg = <0x11>;
347 label = "vdd_soc";
348 };
349
350 channel@14 {
351 gw,mode = <1>;
352 reg = <0x14>;
353 label = "vdd_3p0";
354 };
355
356 channel@17 {
357 gw,mode = <1>;
358 reg = <0x17>;
359 label = "vdd_1p5";
360 };
361
362 channel@1d {
363 gw,mode = <1>;
364 reg = <0x1d>;
365 label = "vdd_1p8";
366 };
367
368 channel@20 {
369 gw,mode = <1>;
370 reg = <0x20>;
371 label = "vdd_an1";
372 };
373
374 channel@23 {
375 gw,mode = <1>;
376 reg = <0x23>;
377 label = "vdd_2p5";
378 };
379
380 channel@26 {
381 gw,mode = <1>;
382 reg = <0x26>;
383 label = "vdd_gps";
384 };
385
386 channel@29 {
387 gw,mode = <1>;
388 reg = <0x29>;
389 label = "vdd_an2";
390 };
391 };
392 };
393
394 gsc_gpio: gpio@23 {
395 compatible = "nxp,pca9555";
396 reg = <0x23>;
397 gpio-controller;
398 #gpio-cells = <2>;
399 interrupt-parent = <&gsc>;
400 interrupts = <4>;
401 };
402
403 eeprom1: eeprom@50 {
404 compatible = "atmel,24c02";
405 reg = <0x50>;
406 pagesize = <16>;
407 };
408
409 eeprom2: eeprom@51 {
410 compatible = "atmel,24c02";
411 reg = <0x51>;
412 pagesize = <16>;
413 };
414
415 eeprom3: eeprom@52 {
416 compatible = "atmel,24c02";
417 reg = <0x52>;
418 pagesize = <16>;
419 };
420
421 eeprom4: eeprom@53 {
422 compatible = "atmel,24c02";
423 reg = <0x53>;
424 pagesize = <16>;
425 };
426
427 ds1672: rtc@68 {
428 compatible = "dallas,ds1672";
429 reg = <0x68>;
430 };
431};
432
433&i2c2 {
434 clock-frequency = <100000>;
435 pinctrl-names = "default";
436 pinctrl-0 = <&pinctrl_i2c2>;
437 status = "okay";
438
439 sgtl5000: codec@a {
440 compatible = "fsl,sgtl5000";
441 reg = <0x0a>;
442 #sound-dai-cells = <0>;
443 clocks = <&clks IMX6QDL_CLK_CKO>;
444 VDDA-supply = <&reg_1p8v>;
445 VDDIO-supply = <&reg_3p3v>;
446 };
447
448 magn@1c {
449 compatible = "st,lsm9ds1-magn";
450 reg = <0x1c>;
451 pinctrl-names = "default";
452 pinctrl-0 = <&pinctrl_mag>;
453 interrupt-parent = <&gpio5>;
454 interrupts = <9 IRQ_TYPE_EDGE_RISING>;
455 };
456
457 tca8418: keypad@34 {
458 compatible = "ti,tca8418";
459 pinctrl-names = "default";
460 pinctrl-0 = <&pinctrl_keypad>;
461 reg = <0x34>;
462 interrupt-parent = <&gpio5>;
463 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
464 linux,keymap = < MATRIX_KEY(0x00, 0x01, BTN_0)
465 MATRIX_KEY(0x00, 0x00, BTN_1)
466 MATRIX_KEY(0x01, 0x01, BTN_2)
467 MATRIX_KEY(0x01, 0x00, BTN_3)
468 MATRIX_KEY(0x02, 0x00, BTN_4)
469 MATRIX_KEY(0x00, 0x03, BTN_5)
470 MATRIX_KEY(0x00, 0x02, BTN_6)
471 MATRIX_KEY(0x01, 0x03, BTN_7)
472 MATRIX_KEY(0x01, 0x02, BTN_8)
473 MATRIX_KEY(0x02, 0x02, BTN_9)
474 >;
475 keypad,num-rows = <4>;
476 keypad,num-columns = <4>;
477 };
478
479 ltc3676: pmic@3c {
480 compatible = "lltc,ltc3676";
481 pinctrl-names = "default";
482 pinctrl-0 = <&pinctrl_pmic>;
483 reg = <0x3c>;
484 interrupt-parent = <&gpio1>;
485 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
486
487 regulators {
488 /* VDD_DDR (1+R1/R2 = 2.105) */
489 reg_vdd_ddr: sw2 {
490 regulator-name = "vddddr";
491 regulator-min-microvolt = <868310>;
492 regulator-max-microvolt = <1684000>;
493 lltc,fb-voltage-divider = <221000 200000>;
494 regulator-ramp-delay = <7000>;
495 regulator-boot-on;
496 regulator-always-on;
497 };
498
499 /* VDD_ARM (1+R1/R2 = 1.931) */
500 reg_vdd_arm: sw3 {
501 regulator-name = "vddarm";
502 regulator-min-microvolt = <796551>;
503 regulator-max-microvolt = <1544827>;
504 lltc,fb-voltage-divider = <243000 261000>;
505 regulator-ramp-delay = <7000>;
506 regulator-boot-on;
507 regulator-always-on;
508 linux,phandle = <&reg_vdd_arm>;
509 };
510
511 /* VDD_1P8 (1+R1/R2 = 2.505): GPS/VideoIn/ENET-PHY */
512 reg_1p8v: sw4 {
513 regulator-name = "vdd1p8";
514 regulator-min-microvolt = <1033310>;
515 regulator-max-microvolt = <2004000>;
516 lltc,fb-voltage-divider = <301000 200000>;
517 regulator-ramp-delay = <7000>;
518 regulator-boot-on;
519 regulator-always-on;
520 };
521
522 /* VDD_1P0 (1+R1/R2 = 1.39): PCIe/ENET-PHY */
523 reg_1p0v: ldo2 {
524 regulator-name = "vdd1p0";
525 regulator-min-microvolt = <950000>;
526 regulator-max-microvolt = <1050000>;
527 lltc,fb-voltage-divider = <78700 200000>;
528 regulator-boot-on;
529 regulator-always-on;
530 };
531
532 /* VDD_AUD_1P8: Audio codec */
533 reg_aud_1p8v: ldo3 {
534 regulator-name = "vdd1p8a";
535 regulator-min-microvolt = <1800000>;
536 regulator-max-microvolt = <1800000>;
537 regulator-boot-on;
538 };
539
540 /* VDD_HIGH (1+R1/R2 = 4.17) */
541 reg_3p0v: ldo4 {
542 regulator-name = "vdd3p0";
543 regulator-min-microvolt = <3023250>;
544 regulator-max-microvolt = <3023250>;
545 lltc,fb-voltage-divider = <634000 200000>;
546 regulator-boot-on;
547 regulator-always-on;
548 };
549 };
550 };
551
552 imu@6a {
553 compatible = "st,lsm9ds1-imu";
554 reg = <0x6a>;
555 st,drdy-int-pin = <1>;
556 pinctrl-names = "default";
557 pinctrl-0 = <&pinctrl_imu>;
558 interrupt-parent = <&gpio5>;
559 interrupts = <6 IRQ_TYPE_LEVEL_HIGH>;
560 };
561};
562
563&i2c3 {
564 clock-frequency = <100000>;
565 pinctrl-names = "default";
566 pinctrl-0 = <&pinctrl_i2c3>;
567 status = "okay";
568
569 egalax_ts: touchscreen@4 {
570 compatible = "eeti,egalax_ts";
571 reg = <0x04>;
572 interrupt-parent = <&gpio5>;
573 interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
574 wakeup-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
575 };
576};
577
578&ldb {
579 fsl,dual-channel;
580 status = "okay";
581
582 lvds-channel@0 {
583 fsl,data-mapping = "spwg";
584 fsl,data-width = <18>;
585 status = "okay";
586
587 display-timings {
588 native-mode = <&timing0>;
589 timing0: hsd100pxn1 {
590 clock-frequency = <65000000>;
591 hactive = <1024>;
592 vactive = <768>;
593 hback-porch = <220>;
594 hfront-porch = <40>;
595 vback-porch = <21>;
596 vfront-porch = <7>;
597 hsync-len = <60>;
598 vsync-len = <10>;
599 };
600 };
601 };
602};
603
604&pcie {
605 pinctrl-names = "default";
606 pinctrl-0 = <&pinctrl_pcie>;
607 reset-gpio = <&gpio4 31 GPIO_ACTIVE_LOW>;
608 status = "okay";
609};
610
611&pwm2 {
612 pinctrl-names = "default";
613 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
614 status = "disabled";
615};
616
617&pwm3 {
618 pinctrl-names = "default";
619 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
620 status = "disabled";
621};
622
623&pwm4 {
624 #pwm-cells = <2>;
625 pinctrl-names = "default";
626 pinctrl-0 = <&pinctrl_pwm4>;
627 status = "okay";
628};
629
630&ssi1 {
631 status = "okay";
632};
633
634&uart1 {
635 pinctrl-names = "default";
636 pinctrl-0 = <&pinctrl_uart1>;
637 uart-has-rtscts;
638 rts-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
639 status = "okay";
640};
641
642&uart2 {
643 pinctrl-names = "default";
644 pinctrl-0 = <&pinctrl_uart2>;
645 status = "okay";
646};
647
648&uart5 {
649 pinctrl-names = "default";
650 pinctrl-0 = <&pinctrl_uart5>;
651 status = "okay";
652};
653
654&usbotg {
655 vbus-supply = <&reg_usb_otg_vbus>;
656 pinctrl-names = "default";
657 pinctrl-0 = <&pinctrl_usbotg>;
658 disable-over-current;
Tim Harvey3deb9892021-03-01 14:33:31 -0800659 dr_mode = "otg";
Tim Harvey295c8f92021-03-01 14:33:30 -0800660 status = "okay";
661};
662
663&usbh1 {
664 vbus-supply = <&reg_usb_h1_vbus>;
665 pinctrl-names = "default";
666 pinctrl-0 = <&pinctrl_usbh1>;
667 status = "okay";
668};
669
670&usdhc2 {
671 pinctrl-names = "default";
672 pinctrl-0 = <&pinctrl_usdhc2>;
673 bus-width = <8>;
674 vmmc-supply = <&reg_3p3v>;
675 non-removable;
676 status = "okay";
677};
678
679&usdhc3 {
680 pinctrl-names = "default", "state_100mhz", "state_200mhz";
681 pinctrl-0 = <&pinctrl_usdhc3>;
682 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
683 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
684 cd-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
685 vmmc-supply = <&reg_3p3v>;
686 status = "okay";
687};
688
689&wdog1 {
690 pinctrl-names = "default";
691 pinctrl-0 = <&pinctrl_wdog>;
692 fsl,ext-reset-output;
693};
694
695&iomuxc {
696 pinctrl_audmux: audmuxgrp {
697 fsl,pins = <
698 /* AUD4 */
699 MX6QDL_PAD_DISP0_DAT20__AUD4_TXC 0x130b0
700 MX6QDL_PAD_DISP0_DAT21__AUD4_TXD 0x110b0
701 MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
702 MX6QDL_PAD_DISP0_DAT23__AUD4_RXD 0x130b0
703 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */
704 /* AUD6 */
705 MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0
706 MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0
707 MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0
708 MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0
709 >;
710 };
711
712 pinctrl_ecspi3: escpi3grp {
713 fsl,pins = <
714 MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
715 MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
716 MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
717 MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1
718 >;
719 };
720
721 pinctrl_enet: enetgrp {
722 fsl,pins = <
723 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
724 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
725 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
726 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
727 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
728 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
729 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
730 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
731 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
732 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
733 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
734 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
735 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
736 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
737 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
738 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
739 MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
740 >;
741 };
742
743 pinctrl_flexcan: flexcangrp {
744 fsl,pins = <
745 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
746 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1
747 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */
748 >;
749 };
750
751 pinctrl_gpio_leds: gpioledsgrp {
752 fsl,pins = <
753 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
754 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
755 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
756 >;
757 };
758
759 pinctrl_i2c1: i2c1grp {
760 fsl,pins = <
761 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
762 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
763 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
764 >;
765 };
766
767 pinctrl_i2c2: i2c2grp {
768 fsl,pins = <
769 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
770 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
771 >;
772 };
773
774 pinctrl_i2c3: i2c3grp {
775 fsl,pins = <
776 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
777 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
778 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x4001b0b0 /* DIOI2C_DIS# */
779 MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x0001b0b0 /* LVDS_TOUCH_IRQ# */
780 MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x0001b0b0 /* LVDS_BACKEN */
781 >;
782 };
783
784 pinctrl_imu: imugrp {
785 fsl,pins = <
786 MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x1b0b0
787 >;
788 };
789
790 pinctrl_keypad: keypadgrp {
791 fsl,pins = <
792 MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0001b0b0 /* KEYPAD_IRQ# */
793 MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x0001b0b0 /* KEYPAD_LED_EN */
794 >;
795 };
796
797 pinctrl_mag: maggrp {
798 fsl,pins = <
799 MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b0
800 >;
801 };
802
803 pinctrl_pcie: pciegrp {
804 fsl,pins = <
805 MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0 /* PCI_RST# */
806 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b0 /* PCIESKT_WDIS# */
807 >;
808 };
809
810 pinctrl_pmic: pmicgrp {
811 fsl,pins = <
812 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
813 >;
814 };
815
816 pinctrl_pps: ppsgrp {
817 fsl,pins = <
818 MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
819 >;
820 };
821
822 pinctrl_pwm2: pwm2grp {
823 fsl,pins = <
824 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
825 >;
826 };
827
828 pinctrl_pwm3: pwm3grp {
829 fsl,pins = <
830 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
831 >;
832 };
833
834 pinctrl_pwm4: pwm4grp {
835 fsl,pins = <
836 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
837 >;
838 };
839
840 pinctrl_uart1: uart1grp {
841 fsl,pins = <
842 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
843 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
844 MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x4001b0b1 /* TEN */
845 >;
846 };
847
848 pinctrl_uart2: uart2grp {
849 fsl,pins = <
850 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
851 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
852 >;
853 };
854
855 pinctrl_uart5: uart5grp {
856 fsl,pins = <
857 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
858 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
859 >;
860 };
861
862 pinctrl_usbh1: usbh1grp {
863 fsl,pins = <
864 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* USBHUB_RST# */
865 >;
866 };
867
868 pinctrl_usbotg: usbotggrp {
869 fsl,pins = <
870 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
871 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
872 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
873 >;
874 };
875
876 pinctrl_usdhc2: usdhc2grp {
877 fsl,pins = <
878 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
879 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
880 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
881 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
882 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
883 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
884 MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x170f9
885 MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x170f9
886 MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x170f9
887 MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x170f9
888 >;
889 };
890
891 pinctrl_usdhc3: usdhc3grp {
892 fsl,pins = <
893 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
894 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
895 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
896 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
897 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
898 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
899 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */
900 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059
901 >;
902 };
903
904 pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
905 fsl,pins = <
906 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
907 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
908 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
909 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
910 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
911 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
912 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */
913 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9
914 >;
915 };
916
917 pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
918 fsl,pins = <
919 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
920 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
921 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
922 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
923 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
924 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
925 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */
926 MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9
927 >;
928 };
929
930 pinctrl_wdog: wdoggrp {
931 fsl,pins = <
932 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
933 >;
934 };
935};