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git01.mediatek.com / filogic / uboot / ce53ec860ccb3e2a250b7919c7ac2b664533947a / . / configs / hsdk_4xd_defconfig
blob: bcdae7d2e8eea8bc1ec112e25fbd2e8dd606c58d [file] [log] [blame]
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]1CONFIG_ARC=y
2CONFIG_ISA_ARCV2=y
3CONFIG_TARGET_HSDK=y
4CONFIG_BOARD_HSDK_4XD=y
5CONFIG_SYS_TEXT_BASE=0x81000000
Tom Rinie065fb12021-08-28 21:34:49 -0400[diff] [blame]6CONFIG_SYS_MALLOC_LEN=0x0200000
Tom Rini324cf142022-04-07 12:33:23 -0400[diff] [blame]7CONFIG_SYS_MALLOC_F_LEN=0x400
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]8CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="hsdk-4xd"
Tom Rinice53ec82022-08-23 15:24:14 -0400[diff] [blame^]10CONFIG_SYS_PROMPT="hsdk-4xd# "
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]11CONFIG_DEBUG_UART_BASE=0xf0005000
12CONFIG_DEBUG_UART_CLOCK=33333333
13CONFIG_SYS_CLK_FREQ=500000000
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]14CONFIG_SYS_LOAD_ADDR=0x82000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]15CONFIG_DEBUG_UART=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]16CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
17CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]18CONFIG_USE_BOOTARGS=y
19CONFIG_BOOTARGS="console=ttyS0,115200n8"
20CONFIG_BOARD_EARLY_INIT_F=y
21CONFIG_BOARD_EARLY_INIT_R=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]22CONFIG_BOARD_LATE_INIT=y
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]23CONFIG_HUSH_PARSER=y
Tom Riniae17fa32022-05-11 18:01:06 -0400[diff] [blame]24CONFIG_SYS_CBSIZE=2048
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]25CONFIG_SYS_PBSIZE=2075
Tom Rinif3c2f992022-06-25 19:29:46 -0400[diff] [blame]26CONFIG_SYS_BOOTM_LEN=0x8000000
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]27CONFIG_CMD_ENV_FLAGS=y
28# CONFIG_CMD_FLASH is not set
29CONFIG_CMD_MMC=y
30CONFIG_CMD_SPI=y
31CONFIG_CMD_USB=y
32# CONFIG_CMD_SETEXPR is not set
33CONFIG_CMD_DHCP=y
34CONFIG_CMD_PING=y
35CONFIG_CMD_CACHE=y
36CONFIG_CMD_EXT2=y
37CONFIG_CMD_EXT4=y
38CONFIG_CMD_EXT4_WRITE=y
39CONFIG_CMD_FAT=y
40CONFIG_OF_CONTROL=y
41CONFIG_OF_EMBED=y
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]42CONFIG_ENV_IS_IN_FAT=y
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]43CONFIG_ENV_FAT_DEVICE_AND_PART="0:1"
44CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rini5fb860c2022-02-25 11:19:48 -0500[diff] [blame]45CONFIG_USE_BOOTFILE=y
46CONFIG_BOOTFILE="uImage"
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]47CONFIG_NET_RANDOM_ETHADDR=y
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]48CONFIG_CLK_HSDK=y
49CONFIG_HSDK_CREG_GPIO=y
50CONFIG_MMC=y
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]51CONFIG_MMC_DW=y
52CONFIG_MMC_DW_SNPS=y
53CONFIG_MTD=y
54CONFIG_DM_SPI_FLASH=y
55CONFIG_SPI_FLASH_SST=y
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]56CONFIG_ETH_DESIGNWARE=y
57CONFIG_MII=y
58CONFIG_DM_RESET=y
59CONFIG_DM_SERIAL=y
60CONFIG_DEBUG_UART_SHIFT=2
61CONFIG_DEBUG_UART_ANNOUNCE=y
62CONFIG_SYS_NS16550=y
63CONFIG_SPI=y
64CONFIG_DM_SPI=y
65CONFIG_DESIGNWARE_SPI=y
66CONFIG_USB=y
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]67CONFIG_USB_EHCI_HCD=y
68CONFIG_USB_EHCI_GENERIC=y
69CONFIG_USB_OHCI_HCD=y
70CONFIG_USB_OHCI_GENERIC=y
Tom Rini112d2e02022-06-25 11:02:31 -0400[diff] [blame]71CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1
Eugeniy Paltseve87a5522020-04-22 00:33:40 +0300[diff] [blame]72CONFIG_USB_STORAGE=y
73CONFIG_USE_PRIVATE_LIBGCC=y
74CONFIG_PANIC_HANG=y