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Wadim Egorov6ee2d012017-06-19 12:36:40 +02001/*
2 * Device tree file for Phytec phyCORE-RK3288 SoM
3 * Copyright (C) 2017 PHYTEC Messtechnik GmbH
4 * Author: Wadim Egorov <w.egorov@phytec.de>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This file is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45#include <dt-bindings/net/ti-dp83867.h>
46#include "rk3288.dtsi"
47
48/ {
49 model = "Phytec RK3288 phyCORE";
50 compatible = "phytec,rk3288-phycore-som", "rockchip,rk3288";
51
52 /*
53 * Set the minimum memory size here and
54 * let the bootloader set the real size.
55 */
56 memory {
57 device_type = "memory";
58 reg = <0 0x8000000>;
59 };
60
61 aliases {
62 rtc0 = &i2c_rtc;
63 rtc1 = &rk818;
Wadim Egorovc8726842017-07-18 11:53:10 +020064 eeprom0 = &i2c_eeprom_id;
Wadim Egorov6ee2d012017-06-19 12:36:40 +020065 };
66
67 ext_gmac: external-gmac-clock {
68 compatible = "fixed-clock";
69 #clock-cells = <0>;
70 clock-frequency = <125000000>;
71 clock-output-names = "ext_gmac";
72 };
73
Wadim Egorov6ee2d012017-06-19 12:36:40 +020074 leds: user-leds {
75 compatible = "gpio-leds";
76 pinctrl-names = "default";
77 pinctrl-0 = <&user_led>;
78
79 user {
80 label = "green_led";
81 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
82 linux,default-trigger = "heartbeat";
83 default-state = "keep";
84 };
85 };
86
87 vdd_emmc_io: vdd-emmc-io {
88 compatible = "regulator-fixed";
89 regulator-name = "vdd_emmc_io";
90 regulator-min-microvolt = <1800000>;
91 regulator-max-microvolt = <1800000>;
92 vin-supply = <&vdd_3v3_io>;
93 };
94
95 vdd_in_otg_out: vdd-in-otg-out {
96 compatible = "regulator-fixed";
97 regulator-name = "vdd_in_otg_out";
98 regulator-always-on;
99 regulator-boot-on;
100 regulator-min-microvolt = <5000000>;
101 regulator-max-microvolt = <5000000>;
102 };
103
104 vdd_misc_1v8: vdd-misc-1v8 {
105 compatible = "regulator-fixed";
106 regulator-name = "vdd_misc_1v8";
107 regulator-always-on;
108 regulator-boot-on;
109 regulator-min-microvolt = <1800000>;
110 regulator-max-microvolt = <1800000>;
111 };
112};
113
114&cpu0 {
115 cpu0-supply = <&vdd_cpu>;
116 operating-points = <
117 /* KHz uV */
118 1800000 1400000
119 1608000 1350000
120 1512000 1300000
121 1416000 1200000
122 1200000 1100000
123 1008000 1050000
124 816000 1000000
125 696000 950000
126 600000 900000
127 408000 900000
128 312000 900000
129 216000 900000
130 126000 900000
131 >;
132};
133
134&emmc {
135 status = "okay";
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200136 bus-width = <8>;
137 cap-mmc-highspeed;
138 disable-wp;
139 non-removable;
140 num-slots = <1>;
141 pinctrl-names = "default";
142 pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
143 vmmc-supply = <&vdd_3v3_io>;
144 vqmmc-supply = <&vdd_emmc_io>;
145};
146
147&gmac {
148 assigned-clocks = <&cru SCLK_MAC>;
149 assigned-clock-parents = <&ext_gmac>;
150 clock_in_out = "input";
151 pinctrl-names = "default";
152 pinctrl-0 = <&rgmii_pins &phy_rst &phy_int>;
153 phy-handle = <&phy0>;
154 phy-supply = <&vdd_eth_2v5>;
155 phy-mode = "rgmii-id";
156 snps,reset-active-low;
157 snps,reset-delays-us = <0 10000 1000000>;
158 snps,reset-gpio = <&gpio4 8 GPIO_ACTIVE_HIGH>;
159 tx_delay = <0x0>;
160 rx_delay = <0x0>;
161
162 mdio0 {
163 compatible = "snps,dwmac-mdio";
164 #address-cells = <1>;
165 #size-cells = <0>;
166
167 phy0: ethernet-phy@0 {
168 compatible = "ethernet-phy-ieee802.3-c22";
169 reg = <0>;
170 interrupt-parent = <&gpio4>;
171 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
172 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
173 ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
174 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
175 enet-phy-lane-no-swap;
176 };
177 };
178};
179
180&hdmi {
181 ddc-i2c-bus = <&i2c5>;
182};
183
Johan Jonkera5b4bdb2023-03-15 19:31:57 +0100184&io_domains {
185 audio-supply = <&vdd_3v3_io>;
186 bb-supply = <&vdd_3v3_io>;
187 dvp-supply = <&vdd_3v3_io>;
188 flash0-supply = <&vdd_emmc_io>;
189 flash1-supply = <&vdd_misc_1v8>;
190 gpio1830-supply = <&vdd_3v3_io>;
191 gpio30-supply = <&vdd_3v3_io>;
192 lcdc-supply = <&vdd_3v3_io>;
193 sdcard-supply = <&vdd_io_sd>;
194 wifi-supply = <&vdd_3v3_io>;
195 status = "okay";
196};
197
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200198&i2c0 {
199 status = "okay";
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200200 clock-frequency = <400000>;
201
202 rk818: pmic@1c {
203 status = "okay";
204 compatible = "rockchip,rk818";
205 reg = <0x1c>;
206 interrupt-parent = <&gpio0>;
207 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
208 pinctrl-names = "default";
209 pinctrl-0 = <&pmic_int>;
210 rockchip,system-power-controller;
211 wakeup-source;
212 #clock-cells = <1>;
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200213
214 vcc1-supply = <&vdd_sys>;
215 vcc2-supply = <&vdd_sys>;
216 vcc3-supply = <&vdd_sys>;
217 vcc4-supply = <&vdd_sys>;
218 boost-supply = <&vdd_in_otg_out>;
219 vcc6-supply = <&vdd_sys>;
220 vcc7-supply = <&vdd_misc_1v8>;
221 vcc8-supply = <&vdd_misc_1v8>;
222 vcc9-supply = <&vdd_3v3_io>;
223 vddio-supply = <&vdd_3v3_io>;
224
225 regulators {
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200226 vdd_log: DCDC_REG1 {
227 regulator-name = "vdd_log";
228 regulator-always-on;
229 regulator-boot-on;
230 regulator-min-microvolt = <1100000>;
231 regulator-max-microvolt = <1100000>;
232 regulator-state-mem {
233 regulator-off-in-suspend;
234 };
235 };
236
237 vdd_gpu: DCDC_REG2 {
238 regulator-name = "vdd_gpu";
239 regulator-always-on;
240 regulator-boot-on;
241 regulator-min-microvolt = <800000>;
242 regulator-max-microvolt = <1250000>;
243 regulator-state-mem {
244 regulator-on-in-suspend;
245 regulator-suspend-microvolt = <1000000>;
246 };
247 };
248
249 vcc_ddr: DCDC_REG3 {
250 regulator-name = "vcc_ddr";
251 regulator-always-on;
252 regulator-boot-on;
253 regulator-state-mem {
254 regulator-on-in-suspend;
255 };
256 };
257
258 vdd_3v3_io: DCDC_REG4 {
259 regulator-name = "vdd_3v3_io";
260 regulator-always-on;
261 regulator-boot-on;
262 regulator-min-microvolt = <3300000>;
263 regulator-max-microvolt = <3300000>;
264 regulator-state-mem {
265 regulator-on-in-suspend;
266 regulator-suspend-microvolt = <3300000>;
267 };
268 };
269
270 vdd_sys: DCDC_BOOST {
271 regulator-name = "vdd_sys";
272 regulator-always-on;
273 regulator-boot-on;
274 regulator-min-microvolt = <5000000>;
275 regulator-max-microvolt = <5000000>;
276 regulator-state-mem {
277 regulator-on-in-suspend;
278 regulator-suspend-microvolt = <5000000>;
279 };
280 };
281
282 /* vcc9 */
283 vdd_sd: SWITCH_REG {
284 regulator-name = "vdd_sd";
285 regulator-always-on;
286 regulator-boot-on;
287 regulator-state-mem {
288 regulator-off-in-suspend;
289 };
290 };
291
292 /* vcc6 */
293 vdd_eth_2v5: LDO_REG2 {
294 regulator-name = "vdd_eth_2v5";
295 regulator-always-on;
296 regulator-boot-on;
297 regulator-min-microvolt = <2500000>;
298 regulator-max-microvolt = <2500000>;
299 regulator-state-mem {
300 regulator-on-in-suspend;
301 regulator-suspend-microvolt = <2500000>;
302 };
303 };
304
305 /* vcc7 */
306 vdd_1v0: LDO_REG3 {
307 regulator-name = "vdd_1v0";
308 regulator-always-on;
309 regulator-boot-on;
310 regulator-min-microvolt = <1000000>;
311 regulator-max-microvolt = <1000000>;
312 regulator-state-mem {
313 regulator-on-in-suspend;
314 regulator-suspend-microvolt = <1000000>;
315 };
316 };
317
318 /* vcc8 */
319 vdd_1v8_lcd_ldo: LDO_REG4 {
320 regulator-name = "vdd_1v8_lcd_ldo";
321 regulator-always-on;
322 regulator-boot-on;
323 regulator-min-microvolt = <1800000>;
324 regulator-max-microvolt = <1800000>;
325 regulator-state-mem {
326 regulator-on-in-suspend;
327 regulator-suspend-microvolt = <1800000>;
328 };
329 };
330
331 /* vcc8 */
332 vdd_1v0_lcd: LDO_REG6 {
333 regulator-name = "vdd_1v0_lcd";
334 regulator-always-on;
335 regulator-boot-on;
336 regulator-min-microvolt = <1000000>;
337 regulator-max-microvolt = <1000000>;
338 regulator-state-mem {
339 regulator-on-in-suspend;
340 regulator-suspend-microvolt = <1000000>;
341 };
342 };
343
344 /* vcc7 */
345 vdd_1v8_ldo: LDO_REG7 {
346 regulator-name = "vdd_1v8_ldo";
347 regulator-always-on;
348 regulator-boot-on;
349 regulator-min-microvolt = <1800000>;
350 regulator-max-microvolt = <1800000>;
351 regulator-state-mem {
352 regulator-off-in-suspend;
353 regulator-suspend-microvolt = <1800000>;
354 };
355 };
356
357 /* vcc9 */
358 vdd_io_sd: LDO_REG9 {
359 regulator-name = "vdd_io_sd";
360 regulator-always-on;
361 regulator-boot-on;
362 regulator-min-microvolt = <3300000>;
363 regulator-max-microvolt = <3300000>;
364 regulator-state-mem {
365 regulator-on-in-suspend;
366 regulator-suspend-microvolt = <3300000>;
367 };
368 };
369 };
370 };
371
372 /* M24C32-D */
373 i2c_eeprom: eeprom@50 {
374 compatible = "atmel,24c32";
375 reg = <0x50>;
376 pagesize = <32>;
377 };
378
Wadim Egorovc8726842017-07-18 11:53:10 +0200379 /* M24C32-D Identification page */
380 i2c_eeprom_id: eeprom@58 {
381 compatible = "atmel,24c32";
382 reg = <0x58>;
383 pagesize = <32>;
384 };
385
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200386 vdd_cpu: regulator@60 {
387 compatible = "fcs,fan53555";
388 reg = <0x60>;
389 fcs,suspend-voltage-selector = <1>;
390 regulator-always-on;
391 regulator-boot-on;
392 regulator-enable-ramp-delay = <300>;
393 regulator-name = "vdd_cpu";
394 regulator-min-microvolt = <800000>;
395 regulator-max-microvolt = <1430000>;
396 regulator-ramp-delay = <8000>;
397 vin-supply = <&vdd_sys>;
398 };
399};
400
401&pinctrl {
402 pcfg_output_high: pcfg-output-high {
403 output-high;
404 };
405
406 emmc {
407 /*
408 * We run eMMC at max speed; bump up drive strength.
409 * We also have external pulls, so disable the internal ones.
410 */
411 emmc_clk: emmc-clk {
412 rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_12ma>;
413 };
414
415 emmc_cmd: emmc-cmd {
416 rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_12ma>;
417 };
418
419 emmc_bus8: emmc-bus8 {
420 rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_12ma>,
421 <3 1 RK_FUNC_2 &pcfg_pull_none_12ma>,
422 <3 2 RK_FUNC_2 &pcfg_pull_none_12ma>,
423 <3 3 RK_FUNC_2 &pcfg_pull_none_12ma>,
424 <3 4 RK_FUNC_2 &pcfg_pull_none_12ma>,
425 <3 5 RK_FUNC_2 &pcfg_pull_none_12ma>,
426 <3 6 RK_FUNC_2 &pcfg_pull_none_12ma>,
427 <3 7 RK_FUNC_2 &pcfg_pull_none_12ma>;
428 };
429 };
430
431 gmac {
432 phy_int: phy-int {
433 rockchip,pins = <4 2 RK_FUNC_GPIO &pcfg_pull_up>;
434 };
435
436 phy_rst: phy-rst {
437 rockchip,pins = <4 8 RK_FUNC_GPIO &pcfg_output_high>;
438 };
439 };
440
441 leds {
442 user_led: user-led {
443 rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_output_high>;
444 };
445 };
446
447 pmic {
448 pmic_int: pmic-int {
449 rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
450 };
451
452 /* Pin for switching state between sleep and non-sleep state */
453 pmic_sleep: pmic-sleep {
454 rockchip,pins = <RK_GPIO0 0 RK_FUNC_GPIO &pcfg_pull_up>;
455 };
456 };
457};
458
459&pwm1 {
460 status = "okay";
461};
462
463&saradc {
464 status = "okay";
465 vref-supply = <&vdd_1v8_ldo>;
466};
467
468&spi2 {
469 status = "okay";
470
471 serial_flash: flash@0 {
472 compatible = "micron,n25q128a13", "jedec,spi-nor";
473 reg = <0x0>;
474 spi-max-frequency = <50000000>;
475 m25p,fast-read;
476 #address-cells = <1>;
477 #size-cells = <1>;
478 status = "okay";
479 };
480};
481
482&tsadc {
483 status = "okay";
484 rockchip,hw-tshut-mode = <0>;
485 rockchip,hw-tshut-polarity = <0>;
486};
487
488&vopb {
489 status = "okay";
490};
491
492&vopb_mmu {
493 status = "okay";
494};
495
496&vopl {
497 status = "okay";
498};
499
500&vopl_mmu {
501 status = "okay";
502};
503
504&wdt {
505 status = "okay";
506};