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git01.mediatek.com / filogic / uboot / ce13285761890238af90ab29bc59d1803eb7e7f2 / . / arch / arm / dts / r8a779a0.dtsi
blob: 4e67a03564971b89a5b2fb7564b2eb93aa549819 [file] [log] [blame]
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC
4 *
5 * Copyright (C) 2020 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/power/r8a779a0-sysc.h>
11
12/ {
13 compatible = "renesas,r8a779a0";
14 #address-cells = <2>;
15 #size-cells = <2>;
16
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]17 /* External CAN clock - to be overridden by boards that provide it */
18 can_clk: can {
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
21 clock-frequency = <0>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]22 };
23
24 cpus {
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 a76_0: cpu@0 {
29 compatible = "arm,cortex-a76";
30 reg = <0>;
31 device_type = "cpu";
32 power-domains = <&sysc R8A779A0_PD_A1E0D0C0>;
33 next-level-cache = <&L3_CA76_0>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]34 clocks = <&cpg CPG_CORE R8A779A0_CLK_Z0>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]35 };
36
37 L3_CA76_0: cache-controller-0 {
38 compatible = "cache";
39 power-domains = <&sysc R8A779A0_PD_A2E0D0>;
40 cache-unified;
41 cache-level = <3>;
42 };
43 };
44
45 extal_clk: extal {
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
48 /* This value must be overridden by the board */
49 clock-frequency = <0>;
50 };
51
52 extalr_clk: extalr {
53 compatible = "fixed-clock";
54 #clock-cells = <0>;
55 /* This value must be overridden by the board */
56 clock-frequency = <0>;
57 };
58
59 pmu_a76 {
60 compatible = "arm,cortex-a76-pmu";
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]61 interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]62 };
63
64 /* External SCIF clock - to be overridden by boards that provide it */
65 scif_clk: scif {
66 compatible = "fixed-clock";
67 #clock-cells = <0>;
68 clock-frequency = <0>;
69 };
70
71 soc: soc {
72 compatible = "simple-bus";
73 interrupt-parent = <&gic>;
74 #address-cells = <2>;
75 #size-cells = <2>;
76 ranges;
77
78 rwdt: watchdog@e6020000 {
79 compatible = "renesas,r8a779a0-wdt",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]80 "renesas,rcar-gen4-wdt";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]81 reg = <0 0xe6020000 0 0x0c>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]82 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]83 clocks = <&cpg CPG_MOD 907>;
84 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
85 resets = <&cpg 907>;
86 status = "disabled";
87 };
88
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]89 pfc: pinctrl@e6050000 {
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]90 compatible = "renesas,pfc-r8a779a0";
91 reg = <0 0xe6050000 0 0x16c>, <0 0xe6050800 0 0x16c>,
92 <0 0xe6058000 0 0x16c>, <0 0xe6058800 0 0x16c>,
93 <0 0xe6060000 0 0x16c>, <0 0xe6060800 0 0x16c>,
94 <0 0xe6068000 0 0x16c>, <0 0xe6068800 0 0x16c>,
95 <0 0xe6069000 0 0x16c>, <0 0xe6069800 0 0x16c>;
96 };
97
98 gpio0: gpio@e6058180 {
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]99 compatible = "renesas,gpio-r8a779a0",
100 "renesas,rcar-gen4-gpio";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]101 reg = <0 0xe6058180 0 0x54>;
102 interrupts = <GIC_SPI 832 IRQ_TYPE_LEVEL_HIGH>;
103 clocks = <&cpg CPG_MOD 916>;
104 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]105 resets = <&cpg 916>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]106 gpio-controller;
107 #gpio-cells = <2>;
108 gpio-ranges = <&pfc 0 0 28>;
109 interrupt-controller;
110 #interrupt-cells = <2>;
111 };
112
113 gpio1: gpio@e6050180 {
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]114 compatible = "renesas,gpio-r8a779a0",
115 "renesas,rcar-gen4-gpio";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]116 reg = <0 0xe6050180 0 0x54>;
117 interrupts = <GIC_SPI 836 IRQ_TYPE_LEVEL_HIGH>;
118 clocks = <&cpg CPG_MOD 915>;
119 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]120 resets = <&cpg 915>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]121 gpio-controller;
122 #gpio-cells = <2>;
123 gpio-ranges = <&pfc 0 32 31>;
124 interrupt-controller;
125 #interrupt-cells = <2>;
126 };
127
128 gpio2: gpio@e6050980 {
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]129 compatible = "renesas,gpio-r8a779a0",
130 "renesas,rcar-gen4-gpio";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]131 reg = <0 0xe6050980 0 0x54>;
132 interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
133 clocks = <&cpg CPG_MOD 915>;
134 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]135 resets = <&cpg 915>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]136 gpio-controller;
137 #gpio-cells = <2>;
138 gpio-ranges = <&pfc 0 64 25>;
139 interrupt-controller;
140 #interrupt-cells = <2>;
141 };
142
143 gpio3: gpio@e6058980 {
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]144 compatible = "renesas,gpio-r8a779a0",
145 "renesas,rcar-gen4-gpio";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]146 reg = <0 0xe6058980 0 0x54>;
147 interrupts = <GIC_SPI 844 IRQ_TYPE_LEVEL_HIGH>;
148 clocks = <&cpg CPG_MOD 916>;
149 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]150 resets = <&cpg 916>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]151 gpio-controller;
152 #gpio-cells = <2>;
153 gpio-ranges = <&pfc 0 96 17>;
154 interrupt-controller;
155 #interrupt-cells = <2>;
156 };
157
158 gpio4: gpio@e6060180 {
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]159 compatible = "renesas,gpio-r8a779a0",
160 "renesas,rcar-gen4-gpio";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]161 reg = <0 0xe6060180 0 0x54>;
162 interrupts = <GIC_SPI 848 IRQ_TYPE_LEVEL_HIGH>;
163 clocks = <&cpg CPG_MOD 917>;
164 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]165 resets = <&cpg 917>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]166 gpio-controller;
167 #gpio-cells = <2>;
168 gpio-ranges = <&pfc 0 128 27>;
169 interrupt-controller;
170 #interrupt-cells = <2>;
171 };
172
173 gpio5: gpio@e6060980 {
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]174 compatible = "renesas,gpio-r8a779a0",
175 "renesas,rcar-gen4-gpio";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]176 reg = <0 0xe6060980 0 0x54>;
177 interrupts = <GIC_SPI 852 IRQ_TYPE_LEVEL_HIGH>;
178 clocks = <&cpg CPG_MOD 917>;
179 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]180 resets = <&cpg 917>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]181 gpio-controller;
182 #gpio-cells = <2>;
183 gpio-ranges = <&pfc 0 160 21>;
184 interrupt-controller;
185 #interrupt-cells = <2>;
186 };
187
188 gpio6: gpio@e6068180 {
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]189 compatible = "renesas,gpio-r8a779a0",
190 "renesas,rcar-gen4-gpio";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]191 reg = <0 0xe6068180 0 0x54>;
192 interrupts = <GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>;
193 clocks = <&cpg CPG_MOD 918>;
194 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]195 resets = <&cpg 918>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]196 gpio-controller;
197 #gpio-cells = <2>;
198 gpio-ranges = <&pfc 0 192 21>;
199 interrupt-controller;
200 #interrupt-cells = <2>;
201 };
202
203 gpio7: gpio@e6068980 {
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]204 compatible = "renesas,gpio-r8a779a0",
205 "renesas,rcar-gen4-gpio";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]206 reg = <0 0xe6068980 0 0x54>;
207 interrupts = <GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>;
208 clocks = <&cpg CPG_MOD 918>;
209 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]210 resets = <&cpg 918>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]211 gpio-controller;
212 #gpio-cells = <2>;
213 gpio-ranges = <&pfc 0 224 21>;
214 interrupt-controller;
215 #interrupt-cells = <2>;
216 };
217
218 gpio8: gpio@e6069180 {
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]219 compatible = "renesas,gpio-r8a779a0",
220 "renesas,rcar-gen4-gpio";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]221 reg = <0 0xe6069180 0 0x54>;
222 interrupts = <GIC_SPI 864 IRQ_TYPE_LEVEL_HIGH>;
223 clocks = <&cpg CPG_MOD 918>;
224 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]225 resets = <&cpg 918>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]226 gpio-controller;
227 #gpio-cells = <2>;
228 gpio-ranges = <&pfc 0 256 21>;
229 interrupt-controller;
230 #interrupt-cells = <2>;
231 };
232
233 gpio9: gpio@e6069980 {
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]234 compatible = "renesas,gpio-r8a779a0",
235 "renesas,rcar-gen4-gpio";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]236 reg = <0 0xe6069980 0 0x54>;
237 interrupts = <GIC_SPI 868 IRQ_TYPE_LEVEL_HIGH>;
238 clocks = <&cpg CPG_MOD 918>;
239 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]240 resets = <&cpg 918>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]241 gpio-controller;
242 #gpio-cells = <2>;
243 gpio-ranges = <&pfc 0 288 21>;
244 interrupt-controller;
245 #interrupt-cells = <2>;
246 };
247
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]248 cmt0: timer@e60f0000 {
249 compatible = "renesas,r8a779a0-cmt0",
250 "renesas,rcar-gen4-cmt0";
251 reg = <0 0xe60f0000 0 0x1004>;
252 interrupts = <GIC_SPI 500 IRQ_TYPE_LEVEL_HIGH>,
253 <GIC_SPI 501 IRQ_TYPE_LEVEL_HIGH>;
254 clocks = <&cpg CPG_MOD 910>;
255 clock-names = "fck";
256 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
257 resets = <&cpg 910>;
258 status = "disabled";
259 };
260
261 cmt1: timer@e6130000 {
262 compatible = "renesas,r8a779a0-cmt1",
263 "renesas,rcar-gen4-cmt1";
264 reg = <0 0xe6130000 0 0x1004>;
265 interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
266 <GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
267 <GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
268 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
269 <GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
270 <GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
271 <GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
272 <GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>;
273 clocks = <&cpg CPG_MOD 911>;
274 clock-names = "fck";
275 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
276 resets = <&cpg 911>;
277 status = "disabled";
278 };
279
280 cmt2: timer@e6140000 {
281 compatible = "renesas,r8a779a0-cmt1",
282 "renesas,rcar-gen4-cmt1";
283 reg = <0 0xe6140000 0 0x1004>;
284 interrupts = <GIC_SPI 456 IRQ_TYPE_LEVEL_HIGH>,
285 <GIC_SPI 457 IRQ_TYPE_LEVEL_HIGH>,
286 <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
287 <GIC_SPI 459 IRQ_TYPE_LEVEL_HIGH>,
288 <GIC_SPI 460 IRQ_TYPE_LEVEL_HIGH>,
289 <GIC_SPI 461 IRQ_TYPE_LEVEL_HIGH>,
290 <GIC_SPI 462 IRQ_TYPE_LEVEL_HIGH>,
291 <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH>;
292 clocks = <&cpg CPG_MOD 912>;
293 clock-names = "fck";
294 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
295 resets = <&cpg 912>;
296 status = "disabled";
297 };
298
299 cmt3: timer@e6148000 {
300 compatible = "renesas,r8a779a0-cmt1",
301 "renesas,rcar-gen4-cmt1";
302 reg = <0 0xe6148000 0 0x1004>;
303 interrupts = <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
304 <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
305 <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
306 <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
307 <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
308 <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
309 <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
310 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>;
311 clocks = <&cpg CPG_MOD 913>;
312 clock-names = "fck";
313 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
314 resets = <&cpg 913>;
315 status = "disabled";
316 };
317
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]318 cpg: clock-controller@e6150000 {
319 compatible = "renesas,r8a779a0-cpg-mssr";
320 reg = <0 0xe6150000 0 0x4000>;
321 clocks = <&extal_clk>, <&extalr_clk>;
322 clock-names = "extal", "extalr";
323 #clock-cells = <2>;
324 #power-domain-cells = <0>;
325 #reset-cells = <1>;
326 };
327
328 rst: reset-controller@e6160000 {
329 compatible = "renesas,r8a779a0-rst";
330 reg = <0 0xe6160000 0 0x4000>;
331 };
332
333 sysc: system-controller@e6180000 {
334 compatible = "renesas,r8a779a0-sysc";
335 reg = <0 0xe6180000 0 0x4000>;
336 #power-domain-cells = <1>;
337 };
338
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]339 tsc: thermal@e6190000 {
340 compatible = "renesas,r8a779a0-thermal";
341 reg = <0 0xe6190000 0 0x200>,
342 <0 0xe6198000 0 0x200>,
343 <0 0xe61a0000 0 0x200>,
344 <0 0xe61a8000 0 0x200>,
345 <0 0xe61b0000 0 0x200>;
346 clocks = <&cpg CPG_MOD 919>;
347 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
348 resets = <&cpg 919>;
349 #thermal-sensor-cells = <1>;
350 };
351
352 intc_ex: interrupt-controller@e61c0000 {
353 compatible = "renesas,intc-ex-r8a779a0", "renesas,irqc";
354 #interrupt-cells = <2>;
355 interrupt-controller;
356 reg = <0 0xe61c0000 0 0x200>;
357 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
358 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
359 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
360 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
361 <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
362 <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
363 clocks = <&cpg CPG_CORE R8A779A0_CLK_CP>;
364 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
365 };
366
367 tmu0: timer@e61e0000 {
368 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
369 reg = <0 0xe61e0000 0 0x30>;
370 interrupts = <GIC_SPI 512 IRQ_TYPE_LEVEL_HIGH>,
371 <GIC_SPI 513 IRQ_TYPE_LEVEL_HIGH>,
372 <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
373 clocks = <&cpg CPG_MOD 713>;
374 clock-names = "fck";
375 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
376 resets = <&cpg 713>;
377 status = "disabled";
378 };
379
380 tmu1: timer@e6fc0000 {
381 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
382 reg = <0 0xe6fc0000 0 0x30>;
383 interrupts = <GIC_SPI 504 IRQ_TYPE_LEVEL_HIGH>,
384 <GIC_SPI 505 IRQ_TYPE_LEVEL_HIGH>,
385 <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
386 clocks = <&cpg CPG_MOD 714>;
387 clock-names = "fck";
388 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
389 resets = <&cpg 714>;
390 status = "disabled";
391 };
392
393 tmu2: timer@e6fd0000 {
394 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
395 reg = <0 0xe6fd0000 0 0x30>;
396 interrupts = <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>,
397 <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>,
398 <GIC_SPI 510 IRQ_TYPE_LEVEL_HIGH>;
399 clocks = <&cpg CPG_MOD 715>;
400 clock-names = "fck";
401 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
402 resets = <&cpg 715>;
403 status = "disabled";
404 };
405
406 tmu3: timer@e6fe0000 {
407 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
408 reg = <0 0xe6fe0000 0 0x30>;
409 interrupts = <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
410 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
411 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>;
412 clocks = <&cpg CPG_MOD 716>;
413 clock-names = "fck";
414 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
415 resets = <&cpg 716>;
416 status = "disabled";
417 };
418
419 tmu4: timer@ffc00000 {
420 compatible = "renesas,tmu-r8a779a0", "renesas,tmu";
421 reg = <0 0xffc00000 0 0x30>;
422 interrupts = <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
423 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
424 <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>;
425 clocks = <&cpg CPG_MOD 717>;
426 clock-names = "fck";
427 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
428 resets = <&cpg 717>;
429 status = "disabled";
430 };
431
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]432 i2c0: i2c@e6500000 {
433 compatible = "renesas,i2c-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]434 "renesas,rcar-gen4-i2c";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]435 reg = <0 0xe6500000 0 0x40>;
436 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
437 clocks = <&cpg CPG_MOD 518>;
438 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
439 resets = <&cpg 518>;
440 dmas = <&dmac1 0x91>, <&dmac1 0x90>;
441 dma-names = "tx", "rx";
442 i2c-scl-internal-delay-ns = <110>;
443 #address-cells = <1>;
444 #size-cells = <0>;
445 status = "disabled";
446 };
447
448 i2c1: i2c@e6508000 {
449 compatible = "renesas,i2c-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]450 "renesas,rcar-gen4-i2c";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]451 reg = <0 0xe6508000 0 0x40>;
452 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
453 clocks = <&cpg CPG_MOD 519>;
454 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
455 resets = <&cpg 519>;
456 dmas = <&dmac1 0x93>, <&dmac1 0x92>;
457 dma-names = "tx", "rx";
458 i2c-scl-internal-delay-ns = <110>;
459 #address-cells = <1>;
460 #size-cells = <0>;
461 status = "disabled";
462 };
463
464 i2c2: i2c@e6510000 {
465 compatible = "renesas,i2c-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]466 "renesas,rcar-gen4-i2c";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]467 reg = <0 0xe6510000 0 0x40>;
468 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
469 clocks = <&cpg CPG_MOD 520>;
470 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
471 resets = <&cpg 520>;
472 dmas = <&dmac1 0x95>, <&dmac1 0x94>;
473 dma-names = "tx", "rx";
474 i2c-scl-internal-delay-ns = <110>;
475 #address-cells = <1>;
476 #size-cells = <0>;
477 status = "disabled";
478 };
479
480 i2c3: i2c@e66d0000 {
481 compatible = "renesas,i2c-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]482 "renesas,rcar-gen4-i2c";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]483 reg = <0 0xe66d0000 0 0x40>;
484 interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
485 clocks = <&cpg CPG_MOD 521>;
486 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
487 resets = <&cpg 521>;
488 dmas = <&dmac1 0x97>, <&dmac1 0x96>;
489 dma-names = "tx", "rx";
490 i2c-scl-internal-delay-ns = <110>;
491 #address-cells = <1>;
492 #size-cells = <0>;
493 status = "disabled";
494 };
495
496 i2c4: i2c@e66d8000 {
497 compatible = "renesas,i2c-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]498 "renesas,rcar-gen4-i2c";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]499 reg = <0 0xe66d8000 0 0x40>;
500 interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
501 clocks = <&cpg CPG_MOD 522>;
502 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
503 resets = <&cpg 522>;
504 dmas = <&dmac1 0x99>, <&dmac1 0x98>;
505 dma-names = "tx", "rx";
506 i2c-scl-internal-delay-ns = <110>;
507 #address-cells = <1>;
508 #size-cells = <0>;
509 status = "disabled";
510 };
511
512 i2c5: i2c@e66e0000 {
513 compatible = "renesas,i2c-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]514 "renesas,rcar-gen4-i2c";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]515 reg = <0 0xe66e0000 0 0x40>;
516 interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
517 clocks = <&cpg CPG_MOD 523>;
518 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
519 resets = <&cpg 523>;
520 dmas = <&dmac1 0x9b>, <&dmac1 0x9a>;
521 dma-names = "tx", "rx";
522 i2c-scl-internal-delay-ns = <110>;
523 #address-cells = <1>;
524 #size-cells = <0>;
525 status = "disabled";
526 };
527
528 i2c6: i2c@e66e8000 {
529 compatible = "renesas,i2c-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]530 "renesas,rcar-gen4-i2c";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]531 reg = <0 0xe66e8000 0 0x40>;
532 interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
533 clocks = <&cpg CPG_MOD 524>;
534 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
535 resets = <&cpg 524>;
536 dmas = <&dmac1 0x9d>, <&dmac1 0x9c>;
537 dma-names = "tx", "rx";
538 i2c-scl-internal-delay-ns = <110>;
539 #address-cells = <1>;
540 #size-cells = <0>;
541 status = "disabled";
542 };
543
544 hscif0: serial@e6540000 {
545 compatible = "renesas,hscif-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]546 "renesas,rcar-gen4-hscif", "renesas,hscif";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]547 reg = <0 0xe6540000 0 0x60>;
548 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
549 clocks = <&cpg CPG_MOD 514>,
550 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
551 <&scif_clk>;
552 clock-names = "fck", "brg_int", "scif_clk";
553 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
554 dma-names = "tx", "rx";
555 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
556 resets = <&cpg 514>;
557 status = "disabled";
558 };
559
560 hscif1: serial@e6550000 {
561 compatible = "renesas,hscif-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]562 "renesas,rcar-gen4-hscif", "renesas,hscif";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]563 reg = <0 0xe6550000 0 0x60>;
564 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
565 clocks = <&cpg CPG_MOD 515>,
566 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
567 <&scif_clk>;
568 clock-names = "fck", "brg_int", "scif_clk";
569 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
570 dma-names = "tx", "rx";
571 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
572 resets = <&cpg 515>;
573 status = "disabled";
574 };
575
576 hscif2: serial@e6560000 {
577 compatible = "renesas,hscif-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]578 "renesas,rcar-gen4-hscif", "renesas,hscif";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]579 reg = <0 0xe6560000 0 0x60>;
580 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
581 clocks = <&cpg CPG_MOD 516>,
582 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
583 <&scif_clk>;
584 clock-names = "fck", "brg_int", "scif_clk";
585 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
586 dma-names = "tx", "rx";
587 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
588 resets = <&cpg 516>;
589 status = "disabled";
590 };
591
592 hscif3: serial@e66a0000 {
593 compatible = "renesas,hscif-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]594 "renesas,rcar-gen4-hscif", "renesas,hscif";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]595 reg = <0 0xe66a0000 0 0x60>;
596 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
597 clocks = <&cpg CPG_MOD 517>,
598 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
599 <&scif_clk>;
600 clock-names = "fck", "brg_int", "scif_clk";
601 dmas = <&dmac1 0x37>, <&dmac1 0x36>;
602 dma-names = "tx", "rx";
603 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
604 resets = <&cpg 517>;
605 status = "disabled";
606 };
607
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]608 canfd: can@e6660000 {
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]609 compatible = "renesas,r8a779a0-canfd",
610 "renesas,rcar-gen4-canfd";
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]611 reg = <0 0xe6660000 0 0x8000>;
612 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
613 <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
614 interrupt-names = "ch_int", "g_int";
615 clocks = <&cpg CPG_MOD 328>,
616 <&cpg CPG_CORE R8A779A0_CLK_CANFD>,
617 <&can_clk>;
618 clock-names = "fck", "canfd", "can_clk";
619 assigned-clocks = <&cpg CPG_CORE R8A779A0_CLK_CANFD>;
620 assigned-clock-rates = <80000000>;
621 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
622 resets = <&cpg 328>;
623 status = "disabled";
624
625 channel0 {
626 status = "disabled";
627 };
628
629 channel1 {
630 status = "disabled";
631 };
632
633 channel2 {
634 status = "disabled";
635 };
636
637 channel3 {
638 status = "disabled";
639 };
640
641 channel4 {
642 status = "disabled";
643 };
644
645 channel5 {
646 status = "disabled";
647 };
648
649 channel6 {
650 status = "disabled";
651 };
652
653 channel7 {
654 status = "disabled";
655 };
656 };
657
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]658 avb0: ethernet@e6800000 {
659 compatible = "renesas,etheravb-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]660 "renesas,etheravb-rcar-gen4";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]661 reg = <0 0xe6800000 0 0x800>;
662 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
663 <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
664 <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
665 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
666 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
667 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
668 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
669 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
670 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
671 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
672 <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
673 <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
674 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
675 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
676 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>,
677 <GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH>,
678 <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>,
679 <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
680 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
681 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
682 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
683 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
684 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
685 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
686 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
687 interrupt-names = "ch0", "ch1", "ch2", "ch3",
688 "ch4", "ch5", "ch6", "ch7",
689 "ch8", "ch9", "ch10", "ch11",
690 "ch12", "ch13", "ch14", "ch15",
691 "ch16", "ch17", "ch18", "ch19",
692 "ch20", "ch21", "ch22", "ch23",
693 "ch24";
694 clocks = <&cpg CPG_MOD 211>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]695 clock-names = "fck";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]696 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
697 resets = <&cpg 211>;
698 phy-mode = "rgmii";
699 rx-internal-delay-ps = <0>;
700 tx-internal-delay-ps = <0>;
701 #address-cells = <1>;
702 #size-cells = <0>;
703 status = "disabled";
704 };
705
706 avb1: ethernet@e6810000 {
707 compatible = "renesas,etheravb-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]708 "renesas,etheravb-rcar-gen4";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]709 reg = <0 0xe6810000 0 0x800>;
710 interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
711 <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
712 <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
713 <GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
714 <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>,
715 <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>,
716 <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>,
717 <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>,
718 <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
719 <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
720 <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>,
721 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
722 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
723 <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
724 <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
725 <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
726 <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
727 <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
728 <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
729 <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
730 <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
731 <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
732 <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
733 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
734 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
735 interrupt-names = "ch0", "ch1", "ch2", "ch3",
736 "ch4", "ch5", "ch6", "ch7",
737 "ch8", "ch9", "ch10", "ch11",
738 "ch12", "ch13", "ch14", "ch15",
739 "ch16", "ch17", "ch18", "ch19",
740 "ch20", "ch21", "ch22", "ch23",
741 "ch24";
742 clocks = <&cpg CPG_MOD 212>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]743 clock-names = "fck";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]744 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
745 resets = <&cpg 212>;
746 phy-mode = "rgmii";
747 rx-internal-delay-ps = <0>;
748 tx-internal-delay-ps = <0>;
749 #address-cells = <1>;
750 #size-cells = <0>;
751 status = "disabled";
752 };
753
754 avb2: ethernet@e6820000 {
755 compatible = "renesas,etheravb-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]756 "renesas,etheravb-rcar-gen4";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]757 reg = <0 0xe6820000 0 0x1000>;
758 interrupts = <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
759 <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
760 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
761 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
762 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
763 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
764 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
765 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
766 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
767 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
768 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
769 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
770 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
771 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
772 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
773 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
774 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
775 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
776 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
777 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
778 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
779 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
780 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
781 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
782 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>;
783 interrupt-names = "ch0", "ch1", "ch2", "ch3",
784 "ch4", "ch5", "ch6", "ch7",
785 "ch8", "ch9", "ch10", "ch11",
786 "ch12", "ch13", "ch14", "ch15",
787 "ch16", "ch17", "ch18", "ch19",
788 "ch20", "ch21", "ch22", "ch23",
789 "ch24";
790 clocks = <&cpg CPG_MOD 213>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]791 clock-names = "fck";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]792 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
793 resets = <&cpg 213>;
794 phy-mode = "rgmii";
795 rx-internal-delay-ps = <0>;
796 tx-internal-delay-ps = <0>;
797 #address-cells = <1>;
798 #size-cells = <0>;
799 status = "disabled";
800 };
801
802 avb3: ethernet@e6830000 {
803 compatible = "renesas,etheravb-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]804 "renesas,etheravb-rcar-gen4";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]805 reg = <0 0xe6830000 0 0x1000>;
806 interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
807 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
808 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
809 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
810 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
813 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
814 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
815 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
816 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
817 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
818 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
819 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
820 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
821 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
822 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
823 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
824 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
825 <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
826 <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
827 <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>,
828 <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
829 <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
830 <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
831 interrupt-names = "ch0", "ch1", "ch2", "ch3",
832 "ch4", "ch5", "ch6", "ch7",
833 "ch8", "ch9", "ch10", "ch11",
834 "ch12", "ch13", "ch14", "ch15",
835 "ch16", "ch17", "ch18", "ch19",
836 "ch20", "ch21", "ch22", "ch23",
837 "ch24";
838 clocks = <&cpg CPG_MOD 214>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]839 clock-names = "fck";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]840 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
841 resets = <&cpg 214>;
842 phy-mode = "rgmii";
843 rx-internal-delay-ps = <0>;
844 tx-internal-delay-ps = <0>;
845 #address-cells = <1>;
846 #size-cells = <0>;
847 status = "disabled";
848 };
849
850 avb4: ethernet@e6840000 {
851 compatible = "renesas,etheravb-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]852 "renesas,etheravb-rcar-gen4";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]853 reg = <0 0xe6840000 0 0x1000>;
854 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
855 <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
856 <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
857 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
858 <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>,
859 <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
860 <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
861 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
862 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
863 <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
864 <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
865 <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
866 <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>,
867 <GIC_SPI 369 IRQ_TYPE_LEVEL_HIGH>,
868 <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>,
869 <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>,
870 <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>,
871 <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>,
872 <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>,
873 <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>,
874 <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>,
875 <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>,
876 <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>,
877 <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>,
878 <GIC_SPI 380 IRQ_TYPE_LEVEL_HIGH>;
879 interrupt-names = "ch0", "ch1", "ch2", "ch3",
880 "ch4", "ch5", "ch6", "ch7",
881 "ch8", "ch9", "ch10", "ch11",
882 "ch12", "ch13", "ch14", "ch15",
883 "ch16", "ch17", "ch18", "ch19",
884 "ch20", "ch21", "ch22", "ch23",
885 "ch24";
886 clocks = <&cpg CPG_MOD 215>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]887 clock-names = "fck";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]888 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
889 resets = <&cpg 215>;
890 phy-mode = "rgmii";
891 rx-internal-delay-ps = <0>;
892 tx-internal-delay-ps = <0>;
893 #address-cells = <1>;
894 #size-cells = <0>;
895 status = "disabled";
896 };
897
898 avb5: ethernet@e6850000 {
899 compatible = "renesas,etheravb-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]900 "renesas,etheravb-rcar-gen4";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]901 reg = <0 0xe6850000 0 0x1000>;
902 interrupts = <GIC_SPI 381 IRQ_TYPE_LEVEL_HIGH>,
903 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
904 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>,
905 <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
906 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>,
907 <GIC_SPI 386 IRQ_TYPE_LEVEL_HIGH>,
908 <GIC_SPI 387 IRQ_TYPE_LEVEL_HIGH>,
909 <GIC_SPI 388 IRQ_TYPE_LEVEL_HIGH>,
910 <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>,
911 <GIC_SPI 390 IRQ_TYPE_LEVEL_HIGH>,
912 <GIC_SPI 391 IRQ_TYPE_LEVEL_HIGH>,
913 <GIC_SPI 392 IRQ_TYPE_LEVEL_HIGH>,
914 <GIC_SPI 393 IRQ_TYPE_LEVEL_HIGH>,
915 <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH>,
916 <GIC_SPI 395 IRQ_TYPE_LEVEL_HIGH>,
917 <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>,
918 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>,
919 <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
920 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
921 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
922 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
923 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
924 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
925 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
926 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
927 interrupt-names = "ch0", "ch1", "ch2", "ch3",
928 "ch4", "ch5", "ch6", "ch7",
929 "ch8", "ch9", "ch10", "ch11",
930 "ch12", "ch13", "ch14", "ch15",
931 "ch16", "ch17", "ch18", "ch19",
932 "ch20", "ch21", "ch22", "ch23",
933 "ch24";
934 clocks = <&cpg CPG_MOD 216>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]935 clock-names = "fck";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]936 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
937 resets = <&cpg 216>;
938 phy-mode = "rgmii";
939 rx-internal-delay-ps = <0>;
940 tx-internal-delay-ps = <0>;
941 #address-cells = <1>;
942 #size-cells = <0>;
943 status = "disabled";
944 };
945
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]946 pwm0: pwm@e6e30000 {
947 compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
948 reg = <0 0xe6e30000 0 0x10>;
949 #pwm-cells = <2>;
950 clocks = <&cpg CPG_MOD 628>;
951 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
952 resets = <&cpg 628>;
953 status = "disabled";
954 };
955
956 pwm1: pwm@e6e31000 {
957 compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
958 reg = <0 0xe6e31000 0 0x10>;
959 #pwm-cells = <2>;
960 clocks = <&cpg CPG_MOD 628>;
961 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
962 resets = <&cpg 628>;
963 status = "disabled";
964 };
965
966 pwm2: pwm@e6e32000 {
967 compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
968 reg = <0 0xe6e32000 0 0x10>;
969 #pwm-cells = <2>;
970 clocks = <&cpg CPG_MOD 628>;
971 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
972 resets = <&cpg 628>;
973 status = "disabled";
974 };
975
976 pwm3: pwm@e6e33000 {
977 compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
978 reg = <0 0xe6e33000 0 0x10>;
979 #pwm-cells = <2>;
980 clocks = <&cpg CPG_MOD 628>;
981 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
982 resets = <&cpg 628>;
983 status = "disabled";
984 };
985
986 pwm4: pwm@e6e34000 {
987 compatible = "renesas,pwm-r8a779a0", "renesas,pwm-rcar";
988 reg = <0 0xe6e34000 0 0x10>;
989 #pwm-cells = <2>;
990 clocks = <&cpg CPG_MOD 628>;
991 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
992 resets = <&cpg 628>;
993 status = "disabled";
994 };
995
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]996 scif0: serial@e6e60000 {
997 compatible = "renesas,scif-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]998 "renesas,rcar-gen4-scif", "renesas,scif";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]999 reg = <0 0xe6e60000 0 64>;
1000 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>;
1001 clocks = <&cpg CPG_MOD 702>,
1002 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
1003 <&scif_clk>;
1004 clock-names = "fck", "brg_int", "scif_clk";
1005 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
1006 dma-names = "tx", "rx";
1007 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1008 resets = <&cpg 702>;
1009 status = "disabled";
1010 };
1011
1012 scif1: serial@e6e68000 {
1013 compatible = "renesas,scif-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1014 "renesas,rcar-gen4-scif", "renesas,scif";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1015 reg = <0 0xe6e68000 0 64>;
1016 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
1017 clocks = <&cpg CPG_MOD 703>,
1018 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
1019 <&scif_clk>;
1020 clock-names = "fck", "brg_int", "scif_clk";
1021 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
1022 dma-names = "tx", "rx";
1023 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1024 resets = <&cpg 703>;
1025 status = "disabled";
1026 };
1027
1028 scif3: serial@e6c50000 {
1029 compatible = "renesas,scif-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1030 "renesas,rcar-gen4-scif", "renesas,scif";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1031 reg = <0 0xe6c50000 0 64>;
1032 interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
1033 clocks = <&cpg CPG_MOD 704>,
1034 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
1035 <&scif_clk>;
1036 clock-names = "fck", "brg_int", "scif_clk";
1037 dmas = <&dmac1 0x57>, <&dmac1 0x56>;
1038 dma-names = "tx", "rx";
1039 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1040 resets = <&cpg 704>;
1041 status = "disabled";
1042 };
1043
1044 scif4: serial@e6c40000 {
1045 compatible = "renesas,scif-r8a779a0",
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1046 "renesas,rcar-gen4-scif", "renesas,scif";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1047 reg = <0 0xe6c40000 0 64>;
1048 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
1049 clocks = <&cpg CPG_MOD 705>,
1050 <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
1051 <&scif_clk>;
1052 clock-names = "fck", "brg_int", "scif_clk";
1053 dmas = <&dmac1 0x59>, <&dmac1 0x58>;
1054 dma-names = "tx", "rx";
1055 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1056 resets = <&cpg 705>;
1057 status = "disabled";
1058 };
1059
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1060 tpu: pwm@e6e80000 {
1061 compatible = "renesas,tpu-r8a779a0", "renesas,tpu";
1062 reg = <0 0xe6e80000 0 0x148>;
1063 interrupts = <GIC_SPI 515 IRQ_TYPE_LEVEL_HIGH>;
1064 clocks = <&cpg CPG_MOD 718>;
1065 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1066 resets = <&cpg 718>;
1067 #pwm-cells = <3>;
1068 status = "disabled";
1069 };
1070
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1071 msiof0: spi@e6e90000 {
1072 compatible = "renesas,msiof-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]1073 "renesas,rcar-gen4-msiof";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1074 reg = <0 0xe6e90000 0 0x0064>;
1075 interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>;
1076 clocks = <&cpg CPG_MOD 618>;
1077 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1078 resets = <&cpg 618>;
1079 dmas = <&dmac1 0x41>, <&dmac1 0x40>;
1080 dma-names = "tx", "rx";
1081 #address-cells = <1>;
1082 #size-cells = <0>;
1083 status = "disabled";
1084 };
1085
1086 msiof1: spi@e6ea0000 {
1087 compatible = "renesas,msiof-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]1088 "renesas,rcar-gen4-msiof";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1089 reg = <0 0xe6ea0000 0 0x0064>;
1090 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1091 clocks = <&cpg CPG_MOD 619>;
1092 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1093 resets = <&cpg 619>;
1094 dmas = <&dmac1 0x43>, <&dmac1 0x42>;
1095 dma-names = "tx", "rx";
1096 #address-cells = <1>;
1097 #size-cells = <0>;
1098 status = "disabled";
1099 };
1100
1101 msiof2: spi@e6c00000 {
1102 compatible = "renesas,msiof-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]1103 "renesas,rcar-gen4-msiof";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1104 reg = <0 0xe6c00000 0 0x0064>;
1105 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1106 clocks = <&cpg CPG_MOD 620>;
1107 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1108 resets = <&cpg 620>;
1109 dmas = <&dmac1 0x45>, <&dmac1 0x44>;
1110 dma-names = "tx", "rx";
1111 #address-cells = <1>;
1112 #size-cells = <0>;
1113 status = "disabled";
1114 };
1115
1116 msiof3: spi@e6c10000 {
1117 compatible = "renesas,msiof-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]1118 "renesas,rcar-gen4-msiof";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1119 reg = <0 0xe6c10000 0 0x0064>;
1120 interrupts = <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>;
1121 clocks = <&cpg CPG_MOD 621>;
1122 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1123 resets = <&cpg 621>;
1124 dmas = <&dmac1 0x47>, <&dmac1 0x46>;
1125 dma-names = "tx", "rx";
1126 #address-cells = <1>;
1127 #size-cells = <0>;
1128 status = "disabled";
1129 };
1130
1131 msiof4: spi@e6c20000 {
1132 compatible = "renesas,msiof-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]1133 "renesas,rcar-gen4-msiof";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1134 reg = <0 0xe6c20000 0 0x0064>;
1135 interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
1136 clocks = <&cpg CPG_MOD 622>;
1137 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1138 resets = <&cpg 622>;
1139 dmas = <&dmac1 0x49>, <&dmac1 0x48>;
1140 dma-names = "tx", "rx";
1141 #address-cells = <1>;
1142 #size-cells = <0>;
1143 status = "disabled";
1144 };
1145
1146 msiof5: spi@e6c28000 {
1147 compatible = "renesas,msiof-r8a779a0",
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]1148 "renesas,rcar-gen4-msiof";
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1149 reg = <0 0xe6c28000 0 0x0064>;
1150 interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>;
1151 clocks = <&cpg CPG_MOD 623>;
1152 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1153 resets = <&cpg 623>;
1154 dmas = <&dmac1 0x4b>, <&dmac1 0x4a>;
1155 dma-names = "tx", "rx";
1156 #address-cells = <1>;
1157 #size-cells = <0>;
1158 status = "disabled";
1159 };
1160
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1161 vin00: video@e6ef0000 {
1162 compatible = "renesas,vin-r8a779a0";
1163 reg = <0 0xe6ef0000 0 0x1000>;
1164 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
1165 clocks = <&cpg CPG_MOD 730>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1166 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1167 resets = <&cpg 730>;
1168 renesas,id = <0>;
1169 status = "disabled";
1170
1171 ports {
1172 #address-cells = <1>;
1173 #size-cells = <0>;
1174
1175 port@2 {
1176 #address-cells = <1>;
1177 #size-cells = <0>;
1178
1179 reg = <2>;
1180
1181 vin00isp0: endpoint@0 {
1182 reg = <0>;
1183 remote-endpoint = <&isp0vin00>;
1184 };
1185 };
1186 };
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1187 };
1188
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1189 vin01: video@e6ef1000 {
1190 compatible = "renesas,vin-r8a779a0";
1191 reg = <0 0xe6ef1000 0 0x1000>;
1192 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
1193 clocks = <&cpg CPG_MOD 731>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1194 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1195 resets = <&cpg 731>;
1196 renesas,id = <1>;
1197 status = "disabled";
1198
1199 ports {
1200 #address-cells = <1>;
1201 #size-cells = <0>;
1202
1203 port@2 {
1204 #address-cells = <1>;
1205 #size-cells = <0>;
1206
1207 reg = <2>;
1208
1209 vin01isp0: endpoint@0 {
1210 reg = <0>;
1211 remote-endpoint = <&isp0vin01>;
1212 };
1213 };
1214 };
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1215 };
1216
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1217 vin02: video@e6ef2000 {
1218 compatible = "renesas,vin-r8a779a0";
1219 reg = <0 0xe6ef2000 0 0x1000>;
1220 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
1221 clocks = <&cpg CPG_MOD 800>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1222 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1223 resets = <&cpg 800>;
1224 renesas,id = <2>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1225 status = "disabled";
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1226
1227 ports {
1228 #address-cells = <1>;
1229 #size-cells = <0>;
1230
1231 port@2 {
1232 #address-cells = <1>;
1233 #size-cells = <0>;
1234
1235 reg = <2>;
1236
1237 vin02isp0: endpoint@0 {
1238 reg = <0>;
1239 remote-endpoint = <&isp0vin02>;
1240 };
1241 };
1242 };
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1243 };
1244
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1245 vin03: video@e6ef3000 {
1246 compatible = "renesas,vin-r8a779a0";
1247 reg = <0 0xe6ef3000 0 0x1000>;
1248 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
1249 clocks = <&cpg CPG_MOD 801>;
1250 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1251 resets = <&cpg 801>;
1252 renesas,id = <3>;
1253 status = "disabled";
1254
1255 ports {
1256 #address-cells = <1>;
1257 #size-cells = <0>;
1258
1259 port@2 {
1260 #address-cells = <1>;
1261 #size-cells = <0>;
1262
1263 reg = <2>;
1264
1265 vin03isp0: endpoint@0 {
1266 reg = <0>;
1267 remote-endpoint = <&isp0vin03>;
1268 };
1269 };
1270 };
1271 };
1272
1273 vin04: video@e6ef4000 {
1274 compatible = "renesas,vin-r8a779a0";
1275 reg = <0 0xe6ef4000 0 0x1000>;
1276 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1277 clocks = <&cpg CPG_MOD 802>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1278 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1279 resets = <&cpg 802>;
1280 renesas,id = <4>;
1281 status = "disabled";
1282
1283 ports {
1284 #address-cells = <1>;
1285 #size-cells = <0>;
1286
1287 port@2 {
1288 #address-cells = <1>;
1289 #size-cells = <0>;
1290
1291 reg = <2>;
1292
1293 vin04isp0: endpoint@0 {
1294 reg = <0>;
1295 remote-endpoint = <&isp0vin04>;
1296 };
1297 };
1298 };
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]1299 };
1300
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]1301 vin05: video@e6ef5000 {
1302 compatible = "renesas,vin-r8a779a0";
1303 reg = <0 0xe6ef5000 0 0x1000>;
1304 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1305 clocks = <&cpg CPG_MOD 803>;
1306 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1307 resets = <&cpg 803>;
1308 renesas,id = <5>;
1309 status = "disabled";
1310
1311 ports {
1312 #address-cells = <1>;
1313 #size-cells = <0>;
1314
1315 port@2 {
1316 #address-cells = <1>;
1317 #size-cells = <0>;
1318
1319 reg = <2>;
1320
1321 vin05isp0: endpoint@0 {
1322 reg = <0>;
1323 remote-endpoint = <&isp0vin05>;
1324 };
1325 };
1326 };
1327 };
1328
1329 vin06: video@e6ef6000 {
1330 compatible = "renesas,vin-r8a779a0";
1331 reg = <0 0xe6ef6000 0 0x1000>;
1332 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1333 clocks = <&cpg CPG_MOD 804>;
1334 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1335 resets = <&cpg 804>;
1336 renesas,id = <6>;
1337 status = "disabled";
1338
1339 ports {
1340 #address-cells = <1>;
1341 #size-cells = <0>;
1342
1343 port@2 {
1344 #address-cells = <1>;
1345 #size-cells = <0>;
1346
1347 reg = <2>;
1348
1349 vin06isp0: endpoint@0 {
1350 reg = <0>;
1351 remote-endpoint = <&isp0vin06>;
1352 };
1353 };
1354 };
1355 };
1356
1357 vin07: video@e6ef7000 {
1358 compatible = "renesas,vin-r8a779a0";
1359 reg = <0 0xe6ef7000 0 0x1000>;
1360 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1361 clocks = <&cpg CPG_MOD 805>;
1362 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1363 resets = <&cpg 805>;
1364 renesas,id = <7>;
1365 status = "disabled";
1366
1367 ports {
1368 #address-cells = <1>;
1369 #size-cells = <0>;
1370
1371 port@2 {
1372 #address-cells = <1>;
1373 #size-cells = <0>;
1374
1375 reg = <2>;
1376
1377 vin07isp0: endpoint@0 {
1378 reg = <0>;
1379 remote-endpoint = <&isp0vin07>;
1380 };
1381 };
1382 };
1383 };
1384
1385 vin08: video@e6ef8000 {
1386 compatible = "renesas,vin-r8a779a0";
1387 reg = <0 0xe6ef8000 0 0x1000>;
1388 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1389 clocks = <&cpg CPG_MOD 806>;
1390 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1391 resets = <&cpg 806>;
1392 renesas,id = <8>;
1393 status = "disabled";
1394
1395 ports {
1396 #address-cells = <1>;
1397 #size-cells = <0>;
1398
1399 port@2 {
1400 #address-cells = <1>;
1401 #size-cells = <0>;
1402
1403 reg = <2>;
1404
1405 vin08isp1: endpoint@1 {
1406 reg = <1>;
1407 remote-endpoint = <&isp1vin08>;
1408 };
1409 };
1410 };
1411 };
1412
1413 vin09: video@e6ef9000 {
1414 compatible = "renesas,vin-r8a779a0";
1415 reg = <0 0xe6ef9000 0 0x1000>;
1416 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1417 clocks = <&cpg CPG_MOD 807>;
1418 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1419 resets = <&cpg 807>;
1420 renesas,id = <9>;
1421 status = "disabled";
1422
1423 ports {
1424 #address-cells = <1>;
1425 #size-cells = <0>;
1426
1427 port@2 {
1428 #address-cells = <1>;
1429 #size-cells = <0>;
1430
1431 reg = <2>;
1432
1433 vin09isp1: endpoint@1 {
1434 reg = <1>;
1435 remote-endpoint = <&isp1vin09>;
1436 };
1437 };
1438 };
1439 };
1440
1441 vin10: video@e6efa000 {
1442 compatible = "renesas,vin-r8a779a0";
1443 reg = <0 0xe6efa000 0 0x1000>;
1444 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
1445 clocks = <&cpg CPG_MOD 808>;
1446 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1447 resets = <&cpg 808>;
1448 renesas,id = <10>;
1449 status = "disabled";
1450
1451 ports {
1452 #address-cells = <1>;
1453 #size-cells = <0>;
1454
1455 port@2 {
1456 #address-cells = <1>;
1457 #size-cells = <0>;
1458
1459 reg = <2>;
1460
1461 vin10isp1: endpoint@1 {
1462 reg = <1>;
1463 remote-endpoint = <&isp1vin10>;
1464 };
1465 };
1466 };
1467 };
1468
1469 vin11: video@e6efb000 {
1470 compatible = "renesas,vin-r8a779a0";
1471 reg = <0 0xe6efb000 0 0x1000>;
1472 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1473 clocks = <&cpg CPG_MOD 809>;
1474 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1475 resets = <&cpg 809>;
1476 renesas,id = <11>;
1477 status = "disabled";
1478
1479 ports {
1480 #address-cells = <1>;
1481 #size-cells = <0>;
1482
1483 port@2 {
1484 #address-cells = <1>;
1485 #size-cells = <0>;
1486
1487 reg = <2>;
1488
1489 vin11isp1: endpoint@1 {
1490 reg = <1>;
1491 remote-endpoint = <&isp1vin11>;
1492 };
1493 };
1494 };
1495 };
1496
1497 vin12: video@e6efc000 {
1498 compatible = "renesas,vin-r8a779a0";
1499 reg = <0 0xe6efc000 0 0x1000>;
1500 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
1501 clocks = <&cpg CPG_MOD 810>;
1502 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1503 resets = <&cpg 810>;
1504 renesas,id = <12>;
1505 status = "disabled";
1506
1507 ports {
1508 #address-cells = <1>;
1509 #size-cells = <0>;
1510
1511 port@2 {
1512 #address-cells = <1>;
1513 #size-cells = <0>;
1514
1515 reg = <2>;
1516
1517 vin12isp1: endpoint@1 {
1518 reg = <1>;
1519 remote-endpoint = <&isp1vin12>;
1520 };
1521 };
1522 };
1523 };
1524
1525 vin13: video@e6efd000 {
1526 compatible = "renesas,vin-r8a779a0";
1527 reg = <0 0xe6efd000 0 0x1000>;
1528 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
1529 clocks = <&cpg CPG_MOD 811>;
1530 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1531 resets = <&cpg 811>;
1532 renesas,id = <13>;
1533 status = "disabled";
1534
1535 ports {
1536 #address-cells = <1>;
1537 #size-cells = <0>;
1538
1539 port@2 {
1540 #address-cells = <1>;
1541 #size-cells = <0>;
1542
1543 reg = <2>;
1544
1545 vin13isp1: endpoint@1 {
1546 reg = <1>;
1547 remote-endpoint = <&isp1vin13>;
1548 };
1549 };
1550 };
1551 };
1552
1553 vin14: video@e6efe000 {
1554 compatible = "renesas,vin-r8a779a0";
1555 reg = <0 0xe6efe000 0 0x1000>;
1556 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1557 clocks = <&cpg CPG_MOD 812>;
1558 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1559 resets = <&cpg 812>;
1560 renesas,id = <14>;
1561 status = "disabled";
1562
1563 ports {
1564 #address-cells = <1>;
1565 #size-cells = <0>;
1566
1567 port@2 {
1568 #address-cells = <1>;
1569 #size-cells = <0>;
1570
1571 reg = <2>;
1572
1573 vin14isp1: endpoint@1 {
1574 reg = <1>;
1575 remote-endpoint = <&isp1vin14>;
1576 };
1577 };
1578 };
1579 };
1580
1581 vin15: video@e6eff000 {
1582 compatible = "renesas,vin-r8a779a0";
1583 reg = <0 0xe6eff000 0 0x1000>;
1584 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1585 clocks = <&cpg CPG_MOD 813>;
1586 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1587 resets = <&cpg 813>;
1588 renesas,id = <15>;
1589 status = "disabled";
1590
1591 ports {
1592 #address-cells = <1>;
1593 #size-cells = <0>;
1594
1595 port@2 {
1596 #address-cells = <1>;
1597 #size-cells = <0>;
1598
1599 reg = <2>;
1600
1601 vin15isp1: endpoint@1 {
1602 reg = <1>;
1603 remote-endpoint = <&isp1vin15>;
1604 };
1605 };
1606 };
1607 };
1608
1609 vin16: video@e6ed0000 {
1610 compatible = "renesas,vin-r8a779a0";
1611 reg = <0 0xe6ed0000 0 0x1000>;
1612 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1613 clocks = <&cpg CPG_MOD 814>;
1614 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1615 resets = <&cpg 814>;
1616 renesas,id = <16>;
1617 status = "disabled";
1618
1619 ports {
1620 #address-cells = <1>;
1621 #size-cells = <0>;
1622
1623 port@2 {
1624 #address-cells = <1>;
1625 #size-cells = <0>;
1626
1627 reg = <2>;
1628
1629 vin16isp2: endpoint@2 {
1630 reg = <2>;
1631 remote-endpoint = <&isp2vin16>;
1632 };
1633 };
1634 };
1635 };
1636
1637 vin17: video@e6ed1000 {
1638 compatible = "renesas,vin-r8a779a0";
1639 reg = <0 0xe6ed1000 0 0x1000>;
1640 interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
1641 clocks = <&cpg CPG_MOD 815>;
1642 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1643 resets = <&cpg 815>;
1644 renesas,id = <17>;
1645 status = "disabled";
1646
1647 ports {
1648 #address-cells = <1>;
1649 #size-cells = <0>;
1650
1651 port@2 {
1652 #address-cells = <1>;
1653 #size-cells = <0>;
1654
1655 reg = <2>;
1656
1657 vin17isp2: endpoint@2 {
1658 reg = <2>;
1659 remote-endpoint = <&isp2vin17>;
1660 };
1661 };
1662 };
1663 };
1664
1665 vin18: video@e6ed2000 {
1666 compatible = "renesas,vin-r8a779a0";
1667 reg = <0 0xe6ed2000 0 0x1000>;
1668 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
1669 clocks = <&cpg CPG_MOD 816>;
1670 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1671 resets = <&cpg 816>;
1672 renesas,id = <18>;
1673 status = "disabled";
1674
1675 ports {
1676 #address-cells = <1>;
1677 #size-cells = <0>;
1678
1679 port@2 {
1680 #address-cells = <1>;
1681 #size-cells = <0>;
1682
1683 reg = <2>;
1684
1685 vin18isp2: endpoint@2 {
1686 reg = <2>;
1687 remote-endpoint = <&isp2vin18>;
1688 };
1689 };
1690 };
1691 };
1692
1693 vin19: video@e6ed3000 {
1694 compatible = "renesas,vin-r8a779a0";
1695 reg = <0 0xe6ed3000 0 0x1000>;
1696 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
1697 clocks = <&cpg CPG_MOD 817>;
1698 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1699 resets = <&cpg 817>;
1700 renesas,id = <19>;
1701 status = "disabled";
1702
1703 ports {
1704 #address-cells = <1>;
1705 #size-cells = <0>;
1706
1707 port@2 {
1708 #address-cells = <1>;
1709 #size-cells = <0>;
1710
1711 reg = <2>;
1712
1713 vin19isp2: endpoint@2 {
1714 reg = <2>;
1715 remote-endpoint = <&isp2vin19>;
1716 };
1717 };
1718 };
1719 };
1720
1721 vin20: video@e6ed4000 {
1722 compatible = "renesas,vin-r8a779a0";
1723 reg = <0 0xe6ed4000 0 0x1000>;
1724 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
1725 clocks = <&cpg CPG_MOD 818>;
1726 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1727 resets = <&cpg 818>;
1728 renesas,id = <20>;
1729 status = "disabled";
1730
1731 ports {
1732 #address-cells = <1>;
1733 #size-cells = <0>;
1734
1735 port@2 {
1736 #address-cells = <1>;
1737 #size-cells = <0>;
1738
1739 reg = <2>;
1740
1741 vin20isp2: endpoint@2 {
1742 reg = <2>;
1743 remote-endpoint = <&isp2vin20>;
1744 };
1745 };
1746 };
1747 };
1748
1749 vin21: video@e6ed5000 {
1750 compatible = "renesas,vin-r8a779a0";
1751 reg = <0 0xe6ed5000 0 0x1000>;
1752 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
1753 clocks = <&cpg CPG_MOD 819>;
1754 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1755 resets = <&cpg 819>;
1756 renesas,id = <21>;
1757 status = "disabled";
1758
1759 ports {
1760 #address-cells = <1>;
1761 #size-cells = <0>;
1762
1763 port@2 {
1764 #address-cells = <1>;
1765 #size-cells = <0>;
1766
1767 reg = <2>;
1768
1769 vin21isp2: endpoint@2 {
1770 reg = <2>;
1771 remote-endpoint = <&isp2vin21>;
1772 };
1773 };
1774 };
1775 };
1776
1777 vin22: video@e6ed6000 {
1778 compatible = "renesas,vin-r8a779a0";
1779 reg = <0 0xe6ed6000 0 0x1000>;
1780 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
1781 clocks = <&cpg CPG_MOD 820>;
1782 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1783 resets = <&cpg 820>;
1784 renesas,id = <22>;
1785 status = "disabled";
1786
1787 ports {
1788 #address-cells = <1>;
1789 #size-cells = <0>;
1790
1791 port@2 {
1792 #address-cells = <1>;
1793 #size-cells = <0>;
1794
1795 reg = <2>;
1796
1797 vin22isp2: endpoint@2 {
1798 reg = <2>;
1799 remote-endpoint = <&isp2vin22>;
1800 };
1801 };
1802 };
1803 };
1804
1805 vin23: video@e6ed7000 {
1806 compatible = "renesas,vin-r8a779a0";
1807 reg = <0 0xe6ed7000 0 0x1000>;
1808 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
1809 clocks = <&cpg CPG_MOD 821>;
1810 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1811 resets = <&cpg 821>;
1812 renesas,id = <23>;
1813 status = "disabled";
1814
1815 ports {
1816 #address-cells = <1>;
1817 #size-cells = <0>;
1818
1819 port@2 {
1820 #address-cells = <1>;
1821 #size-cells = <0>;
1822
1823 reg = <2>;
1824
1825 vin23isp2: endpoint@2 {
1826 reg = <2>;
1827 remote-endpoint = <&isp2vin23>;
1828 };
1829 };
1830 };
1831 };
1832
1833 vin24: video@e6ed8000 {
1834 compatible = "renesas,vin-r8a779a0";
1835 reg = <0 0xe6ed8000 0 0x1000>;
1836 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1837 clocks = <&cpg CPG_MOD 822>;
1838 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1839 resets = <&cpg 822>;
1840 renesas,id = <24>;
1841 status = "disabled";
1842
1843 ports {
1844 #address-cells = <1>;
1845 #size-cells = <0>;
1846
1847 port@2 {
1848 #address-cells = <1>;
1849 #size-cells = <0>;
1850
1851 reg = <2>;
1852
1853 vin24isp3: endpoint@3 {
1854 reg = <3>;
1855 remote-endpoint = <&isp3vin24>;
1856 };
1857 };
1858 };
1859 };
1860
1861 vin25: video@e6ed9000 {
1862 compatible = "renesas,vin-r8a779a0";
1863 reg = <0 0xe6ed9000 0 0x1000>;
1864 interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
1865 clocks = <&cpg CPG_MOD 823>;
1866 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1867 resets = <&cpg 823>;
1868 renesas,id = <25>;
1869 status = "disabled";
1870
1871 ports {
1872 #address-cells = <1>;
1873 #size-cells = <0>;
1874
1875 port@2 {
1876 #address-cells = <1>;
1877 #size-cells = <0>;
1878
1879 reg = <2>;
1880
1881 vin25isp3: endpoint@3 {
1882 reg = <3>;
1883 remote-endpoint = <&isp3vin25>;
1884 };
1885 };
1886 };
1887 };
1888
1889 vin26: video@e6eda000 {
1890 compatible = "renesas,vin-r8a779a0";
1891 reg = <0 0xe6eda000 0 0x1000>;
1892 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1893 clocks = <&cpg CPG_MOD 824>;
1894 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1895 resets = <&cpg 824>;
1896 renesas,id = <26>;
1897 status = "disabled";
1898
1899 ports {
1900 #address-cells = <1>;
1901 #size-cells = <0>;
1902
1903 port@2 {
1904 #address-cells = <1>;
1905 #size-cells = <0>;
1906
1907 reg = <2>;
1908
1909 vin26isp3: endpoint@3 {
1910 reg = <3>;
1911 remote-endpoint = <&isp3vin26>;
1912 };
1913 };
1914 };
1915 };
1916
1917 vin27: video@e6edb000 {
1918 compatible = "renesas,vin-r8a779a0";
1919 reg = <0 0xe6edb000 0 0x1000>;
1920 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1921 clocks = <&cpg CPG_MOD 825>;
1922 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1923 resets = <&cpg 825>;
1924 renesas,id = <27>;
1925 status = "disabled";
1926
1927 ports {
1928 #address-cells = <1>;
1929 #size-cells = <0>;
1930
1931 port@2 {
1932 #address-cells = <1>;
1933 #size-cells = <0>;
1934
1935 reg = <2>;
1936
1937 vin27isp3: endpoint@3 {
1938 reg = <3>;
1939 remote-endpoint = <&isp3vin27>;
1940 };
1941 };
1942 };
1943 };
1944
1945 vin28: video@e6edc000 {
1946 compatible = "renesas,vin-r8a779a0";
1947 reg = <0 0xe6edc000 0 0x1000>;
1948 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1949 clocks = <&cpg CPG_MOD 826>;
1950 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1951 resets = <&cpg 826>;
1952 renesas,id = <28>;
1953 status = "disabled";
1954
1955 ports {
1956 #address-cells = <1>;
1957 #size-cells = <0>;
1958
1959 port@2 {
1960 #address-cells = <1>;
1961 #size-cells = <0>;
1962
1963 reg = <2>;
1964
1965 vin28isp3: endpoint@3 {
1966 reg = <3>;
1967 remote-endpoint = <&isp3vin28>;
1968 };
1969 };
1970 };
1971 };
1972
1973 vin29: video@e6edd000 {
1974 compatible = "renesas,vin-r8a779a0";
1975 reg = <0 0xe6edd000 0 0x1000>;
1976 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1977 clocks = <&cpg CPG_MOD 827>;
1978 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
1979 resets = <&cpg 827>;
1980 renesas,id = <29>;
1981 status = "disabled";
1982
1983 ports {
1984 #address-cells = <1>;
1985 #size-cells = <0>;
1986
1987 port@2 {
1988 #address-cells = <1>;
1989 #size-cells = <0>;
1990
1991 reg = <2>;
1992
1993 vin29isp3: endpoint@3 {
1994 reg = <3>;
1995 remote-endpoint = <&isp3vin29>;
1996 };
1997 };
1998 };
1999 };
2000
2001 vin30: video@e6ede000 {
2002 compatible = "renesas,vin-r8a779a0";
2003 reg = <0 0xe6ede000 0 0x1000>;
2004 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
2005 clocks = <&cpg CPG_MOD 828>;
2006 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2007 resets = <&cpg 828>;
2008 renesas,id = <30>;
2009 status = "disabled";
2010
2011 ports {
2012 #address-cells = <1>;
2013 #size-cells = <0>;
2014
2015 port@2 {
2016 #address-cells = <1>;
2017 #size-cells = <0>;
2018
2019 reg = <2>;
2020
2021 vin30isp3: endpoint@3 {
2022 reg = <3>;
2023 remote-endpoint = <&isp3vin30>;
2024 };
2025 };
2026 };
2027 };
2028
2029 vin31: video@e6edf000 {
2030 compatible = "renesas,vin-r8a779a0";
2031 reg = <0 0xe6edf000 0 0x1000>;
2032 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
2033 clocks = <&cpg CPG_MOD 829>;
2034 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2035 resets = <&cpg 829>;
2036 renesas,id = <31>;
2037 status = "disabled";
2038
2039 ports {
2040 #address-cells = <1>;
2041 #size-cells = <0>;
2042
2043 port@2 {
2044 #address-cells = <1>;
2045 #size-cells = <0>;
2046
2047 reg = <2>;
2048
2049 vin31isp3: endpoint@3 {
2050 reg = <3>;
2051 remote-endpoint = <&isp3vin31>;
2052 };
2053 };
2054 };
2055 };
2056
2057 dmac1: dma-controller@e7350000 {
2058 compatible = "renesas,dmac-r8a779a0",
2059 "renesas,rcar-gen4-dmac";
2060 reg = <0 0xe7350000 0 0x1000>,
2061 <0 0xe7300000 0 0x10000>;
2062 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
2063 <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
2064 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
2065 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
2066 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
2067 <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
2068 <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
2069 <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
2070 <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
2071 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
2072 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
2073 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
2074 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
2075 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
2076 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
2077 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
2078 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
2079 interrupt-names = "error",
2080 "ch0", "ch1", "ch2", "ch3", "ch4",
2081 "ch5", "ch6", "ch7", "ch8", "ch9",
2082 "ch10", "ch11", "ch12", "ch13",
2083 "ch14", "ch15";
2084 clocks = <&cpg CPG_MOD 709>;
2085 clock-names = "fck";
2086 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2087 resets = <&cpg 709>;
2088 #dma-cells = <1>;
2089 dma-channels = <16>;
2090 };
2091
2092 dmac2: dma-controller@e7351000 {
2093 compatible = "renesas,dmac-r8a779a0",
2094 "renesas,rcar-gen4-dmac";
2095 reg = <0 0xe7351000 0 0x1000>,
2096 <0 0xe7310000 0 0x10000>;
2097 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
2098 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
2099 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
2100 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
2101 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
2102 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
2103 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
2104 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
2105 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
2106 interrupt-names = "error",
2107 "ch0", "ch1", "ch2", "ch3", "ch4",
2108 "ch5", "ch6", "ch7";
2109 clocks = <&cpg CPG_MOD 710>;
2110 clock-names = "fck";
2111 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2112 resets = <&cpg 710>;
2113 #dma-cells = <1>;
2114 dma-channels = <8>;
2115 };
2116
2117 mmc0: mmc@ee140000 {
2118 compatible = "renesas,sdhi-r8a779a0",
2119 "renesas,rcar-gen4-sdhi";
2120 reg = <0 0xee140000 0 0x2000>;
2121 interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
2122 clocks = <&cpg CPG_MOD 706>, <&cpg CPG_CORE R8A779A0_CLK_SD0H>;
2123 clock-names = "core", "clkh";
2124 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2125 resets = <&cpg 706>;
2126 max-frequency = <200000000>;
2127 iommus = <&ipmmu_ds0 32>;
2128 status = "disabled";
2129 };
2130
2131 rpc: spi@ee200000 {
2132 compatible = "renesas,r8a779a0-rpc-if",
2133 "renesas,rcar-gen3-rpc-if";
2134 reg = <0 0xee200000 0 0x200>,
2135 <0 0x08000000 0 0x04000000>,
2136 <0 0xee208000 0 0x100>;
2137 reg-names = "regs", "dirmap", "wbuf";
2138 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
2139 clocks = <&cpg CPG_MOD 629>;
2140 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2141 resets = <&cpg 629>;
2142 #address-cells = <1>;
2143 #size-cells = <0>;
2144 status = "disabled";
2145 };
2146
2147 ipmmu_rt0: iommu@ee480000 {
2148 compatible = "renesas,ipmmu-r8a779a0",
2149 "renesas,rcar-gen4-ipmmu-vmsa";
2150 reg = <0 0xee480000 0 0x20000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2151 renesas,ipmmu-main = <&ipmmu_mm>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2152 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2153 #iommu-cells = <1>;
2154 };
2155
2156 ipmmu_rt1: iommu@ee4c0000 {
2157 compatible = "renesas,ipmmu-r8a779a0",
2158 "renesas,rcar-gen4-ipmmu-vmsa";
2159 reg = <0 0xee4c0000 0 0x20000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2160 renesas,ipmmu-main = <&ipmmu_mm>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2161 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2162 #iommu-cells = <1>;
2163 };
2164
2165 ipmmu_ds0: iommu@eed00000 {
2166 compatible = "renesas,ipmmu-r8a779a0",
2167 "renesas,rcar-gen4-ipmmu-vmsa";
2168 reg = <0 0xeed00000 0 0x20000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2169 renesas,ipmmu-main = <&ipmmu_mm>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2170 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2171 #iommu-cells = <1>;
2172 };
2173
2174 ipmmu_ds1: iommu@eed40000 {
2175 compatible = "renesas,ipmmu-r8a779a0",
2176 "renesas,rcar-gen4-ipmmu-vmsa";
2177 reg = <0 0xeed40000 0 0x20000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2178 renesas,ipmmu-main = <&ipmmu_mm>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2179 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2180 #iommu-cells = <1>;
2181 };
2182
2183 ipmmu_ir: iommu@eed80000 {
2184 compatible = "renesas,ipmmu-r8a779a0",
2185 "renesas,rcar-gen4-ipmmu-vmsa";
2186 reg = <0 0xeed80000 0 0x20000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2187 renesas,ipmmu-main = <&ipmmu_mm>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2188 power-domains = <&sysc R8A779A0_PD_A3IR>;
2189 #iommu-cells = <1>;
2190 };
2191
2192 ipmmu_vc0: iommu@eedc0000 {
2193 compatible = "renesas,ipmmu-r8a779a0",
2194 "renesas,rcar-gen4-ipmmu-vmsa";
2195 reg = <0 0xeedc0000 0 0x20000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2196 renesas,ipmmu-main = <&ipmmu_mm>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2197 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2198 #iommu-cells = <1>;
2199 };
2200
2201 ipmmu_vi0: iommu@eee80000 {
2202 compatible = "renesas,ipmmu-r8a779a0",
2203 "renesas,rcar-gen4-ipmmu-vmsa";
2204 reg = <0 0xeee80000 0 0x20000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2205 renesas,ipmmu-main = <&ipmmu_mm>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2206 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2207 #iommu-cells = <1>;
2208 };
2209
2210 ipmmu_vi1: iommu@eeec0000 {
2211 compatible = "renesas,ipmmu-r8a779a0",
2212 "renesas,rcar-gen4-ipmmu-vmsa";
2213 reg = <0 0xeeec0000 0 0x20000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2214 renesas,ipmmu-main = <&ipmmu_mm>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2215 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2216 #iommu-cells = <1>;
2217 };
2218
2219 ipmmu_3dg: iommu@eee00000 {
2220 compatible = "renesas,ipmmu-r8a779a0",
2221 "renesas,rcar-gen4-ipmmu-vmsa";
2222 reg = <0 0xeee00000 0 0x20000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2223 renesas,ipmmu-main = <&ipmmu_mm>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2224 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2225 #iommu-cells = <1>;
2226 };
2227
2228 ipmmu_vip0: iommu@eef00000 {
2229 compatible = "renesas,ipmmu-r8a779a0",
2230 "renesas,rcar-gen4-ipmmu-vmsa";
2231 reg = <0 0xeef00000 0 0x20000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2232 renesas,ipmmu-main = <&ipmmu_mm>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2233 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2234 #iommu-cells = <1>;
2235 };
2236
2237 ipmmu_vip1: iommu@eef40000 {
2238 compatible = "renesas,ipmmu-r8a779a0",
2239 "renesas,rcar-gen4-ipmmu-vmsa";
2240 reg = <0 0xeef40000 0 0x20000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2241 renesas,ipmmu-main = <&ipmmu_mm>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2242 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2243 #iommu-cells = <1>;
2244 };
2245
2246 ipmmu_mm: iommu@eefc0000 {
2247 compatible = "renesas,ipmmu-r8a779a0",
2248 "renesas,rcar-gen4-ipmmu-vmsa";
2249 reg = <0 0xeefc0000 0 0x20000>;
2250 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
2251 <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
2252 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2253 #iommu-cells = <1>;
2254 };
2255
2256 gic: interrupt-controller@f1000000 {
2257 compatible = "arm,gic-v3";
2258 #interrupt-cells = <3>;
2259 #address-cells = <0>;
2260 interrupt-controller;
2261 reg = <0x0 0xf1000000 0 0x20000>,
2262 <0x0 0xf1060000 0 0x110000>;
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2263 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
Marek Vasut2a8450f2023-01-26 21:01:32 +0100[diff] [blame]2264 };
2265
2266 fcpvd0: fcp@fea10000 {
2267 compatible = "renesas,fcpv";
2268 reg = <0 0xfea10000 0 0x200>;
2269 clocks = <&cpg CPG_MOD 508>;
2270 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2271 resets = <&cpg 508>;
2272 };
2273
2274 fcpvd1: fcp@fea11000 {
2275 compatible = "renesas,fcpv";
2276 reg = <0 0xfea11000 0 0x200>;
2277 clocks = <&cpg CPG_MOD 509>;
2278 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2279 resets = <&cpg 509>;
2280 };
2281
2282 vspd0: vsp@fea20000 {
2283 compatible = "renesas,vsp2";
2284 reg = <0 0xfea20000 0 0x5000>;
2285 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
2286 clocks = <&cpg CPG_MOD 830>;
2287 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2288 resets = <&cpg 830>;
2289
2290 renesas,fcp = <&fcpvd0>;
2291 };
2292
2293 vspd1: vsp@fea28000 {
2294 compatible = "renesas,vsp2";
2295 reg = <0 0xfea28000 0 0x5000>;
2296 interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
2297 clocks = <&cpg CPG_MOD 831>;
2298 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2299 resets = <&cpg 831>;
2300
2301 renesas,fcp = <&fcpvd1>;
2302 };
2303
2304 csi40: csi2@feaa0000 {
2305 compatible = "renesas,r8a779a0-csi2";
2306 reg = <0 0xfeaa0000 0 0x10000>;
2307 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2308 clocks = <&cpg CPG_MOD 331>;
2309 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2310 resets = <&cpg 331>;
2311 status = "disabled";
2312
2313 ports {
2314 #address-cells = <1>;
2315 #size-cells = <0>;
2316
2317 port@0 {
2318 reg = <0>;
2319 };
2320
2321 port@1 {
2322 reg = <1>;
2323 csi40isp0: endpoint {
2324 remote-endpoint = <&isp0csi40>;
2325 };
2326 };
2327 };
2328 };
2329
2330 csi41: csi2@feab0000 {
2331 compatible = "renesas,r8a779a0-csi2";
2332 reg = <0 0xfeab0000 0 0x10000>;
2333 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2334 clocks = <&cpg CPG_MOD 400>;
2335 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2336 resets = <&cpg 400>;
2337 status = "disabled";
2338
2339 ports {
2340 #address-cells = <1>;
2341 #size-cells = <0>;
2342
2343 port@0 {
2344 reg = <0>;
2345 };
2346
2347 port@1 {
2348 reg = <1>;
2349 csi41isp1: endpoint {
2350 remote-endpoint = <&isp1csi41>;
2351 };
2352 };
2353 };
2354 };
2355
2356 csi42: csi2@fed60000 {
2357 compatible = "renesas,r8a779a0-csi2";
2358 reg = <0 0xfed60000 0 0x10000>;
2359 interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2360 clocks = <&cpg CPG_MOD 401>;
2361 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2362 resets = <&cpg 401>;
2363 status = "disabled";
2364
2365 ports {
2366 #address-cells = <1>;
2367 #size-cells = <0>;
2368
2369 port@0 {
2370 reg = <0>;
2371 };
2372
2373 port@1 {
2374 reg = <1>;
2375 csi42isp2: endpoint {
2376 remote-endpoint = <&isp2csi42>;
2377 };
2378 };
2379 };
2380 };
2381
2382 csi43: csi2@fed70000 {
2383 compatible = "renesas,r8a779a0-csi2";
2384 reg = <0 0xfed70000 0 0x10000>;
2385 interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2386 clocks = <&cpg CPG_MOD 402>;
2387 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2388 resets = <&cpg 402>;
2389 status = "disabled";
2390
2391 ports {
2392 #address-cells = <1>;
2393 #size-cells = <0>;
2394
2395 port@0 {
2396 reg = <0>;
2397 };
2398
2399 port@1 {
2400 reg = <1>;
2401 csi43isp3: endpoint {
2402 remote-endpoint = <&isp3csi43>;
2403 };
2404 };
2405 };
2406 };
2407
2408 du: display@feb00000 {
2409 compatible = "renesas,du-r8a779a0";
2410 reg = <0 0xfeb00000 0 0x40000>;
2411 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
2412 <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
2413 clocks = <&cpg CPG_MOD 411>;
2414 clock-names = "du.0";
2415 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2416 resets = <&cpg 411>;
2417 reset-names = "du.0";
2418 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
2419
2420 status = "disabled";
2421
2422 ports {
2423 #address-cells = <1>;
2424 #size-cells = <0>;
2425
2426 port@0 {
2427 reg = <0>;
2428 du_out_dsi0: endpoint {
2429 remote-endpoint = <&dsi0_in>;
2430 };
2431 };
2432
2433 port@1 {
2434 reg = <1>;
2435 du_out_dsi1: endpoint {
2436 remote-endpoint = <&dsi1_in>;
2437 };
2438 };
2439 };
2440 };
2441
2442 isp0: isp@fed00000 {
2443 compatible = "renesas,r8a779a0-isp";
2444 reg = <0 0xfed00000 0 0x10000>;
2445 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
2446 clocks = <&cpg CPG_MOD 612>;
2447 power-domains = <&sysc R8A779A0_PD_A3ISP01>;
2448 resets = <&cpg 612>;
2449 status = "disabled";
2450
2451 ports {
2452 #address-cells = <1>;
2453 #size-cells = <0>;
2454
2455 port@0 {
2456 #address-cells = <1>;
2457 #size-cells = <0>;
2458
2459 reg = <0>;
2460
2461 isp0csi40: endpoint@0 {
2462 reg = <0>;
2463 remote-endpoint = <&csi40isp0>;
2464 };
2465 };
2466
2467 port@1 {
2468 reg = <1>;
2469 isp0vin00: endpoint {
2470 remote-endpoint = <&vin00isp0>;
2471 };
2472 };
2473
2474 port@2 {
2475 reg = <2>;
2476 isp0vin01: endpoint {
2477 remote-endpoint = <&vin01isp0>;
2478 };
2479 };
2480
2481 port@3 {
2482 reg = <3>;
2483 isp0vin02: endpoint {
2484 remote-endpoint = <&vin02isp0>;
2485 };
2486 };
2487
2488 port@4 {
2489 reg = <4>;
2490 isp0vin03: endpoint {
2491 remote-endpoint = <&vin03isp0>;
2492 };
2493 };
2494
2495 port@5 {
2496 reg = <5>;
2497 isp0vin04: endpoint {
2498 remote-endpoint = <&vin04isp0>;
2499 };
2500 };
2501
2502 port@6 {
2503 reg = <6>;
2504 isp0vin05: endpoint {
2505 remote-endpoint = <&vin05isp0>;
2506 };
2507 };
2508
2509 port@7 {
2510 reg = <7>;
2511 isp0vin06: endpoint {
2512 remote-endpoint = <&vin06isp0>;
2513 };
2514 };
2515
2516 port@8 {
2517 reg = <8>;
2518 isp0vin07: endpoint {
2519 remote-endpoint = <&vin07isp0>;
2520 };
2521 };
2522 };
2523 };
2524
2525 isp1: isp@fed20000 {
2526 compatible = "renesas,r8a779a0-isp";
2527 reg = <0 0xfed20000 0 0x10000>;
2528 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
2529 clocks = <&cpg CPG_MOD 613>;
2530 power-domains = <&sysc R8A779A0_PD_A3ISP01>;
2531 resets = <&cpg 613>;
2532 status = "disabled";
2533
2534 ports {
2535 #address-cells = <1>;
2536 #size-cells = <0>;
2537
2538 port@0 {
2539 #address-cells = <1>;
2540 #size-cells = <0>;
2541
2542 reg = <0>;
2543
2544 isp1csi41: endpoint@1 {
2545 reg = <1>;
2546 remote-endpoint = <&csi41isp1>;
2547 };
2548 };
2549
2550 port@1 {
2551 reg = <1>;
2552 isp1vin08: endpoint {
2553 remote-endpoint = <&vin08isp1>;
2554 };
2555 };
2556
2557 port@2 {
2558 reg = <2>;
2559 isp1vin09: endpoint {
2560 remote-endpoint = <&vin09isp1>;
2561 };
2562 };
2563
2564 port@3 {
2565 reg = <3>;
2566 isp1vin10: endpoint {
2567 remote-endpoint = <&vin10isp1>;
2568 };
2569 };
2570
2571 port@4 {
2572 reg = <4>;
2573 isp1vin11: endpoint {
2574 remote-endpoint = <&vin11isp1>;
2575 };
2576 };
2577
2578 port@5 {
2579 reg = <5>;
2580 isp1vin12: endpoint {
2581 remote-endpoint = <&vin12isp1>;
2582 };
2583 };
2584
2585 port@6 {
2586 reg = <6>;
2587 isp1vin13: endpoint {
2588 remote-endpoint = <&vin13isp1>;
2589 };
2590 };
2591
2592 port@7 {
2593 reg = <7>;
2594 isp1vin14: endpoint {
2595 remote-endpoint = <&vin14isp1>;
2596 };
2597 };
2598
2599 port@8 {
2600 reg = <8>;
2601 isp1vin15: endpoint {
2602 remote-endpoint = <&vin15isp1>;
2603 };
2604 };
2605 };
2606 };
2607
2608 isp2: isp@fed30000 {
2609 compatible = "renesas,r8a779a0-isp";
2610 reg = <0 0xfed30000 0 0x10000>;
2611 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
2612 clocks = <&cpg CPG_MOD 614>;
2613 power-domains = <&sysc R8A779A0_PD_A3ISP23>;
2614 resets = <&cpg 614>;
2615 status = "disabled";
2616
2617 ports {
2618 #address-cells = <1>;
2619 #size-cells = <0>;
2620
2621 port@0 {
2622 #address-cells = <1>;
2623 #size-cells = <0>;
2624
2625 reg = <0>;
2626
2627 isp2csi42: endpoint@0 {
2628 reg = <0>;
2629 remote-endpoint = <&csi42isp2>;
2630 };
2631 };
2632
2633 port@1 {
2634 reg = <1>;
2635 isp2vin16: endpoint {
2636 remote-endpoint = <&vin16isp2>;
2637 };
2638 };
2639
2640 port@2 {
2641 reg = <2>;
2642 isp2vin17: endpoint {
2643 remote-endpoint = <&vin17isp2>;
2644 };
2645 };
2646
2647 port@3 {
2648 reg = <3>;
2649 isp2vin18: endpoint {
2650 remote-endpoint = <&vin18isp2>;
2651 };
2652 };
2653
2654 port@4 {
2655 reg = <4>;
2656 isp2vin19: endpoint {
2657 remote-endpoint = <&vin19isp2>;
2658 };
2659 };
2660
2661 port@5 {
2662 reg = <5>;
2663 isp2vin20: endpoint {
2664 remote-endpoint = <&vin20isp2>;
2665 };
2666 };
2667
2668 port@6 {
2669 reg = <6>;
2670 isp2vin21: endpoint {
2671 remote-endpoint = <&vin21isp2>;
2672 };
2673 };
2674
2675 port@7 {
2676 reg = <7>;
2677 isp2vin22: endpoint {
2678 remote-endpoint = <&vin22isp2>;
2679 };
2680 };
2681
2682 port@8 {
2683 reg = <8>;
2684 isp2vin23: endpoint {
2685 remote-endpoint = <&vin23isp2>;
2686 };
2687 };
2688 };
2689 };
2690
2691 isp3: isp@fed40000 {
2692 compatible = "renesas,r8a779a0-isp";
2693 reg = <0 0xfed40000 0 0x10000>;
2694 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
2695 clocks = <&cpg CPG_MOD 615>;
2696 power-domains = <&sysc R8A779A0_PD_A3ISP23>;
2697 resets = <&cpg 615>;
2698 status = "disabled";
2699
2700 ports {
2701 #address-cells = <1>;
2702 #size-cells = <0>;
2703
2704 port@0 {
2705 #address-cells = <1>;
2706 #size-cells = <0>;
2707
2708 reg = <0>;
2709
2710 isp3csi43: endpoint@1 {
2711 reg = <1>;
2712 remote-endpoint = <&csi43isp3>;
2713 };
2714 };
2715
2716 port@1 {
2717 reg = <1>;
2718 isp3vin24: endpoint {
2719 remote-endpoint = <&vin24isp3>;
2720 };
2721 };
2722
2723 port@2 {
2724 reg = <2>;
2725 isp3vin25: endpoint {
2726 remote-endpoint = <&vin25isp3>;
2727 };
2728 };
2729
2730 port@3 {
2731 reg = <3>;
2732 isp3vin26: endpoint {
2733 remote-endpoint = <&vin26isp3>;
2734 };
2735 };
2736
2737 port@4 {
2738 reg = <4>;
2739 isp3vin27: endpoint {
2740 remote-endpoint = <&vin27isp3>;
2741 };
2742 };
2743
2744 port@5 {
2745 reg = <5>;
2746 isp3vin28: endpoint {
2747 remote-endpoint = <&vin28isp3>;
2748 };
2749 };
2750
2751 port@6 {
2752 reg = <6>;
2753 isp3vin29: endpoint {
2754 remote-endpoint = <&vin29isp3>;
2755 };
2756 };
2757
2758 port@7 {
2759 reg = <7>;
2760 isp3vin30: endpoint {
2761 remote-endpoint = <&vin30isp3>;
2762 };
2763 };
2764
2765 port@8 {
2766 reg = <8>;
2767 isp3vin31: endpoint {
2768 remote-endpoint = <&vin31isp3>;
2769 };
2770 };
2771 };
2772 };
2773
2774 dsi0: dsi-encoder@fed80000 {
2775 compatible = "renesas,r8a779a0-dsi-csi2-tx";
2776 reg = <0 0xfed80000 0 0x10000>;
2777 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2778 clocks = <&cpg CPG_MOD 415>,
2779 <&cpg CPG_CORE R8A779A0_CLK_DSI>,
2780 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
2781 clock-names = "fck", "dsi", "pll";
2782 resets = <&cpg 415>;
2783 status = "disabled";
2784
2785 ports {
2786 #address-cells = <1>;
2787 #size-cells = <0>;
2788
2789 port@0 {
2790 reg = <0>;
2791 dsi0_in: endpoint {
2792 remote-endpoint = <&du_out_dsi0>;
2793 };
2794 };
2795
2796 port@1 {
2797 reg = <1>;
2798 };
2799 };
2800 };
2801
2802 dsi1: dsi-encoder@fed90000 {
2803 compatible = "renesas,r8a779a0-dsi-csi2-tx";
2804 reg = <0 0xfed90000 0 0x10000>;
2805 power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
2806 clocks = <&cpg CPG_MOD 416>,
2807 <&cpg CPG_CORE R8A779A0_CLK_DSI>,
2808 <&cpg CPG_CORE R8A779A0_CLK_CL16MCK>;
2809 clock-names = "fck", "dsi", "pll";
2810 resets = <&cpg 416>;
2811 status = "disabled";
2812
2813 ports {
2814 #address-cells = <1>;
2815 #size-cells = <0>;
2816
2817 port@0 {
2818 reg = <0>;
2819 dsi1_in: endpoint {
2820 remote-endpoint = <&du_out_dsi1>;
2821 };
2822 };
2823
2824 port@1 {
2825 reg = <1>;
2826 };
2827 };
2828 };
2829
2830 prr: chipid@fff00044 {
2831 compatible = "renesas,prr";
2832 reg = <0 0xfff00044 0 4>;
2833 };
2834 };
2835
2836 thermal-zones {
2837 sensor1_thermal: sensor1-thermal {
2838 polling-delay-passive = <250>;
2839 polling-delay = <1000>;
2840 thermal-sensors = <&tsc 0>;
2841
2842 trips {
2843 sensor1_crit: sensor1-crit {
2844 temperature = <120000>;
2845 hysteresis = <1000>;
2846 type = "critical";
2847 };
2848 };
2849 };
2850
2851 sensor2_thermal: sensor2-thermal {
2852 polling-delay-passive = <250>;
2853 polling-delay = <1000>;
2854 thermal-sensors = <&tsc 1>;
2855
2856 trips {
2857 sensor2_crit: sensor2-crit {
2858 temperature = <120000>;
2859 hysteresis = <1000>;
2860 type = "critical";
2861 };
2862 };
2863 };
2864
2865 sensor3_thermal: sensor3-thermal {
2866 polling-delay-passive = <250>;
2867 polling-delay = <1000>;
2868 thermal-sensors = <&tsc 2>;
2869
2870 trips {
2871 sensor3_crit: sensor3-crit {
2872 temperature = <120000>;
2873 hysteresis = <1000>;
2874 type = "critical";
2875 };
2876 };
2877 };
2878
2879 sensor4_thermal: sensor4-thermal {
2880 polling-delay-passive = <250>;
2881 polling-delay = <1000>;
2882 thermal-sensors = <&tsc 3>;
2883
2884 trips {
2885 sensor4_crit: sensor4-crit {
2886 temperature = <120000>;
2887 hysteresis = <1000>;
2888 type = "critical";
2889 };
2890 };
2891 };
2892
2893 sensor5_thermal: sensor5-thermal {
2894 polling-delay-passive = <250>;
2895 polling-delay = <1000>;
2896 thermal-sensors = <&tsc 4>;
2897
2898 trips {
2899 sensor5_crit: sensor5-crit {
2900 temperature = <120000>;
2901 hysteresis = <1000>;
2902 type = "critical";
2903 };
2904 };
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]2905 };
2906 };
2907
2908 timer {
2909 compatible = "arm,armv8-timer";
Marek Vasutce132852023-09-17 16:13:11 +0200[diff] [blame^]2910 interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
2911 <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
2912 <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
2913 <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
Marek Vasut57111582021-04-25 22:28:00 +0200[diff] [blame]2914 };
2915};