Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / ccb83c6bf57c905e71a59543bd508bca745a95ea / . / configs / mscc_ocelot_defconfig
blob: 1797ad51862975ac026f14ccd0e96d5ea87534cc [file] [log] [blame]
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]1CONFIG_MIPS=y
2CONFIG_SYS_TEXT_BASE=0x40000000
3CONFIG_SYS_MALLOC_F_LEN=0x2000
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]4CONFIG_ENV_SIZE=0x2000
5CONFIG_ENV_OFFSET=0x100000
Tom Rini47dece32020-04-28 16:15:47 -0400[diff] [blame]6CONFIG_ENV_SECT_SIZE=0x40000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]7CONFIG_DM_GPIO=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]8CONFIG_DEBUG_UART_BOARD_INIT=y
9CONFIG_DEBUG_UART_BASE=0x70100000
10CONFIG_DEBUG_UART_CLOCK=250000000
Tom Rinid49f5822020-02-28 13:28:38 -0500[diff] [blame]11CONFIG_ENV_OFFSET_REDUND=0x140000
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]12CONFIG_ARCH_MSCC=y
Tom Rini84610272020-07-28 08:46:52 -0400[diff] [blame]13CONFIG_DEFAULT_DEVICE_TREE="ocelot_pcb123"
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]14CONFIG_SYS_LITTLE_ENDIAN=y
15CONFIG_DEBUG_UART=y
16CONFIG_FIT=y
17CONFIG_BOOTDELAY=3
18CONFIG_USE_BOOTARGS=y
19CONFIG_BOOTARGS="console=ttyS0,115200"
20CONFIG_LOGLEVEL=7
21CONFIG_DISPLAY_CPUINFO=y
Tom Rini9f8d9a22020-06-16 19:06:14 -0400[diff] [blame]22CONFIG_BOARD_TYPES=y
Tom Rini51876ec2020-06-16 19:06:11 -0400[diff] [blame]23CONFIG_BOARD_EARLY_INIT_R=y
Lars Povlsen90392822018-12-20 09:56:05 +0100[diff] [blame]24CONFIG_SYS_PROMPT="ocelot # "
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]25# CONFIG_CMD_BDI is not set
26# CONFIG_CMD_CONSOLE is not set
27# CONFIG_CMD_ELF is not set
28# CONFIG_CMD_EXPORTENV is not set
29# CONFIG_CMD_IMPORTENV is not set
30# CONFIG_CMD_CRC32 is not set
31CONFIG_CMD_MD5SUM=y
32CONFIG_CMD_MEMINFO=y
33CONFIG_CMD_MEMTEST=y
Ashok Reddy Soma41e8edf2020-05-04 15:26:21 +0200[diff] [blame]34CONFIG_SYS_MEMTEST_START=0x80000000
35CONFIG_SYS_MEMTEST_END=0x9fc00000
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]36# CONFIG_CMD_FLASH is not set
37CONFIG_CMD_GPIO=y
38CONFIG_CMD_MTD=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]39CONFIG_CMD_SPI=y
40CONFIG_CMD_DHCP=y
41# CONFIG_NET_TFTP_VARS is not set
42# CONFIG_CMD_NFS is not set
43CONFIG_CMD_PING=y
44CONFIG_CMD_MTDPARTS=y
45CONFIG_MTDIDS_DEFAULT="nor0=spi_flash"
46CONFIG_MTDPARTS_DEFAULT="mtdparts=spi_flash:512k(UBoot),256k(Env),256k(conf),15m(linux),15m(linux.bk)"
47CONFIG_CMD_UBI=y
48# CONFIG_CMD_UBIFS is not set
49# CONFIG_ISO_PARTITION is not set
Lars Povlsen90392822018-12-20 09:56:05 +0100[diff] [blame]50CONFIG_OF_LIST="ocelot_pcb120 ocelot_pcb123"
51CONFIG_DTB_RESELECT=y
52CONFIG_MULTI_DTB_FIT=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]53CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rini4bb26a42019-11-10 11:28:03 -0500[diff] [blame]54CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]55CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]56CONFIG_NET_RANDOM_ETHADDR=y
57CONFIG_CLK=y
Lars Povlsenc89dc232019-01-02 09:52:26 +0100[diff] [blame]58CONFIG_MSCC_SGPIO=y
59CONFIG_LED=y
60CONFIG_LED_GPIO=y
Miquel Raynal72d7b8b2019-10-03 19:50:07 +0200[diff] [blame]61CONFIG_MTD=y
Miquel Raynala903be42019-10-03 19:50:04 +0200[diff] [blame]62CONFIG_DM_MTD=y
Tom Rini88edbd02019-01-19 09:39:42 -0500[diff] [blame]63CONFIG_MTD_SPI_NAND=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]64CONFIG_DM_SPI_FLASH=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]65CONFIG_SPI_FLASH_BAR=y
66CONFIG_SPI_FLASH_GIGADEVICE=y
67CONFIG_SPI_FLASH_MACRONIX=y
68CONFIG_SPI_FLASH_SPANSION=y
69CONFIG_SPI_FLASH_WINBOND=y
70CONFIG_SPI_FLASH_MTD=y
71CONFIG_DM_ETH=y
Gregory CLEMENTa8112352019-01-17 17:07:15 +0100[diff] [blame]72CONFIG_MSCC_OCELOT_SWITCH=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]73CONFIG_PINCTRL=y
74CONFIG_PINCONF=y
Tom Rini37576b62020-06-16 19:06:21 -0400[diff] [blame]75CONFIG_SPECIFY_CONSOLE_INDEX=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]76CONFIG_DM_SERIAL=y
77CONFIG_DEBUG_UART_SHIFT=2
78CONFIG_DEBUG_UART_ANNOUNCE=y
79CONFIG_SYS_NS16550=y
80CONFIG_SPI=y
81CONFIG_DM_SPI=y
Gregory CLEMENTb622f8f2018-12-14 16:16:49 +0100[diff] [blame]82CONFIG_LZMA=y