blob: d868545a33f15d4dc101bf65683215d4b421468b [file] [log] [blame]
developere1de5d42018-11-15 10:07:49 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * MediaTek BootROM header definitions
4 *
5 * Copyright (C) 2018 MediaTek Inc.
6 * Author: Weijie Gao <weijie.gao@mediatek.com>
7 */
8
9#ifndef _MTK_IMAGE_H
10#define _MTK_IMAGE_H
11
Bin Meng3495f982019-10-27 05:19:41 -070012/* Device header definitions, all fields are little-endian */
developere1de5d42018-11-15 10:07:49 +080013
14/* Header for NOR/SD/eMMC */
15union gen_boot_header {
16 struct {
17 char name[12];
Bin Meng3495f982019-10-27 05:19:41 -070018 uint32_t version;
19 uint32_t size;
developere1de5d42018-11-15 10:07:49 +080020 };
21
22 uint8_t pad[0x200];
23};
24
25#define EMMC_BOOT_NAME "EMMC_BOOT"
26#define SF_BOOT_NAME "SF_BOOT"
27#define SDMMC_BOOT_NAME "SDMMC_BOOT"
28
29/* Header for NAND */
30union nand_boot_header {
31 struct {
32 char name[12];
33 char version[4];
34 char id[8];
Bin Meng3495f982019-10-27 05:19:41 -070035 uint16_t ioif;
36 uint16_t pagesize;
37 uint16_t addrcycles;
38 uint16_t oobsize;
39 uint16_t pages_of_block;
40 uint16_t numblocks;
41 uint16_t writesize_shift;
42 uint16_t erasesize_shift;
developere1de5d42018-11-15 10:07:49 +080043 uint8_t dummy[60];
44 uint8_t ecc_parity[28];
45 };
46
47 uint8_t data[0x80];
48};
49
50#define NAND_BOOT_NAME "BOOTLOADER!"
51#define NAND_BOOT_VERSION "V006"
52#define NAND_BOOT_ID "NFIINFO"
53
54/* BootROM layout header */
55struct brom_layout_header {
56 char name[8];
Bin Meng3495f982019-10-27 05:19:41 -070057 uint32_t version;
58 uint32_t header_size;
59 uint32_t total_size;
60 uint32_t magic;
61 uint32_t type;
62 uint32_t header_size_2;
63 uint32_t total_size_2;
64 uint32_t unused;
developere1de5d42018-11-15 10:07:49 +080065};
66
67#define BRLYT_NAME "BRLYT"
68#define BRLYT_MAGIC 0x42424242
69
70enum brlyt_img_type {
71 BRLYT_TYPE_INVALID = 0,
72 BRLYT_TYPE_NAND = 0x10002,
73 BRLYT_TYPE_EMMC = 0x10005,
74 BRLYT_TYPE_NOR = 0x10007,
75 BRLYT_TYPE_SDMMC = 0x10008,
76 BRLYT_TYPE_SNAND = 0x10009
77};
78
79/* Combined device header for NOR/SD/eMMC */
80struct gen_device_header {
81 union gen_boot_header boot;
82
83 union {
84 struct brom_layout_header brlyt;
85 uint8_t brlyt_pad[0x400];
86 };
87};
88
89/* BootROM header definitions */
90struct gfh_common_header {
91 uint8_t magic[3];
92 uint8_t version;
Bin Meng3495f982019-10-27 05:19:41 -070093 uint16_t size;
94 uint16_t type;
developere1de5d42018-11-15 10:07:49 +080095};
96
97#define GFH_HEADER_MAGIC "MMM"
98
99#define GFH_TYPE_FILE_INFO 0
100#define GFH_TYPE_BL_INFO 1
101#define GFH_TYPE_BROM_CFG 7
102#define GFH_TYPE_BL_SEC_KEY 3
103#define GFH_TYPE_ANTI_CLONE 2
104#define GFH_TYPE_BROM_SEC_CFG 8
105
106struct gfh_file_info {
107 struct gfh_common_header gfh;
108 char name[12];
Bin Meng3495f982019-10-27 05:19:41 -0700109 uint32_t unused;
110 uint16_t file_type;
developere1de5d42018-11-15 10:07:49 +0800111 uint8_t flash_type;
112 uint8_t sig_type;
Bin Meng3495f982019-10-27 05:19:41 -0700113 uint32_t load_addr;
114 uint32_t total_size;
115 uint32_t max_size;
116 uint32_t hdr_size;
117 uint32_t sig_size;
118 uint32_t jump_offset;
119 uint32_t processed;
developere1de5d42018-11-15 10:07:49 +0800120};
121
122#define GFH_FILE_INFO_NAME "FILE_INFO"
123
124#define GFH_FLASH_TYPE_GEN 5
125#define GFH_FLASH_TYPE_NAND 2
126
127#define GFH_SIG_TYPE_NONE 0
128#define GFH_SIG_TYPE_SHA256 1
129
130struct gfh_bl_info {
131 struct gfh_common_header gfh;
Bin Meng3495f982019-10-27 05:19:41 -0700132 uint32_t attr;
developere1de5d42018-11-15 10:07:49 +0800133};
134
135struct gfh_brom_cfg {
136 struct gfh_common_header gfh;
Bin Meng3495f982019-10-27 05:19:41 -0700137 uint32_t cfg_bits;
138 uint32_t usbdl_by_auto_detect_timeout_ms;
Fabien Parent541f6d32020-10-16 19:52:37 +0200139 uint8_t unused[0x45];
140 uint8_t jump_bl_arm64;
141 uint8_t unused2[2];
Bin Meng3495f982019-10-27 05:19:41 -0700142 uint32_t usbdl_by_kcol0_timeout_ms;
143 uint32_t usbdl_by_flag_timeout_ms;
developere1de5d42018-11-15 10:07:49 +0800144 uint32_t pad;
145};
146
147#define GFH_BROM_CFG_USBDL_BY_AUTO_DETECT_TIMEOUT_EN 0x02
148#define GFH_BROM_CFG_USBDL_AUTO_DETECT_DIS 0x10
149#define GFH_BROM_CFG_USBDL_BY_KCOL0_TIMEOUT_EN 0x80
150#define GFH_BROM_CFG_USBDL_BY_FLAG_TIMEOUT_EN 0x100
Fabien Parent541f6d32020-10-16 19:52:37 +0200151#define GFH_BROM_CFG_JUMP_BL_ARM64_EN 0x1000
152#define GFH_BROM_CFG_JUMP_BL_ARM64 0x64
developere1de5d42018-11-15 10:07:49 +0800153
154struct gfh_bl_sec_key {
155 struct gfh_common_header gfh;
156 uint8_t pad[0x20c];
157};
158
159struct gfh_anti_clone {
160 struct gfh_common_header gfh;
161 uint8_t ac_b2k;
162 uint8_t ac_b2c;
163 uint16_t pad;
Bin Meng3495f982019-10-27 05:19:41 -0700164 uint32_t ac_offset;
165 uint32_t ac_len;
developere1de5d42018-11-15 10:07:49 +0800166};
167
168struct gfh_brom_sec_cfg {
169 struct gfh_common_header gfh;
Bin Meng3495f982019-10-27 05:19:41 -0700170 uint32_t cfg_bits;
developere1de5d42018-11-15 10:07:49 +0800171 char customer_name[0x20];
Bin Meng3495f982019-10-27 05:19:41 -0700172 uint32_t pad;
developere1de5d42018-11-15 10:07:49 +0800173};
174
175#define BROM_SEC_CFG_JTAG_EN 1
176#define BROM_SEC_CFG_UART_EN 2
177
178struct gfh_header {
179 struct gfh_file_info file_info;
180 struct gfh_bl_info bl_info;
181 struct gfh_brom_cfg brom_cfg;
182 struct gfh_bl_sec_key bl_sec_key;
183 struct gfh_anti_clone anti_clone;
184 struct gfh_brom_sec_cfg brom_sec_cfg;
185};
186
187/* LK image header */
188
189union lk_hdr {
190 struct {
Bin Meng3495f982019-10-27 05:19:41 -0700191 uint32_t magic;
192 uint32_t size;
developere1de5d42018-11-15 10:07:49 +0800193 char name[32];
Bin Meng3495f982019-10-27 05:19:41 -0700194 uint32_t loadaddr;
195 uint32_t mode;
developere1de5d42018-11-15 10:07:49 +0800196 };
197
198 uint8_t data[512];
199};
200
201#define LK_PART_MAGIC 0x58881688
202
developercc129282022-05-20 11:24:10 +0800203/* MT7621 NAND SPL image header */
204
205#define MT7621_IH_NMLEN 12
206#define MT7621_IH_CRC_POLYNOMIAL 0x04c11db7
207
208struct mt7621_nand_header {
209 char ih_name[MT7621_IH_NMLEN];
210 uint32_t nand_ac_timing;
211 uint32_t ih_stage_offset;
212 uint32_t ih_bootloader_offset;
213 uint32_t nand_info_1_data;
214 uint32_t crc;
215};
216
217struct mt7621_stage1_header {
218 uint32_t jump_insn[2];
219 uint32_t ep;
220 uint32_t stage_size;
221 uint32_t has_stage2;
222 uint32_t next_ep;
223 uint32_t next_size;
224 uint32_t next_offset;
225};
226
developere1de5d42018-11-15 10:07:49 +0800227#endif /* _MTK_IMAGE_H */