Patrick Delaunay | 8e34fbb | 2022-05-20 18:24:39 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) |
| 2 | /* |
| 3 | * Copyright (C) STMicroelectronics 2021 - All Rights Reserved |
| 4 | * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> |
| 5 | */ |
| 6 | #include <dt-bindings/pinctrl/stm32-pinfunc.h> |
| 7 | |
| 8 | &pinctrl { |
Patrick Delaunay | 7f2cba4 | 2023-04-24 16:21:10 +0200 | [diff] [blame] | 9 | adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 { |
| 10 | pins { |
| 11 | pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */ |
| 12 | <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */ |
| 13 | }; |
| 14 | }; |
| 15 | |
| 16 | i2c1_pins_a: i2c1-0 { |
| 17 | pins { |
| 18 | pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */ |
| 19 | <STM32_PINMUX('E', 8, AF5)>; /* I2C1_SDA */ |
| 20 | bias-disable; |
| 21 | drive-open-drain; |
| 22 | slew-rate = <0>; |
| 23 | }; |
| 24 | }; |
| 25 | |
| 26 | i2c1_sleep_pins_a: i2c1-sleep-0 { |
| 27 | pins { |
| 28 | pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */ |
| 29 | <STM32_PINMUX('E', 8, ANALOG)>; /* I2C1_SDA */ |
| 30 | }; |
| 31 | }; |
| 32 | |
| 33 | i2c5_pins_a: i2c5-0 { |
| 34 | pins { |
| 35 | pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */ |
| 36 | <STM32_PINMUX('H', 6, AF4)>; /* I2C5_SDA */ |
| 37 | bias-disable; |
| 38 | drive-open-drain; |
| 39 | slew-rate = <0>; |
| 40 | }; |
| 41 | }; |
| 42 | |
| 43 | i2c5_sleep_pins_a: i2c5-sleep-0 { |
| 44 | pins { |
| 45 | pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */ |
| 46 | <STM32_PINMUX('H', 6, ANALOG)>; /* I2C5_SDA */ |
| 47 | }; |
| 48 | }; |
| 49 | |
| 50 | mcp23017_pins_a: mcp23017-0 { |
| 51 | pins { |
| 52 | pinmux = <STM32_PINMUX('G', 12, GPIO)>; |
| 53 | bias-pull-up; |
| 54 | }; |
| 55 | }; |
| 56 | |
| 57 | pwm3_pins_a: pwm3-0 { |
| 58 | pins { |
| 59 | pinmux = <STM32_PINMUX('B', 1, AF2)>; /* TIM3_CH4 */ |
| 60 | bias-pull-down; |
| 61 | drive-push-pull; |
| 62 | slew-rate = <0>; |
| 63 | }; |
| 64 | }; |
| 65 | |
| 66 | pwm3_sleep_pins_a: pwm3-sleep-0 { |
| 67 | pins { |
| 68 | pinmux = <STM32_PINMUX('B', 1, ANALOG)>; /* TIM3_CH4 */ |
| 69 | }; |
| 70 | }; |
| 71 | |
| 72 | pwm4_pins_a: pwm4-0 { |
| 73 | pins { |
| 74 | pinmux = <STM32_PINMUX('D', 13, AF2)>; /* TIM4_CH2 */ |
| 75 | bias-pull-down; |
| 76 | drive-push-pull; |
| 77 | slew-rate = <0>; |
| 78 | }; |
| 79 | }; |
| 80 | |
| 81 | pwm4_sleep_pins_a: pwm4-sleep-0 { |
| 82 | pins { |
| 83 | pinmux = <STM32_PINMUX('D', 13, ANALOG)>; /* TIM4_CH2 */ |
| 84 | }; |
| 85 | }; |
| 86 | |
| 87 | pwm8_pins_a: pwm8-0 { |
| 88 | pins { |
| 89 | pinmux = <STM32_PINMUX('E', 5, AF3)>; /* TIM8_CH3 */ |
| 90 | bias-pull-down; |
| 91 | drive-push-pull; |
| 92 | slew-rate = <0>; |
| 93 | }; |
| 94 | }; |
| 95 | |
| 96 | pwm8_sleep_pins_a: pwm8-sleep-0 { |
| 97 | pins { |
| 98 | pinmux = <STM32_PINMUX('E', 5, ANALOG)>; /* TIM8_CH3 */ |
| 99 | }; |
| 100 | }; |
| 101 | |
| 102 | pwm14_pins_a: pwm14-0 { |
| 103 | pins { |
| 104 | pinmux = <STM32_PINMUX('F', 9, AF9)>; /* TIM14_CH1 */ |
| 105 | bias-pull-down; |
| 106 | drive-push-pull; |
| 107 | slew-rate = <0>; |
| 108 | }; |
| 109 | }; |
| 110 | |
| 111 | pwm14_sleep_pins_a: pwm14-sleep-0 { |
| 112 | pins { |
| 113 | pinmux = <STM32_PINMUX('F', 9, ANALOG)>; /* TIM14_CH1 */ |
| 114 | }; |
| 115 | }; |
| 116 | |
Patrick Delaunay | 8e34fbb | 2022-05-20 18:24:39 +0200 | [diff] [blame] | 117 | sdmmc1_b4_pins_a: sdmmc1-b4-0 { |
| 118 | pins { |
| 119 | pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ |
| 120 | <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ |
| 121 | <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ |
| 122 | <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */ |
| 123 | <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ |
| 124 | slew-rate = <1>; |
| 125 | drive-push-pull; |
| 126 | bias-disable; |
| 127 | }; |
| 128 | }; |
| 129 | |
| 130 | sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 { |
| 131 | pins1 { |
| 132 | pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */ |
| 133 | <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */ |
| 134 | <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */ |
| 135 | <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */ |
| 136 | slew-rate = <1>; |
| 137 | drive-push-pull; |
| 138 | bias-disable; |
| 139 | }; |
| 140 | pins2 { |
| 141 | pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */ |
| 142 | slew-rate = <1>; |
| 143 | drive-open-drain; |
| 144 | bias-disable; |
| 145 | }; |
| 146 | }; |
| 147 | |
| 148 | sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 { |
| 149 | pins { |
| 150 | pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */ |
| 151 | <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */ |
| 152 | <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */ |
| 153 | <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */ |
| 154 | <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */ |
| 155 | <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */ |
| 156 | }; |
| 157 | }; |
| 158 | |
| 159 | sdmmc1_clk_pins_a: sdmmc1-clk-0 { |
| 160 | pins { |
| 161 | pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */ |
| 162 | slew-rate = <1>; |
| 163 | drive-push-pull; |
| 164 | bias-disable; |
| 165 | }; |
| 166 | }; |
| 167 | |
| 168 | sdmmc2_b4_pins_a: sdmmc2-b4-0 { |
| 169 | pins { |
| 170 | pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */ |
| 171 | <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */ |
| 172 | <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */ |
| 173 | <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */ |
| 174 | <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ |
| 175 | slew-rate = <1>; |
| 176 | drive-push-pull; |
| 177 | bias-pull-up; |
| 178 | }; |
| 179 | }; |
| 180 | |
| 181 | sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 { |
| 182 | pins1 { |
| 183 | pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */ |
| 184 | <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */ |
| 185 | <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */ |
| 186 | <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */ |
| 187 | slew-rate = <1>; |
| 188 | drive-push-pull; |
| 189 | bias-pull-up; |
| 190 | }; |
| 191 | pins2 { |
| 192 | pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */ |
| 193 | slew-rate = <1>; |
| 194 | drive-open-drain; |
| 195 | bias-pull-up; |
| 196 | }; |
| 197 | }; |
| 198 | |
| 199 | sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 { |
| 200 | pins { |
| 201 | pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */ |
| 202 | <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */ |
| 203 | <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */ |
| 204 | <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */ |
| 205 | <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */ |
| 206 | <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */ |
| 207 | }; |
| 208 | }; |
| 209 | |
| 210 | sdmmc2_clk_pins_a: sdmmc2-clk-0 { |
| 211 | pins { |
| 212 | pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */ |
| 213 | slew-rate = <1>; |
| 214 | drive-push-pull; |
| 215 | bias-pull-up; |
| 216 | }; |
| 217 | }; |
| 218 | |
Patrick Delaunay | 7f2cba4 | 2023-04-24 16:21:10 +0200 | [diff] [blame] | 219 | spi5_pins_a: spi5-0 { |
| 220 | pins1 { |
| 221 | pinmux = <STM32_PINMUX('H', 7, AF6)>, /* SPI5_SCK */ |
| 222 | <STM32_PINMUX('H', 3, AF5)>; /* SPI5_MOSI */ |
| 223 | bias-disable; |
| 224 | drive-push-pull; |
| 225 | slew-rate = <1>; |
| 226 | }; |
| 227 | |
| 228 | pins2 { |
| 229 | pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */ |
| 230 | bias-disable; |
| 231 | }; |
| 232 | }; |
| 233 | |
| 234 | spi5_sleep_pins_a: spi5-sleep-0 { |
| 235 | pins { |
| 236 | pinmux = <STM32_PINMUX('H', 7, ANALOG)>, /* SPI5_SCK */ |
| 237 | <STM32_PINMUX('A', 8, ANALOG)>, /* SPI5_MISO */ |
| 238 | <STM32_PINMUX('H', 3, ANALOG)>; /* SPI5_MOSI */ |
| 239 | }; |
| 240 | }; |
| 241 | |
| 242 | stm32g0_intn_pins_a: stm32g0-intn-0 { |
| 243 | pins { |
| 244 | pinmux = <STM32_PINMUX('I', 2, GPIO)>; |
| 245 | bias-pull-up; |
| 246 | }; |
| 247 | }; |
| 248 | |
Patrick Delaunay | 8e34fbb | 2022-05-20 18:24:39 +0200 | [diff] [blame] | 249 | uart4_pins_a: uart4-0 { |
| 250 | pins1 { |
| 251 | pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */ |
| 252 | bias-disable; |
| 253 | drive-push-pull; |
| 254 | slew-rate = <0>; |
| 255 | }; |
| 256 | pins2 { |
| 257 | pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */ |
| 258 | bias-disable; |
| 259 | }; |
| 260 | }; |
Patrick Delaunay | 4597d26 | 2023-07-10 10:38:45 +0200 | [diff] [blame] | 261 | |
| 262 | uart4_idle_pins_a: uart4-idle-0 { |
| 263 | pins1 { |
| 264 | pinmux = <STM32_PINMUX('D', 6, ANALOG)>; /* UART4_TX */ |
| 265 | }; |
| 266 | pins2 { |
| 267 | pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */ |
| 268 | bias-disable; |
| 269 | }; |
| 270 | }; |
| 271 | |
| 272 | uart4_sleep_pins_a: uart4-sleep-0 { |
| 273 | pins { |
| 274 | pinmux = <STM32_PINMUX('D', 6, ANALOG)>, /* UART4_TX */ |
| 275 | <STM32_PINMUX('D', 8, ANALOG)>; /* UART4_RX */ |
| 276 | }; |
| 277 | }; |
| 278 | |
| 279 | uart8_pins_a: uart8-0 { |
| 280 | pins1 { |
| 281 | pinmux = <STM32_PINMUX('E', 1, AF8)>; /* UART8_TX */ |
| 282 | bias-disable; |
| 283 | drive-push-pull; |
| 284 | slew-rate = <0>; |
| 285 | }; |
| 286 | pins2 { |
| 287 | pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */ |
| 288 | bias-pull-up; |
| 289 | }; |
| 290 | }; |
| 291 | |
| 292 | uart8_idle_pins_a: uart8-idle-0 { |
| 293 | pins1 { |
| 294 | pinmux = <STM32_PINMUX('E', 1, ANALOG)>; /* UART8_TX */ |
| 295 | }; |
| 296 | pins2 { |
| 297 | pinmux = <STM32_PINMUX('F', 9, AF8)>; /* UART8_RX */ |
| 298 | bias-pull-up; |
| 299 | }; |
| 300 | }; |
| 301 | |
| 302 | uart8_sleep_pins_a: uart8-sleep-0 { |
| 303 | pins { |
| 304 | pinmux = <STM32_PINMUX('E', 1, ANALOG)>, /* UART8_TX */ |
| 305 | <STM32_PINMUX('F', 9, ANALOG)>; /* UART8_RX */ |
| 306 | }; |
| 307 | }; |
| 308 | |
| 309 | usart1_pins_a: usart1-0 { |
| 310 | pins1 { |
| 311 | pinmux = <STM32_PINMUX('C', 0, AF7)>, /* USART1_TX */ |
| 312 | <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */ |
| 313 | bias-disable; |
| 314 | drive-push-pull; |
| 315 | slew-rate = <0>; |
| 316 | }; |
| 317 | pins2 { |
| 318 | pinmux = <STM32_PINMUX('B', 0, AF4)>, /* USART1_RX */ |
| 319 | <STM32_PINMUX('A', 7, AF7)>; /* USART1_CTS_NSS */ |
| 320 | bias-pull-up; |
| 321 | }; |
| 322 | }; |
| 323 | |
| 324 | usart1_idle_pins_a: usart1-idle-0 { |
| 325 | pins1 { |
| 326 | pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */ |
| 327 | <STM32_PINMUX('A', 7, ANALOG)>; /* USART1_CTS_NSS */ |
| 328 | }; |
| 329 | pins2 { |
| 330 | pinmux = <STM32_PINMUX('C', 2, AF7)>; /* USART1_RTS */ |
| 331 | bias-disable; |
| 332 | drive-push-pull; |
| 333 | slew-rate = <0>; |
| 334 | }; |
| 335 | pins3 { |
| 336 | pinmux = <STM32_PINMUX('B', 0, AF4)>; /* USART1_RX */ |
| 337 | bias-pull-up; |
| 338 | }; |
| 339 | }; |
| 340 | |
| 341 | usart1_sleep_pins_a: usart1-sleep-0 { |
| 342 | pins { |
| 343 | pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* USART1_TX */ |
| 344 | <STM32_PINMUX('C', 2, ANALOG)>, /* USART1_RTS */ |
| 345 | <STM32_PINMUX('A', 7, ANALOG)>, /* USART1_CTS_NSS */ |
| 346 | <STM32_PINMUX('B', 0, ANALOG)>; /* USART1_RX */ |
| 347 | }; |
| 348 | }; |
| 349 | |
| 350 | usart2_pins_a: usart2-0 { |
| 351 | pins1 { |
| 352 | pinmux = <STM32_PINMUX('H', 12, AF1)>, /* USART2_TX */ |
| 353 | <STM32_PINMUX('D', 4, AF3)>; /* USART2_RTS */ |
| 354 | bias-disable; |
| 355 | drive-push-pull; |
| 356 | slew-rate = <0>; |
| 357 | }; |
| 358 | pins2 { |
| 359 | pinmux = <STM32_PINMUX('D', 15, AF1)>, /* USART2_RX */ |
| 360 | <STM32_PINMUX('E', 11, AF2)>; /* USART2_CTS_NSS */ |
| 361 | bias-disable; |
| 362 | }; |
| 363 | }; |
| 364 | |
| 365 | usart2_idle_pins_a: usart2-idle-0 { |
| 366 | pins1 { |
| 367 | pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */ |
| 368 | <STM32_PINMUX('E', 11, ANALOG)>; /* USART2_CTS_NSS */ |
| 369 | }; |
| 370 | pins2 { |
| 371 | pinmux = <STM32_PINMUX('D', 4, AF3)>; /* USART2_RTS */ |
| 372 | bias-disable; |
| 373 | drive-push-pull; |
| 374 | slew-rate = <0>; |
| 375 | }; |
| 376 | pins3 { |
| 377 | pinmux = <STM32_PINMUX('D', 15, AF1)>; /* USART2_RX */ |
| 378 | bias-disable; |
| 379 | }; |
| 380 | }; |
| 381 | |
| 382 | usart2_sleep_pins_a: usart2-sleep-0 { |
| 383 | pins { |
| 384 | pinmux = <STM32_PINMUX('H', 12, ANALOG)>, /* USART2_TX */ |
| 385 | <STM32_PINMUX('D', 4, ANALOG)>, /* USART2_RTS */ |
| 386 | <STM32_PINMUX('D', 15, ANALOG)>, /* USART2_RX */ |
| 387 | <STM32_PINMUX('E', 11, ANALOG)>; /* USART2_CTS_NSS */ |
| 388 | }; |
| 389 | }; |
Patrick Delaunay | 8e34fbb | 2022-05-20 18:24:39 +0200 | [diff] [blame] | 390 | }; |