| Tero Kristo | 9bae57e | 2020-06-16 11:03:05 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| Nishanth Menon | eaa39c6 | 2023-11-01 15:56:03 -0500 | [diff] [blame] | 3 | * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ |
| Tero Kristo | 9bae57e | 2020-06-16 11:03:05 +0300 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | &twl { |
| 7 | /* |
| 8 | * On most OMAP4 platforms, the twl6030 IRQ line is connected |
| 9 | * to the SYS_NIRQ1 line on OMAP and the twl6030 MSECURE line is |
| 10 | * connected to the fref_clk0_out.sys_drm_msecure line. |
| 11 | * Therefore, configure the defaults for the SYS_NIRQ1 and |
| 12 | * fref_clk0_out.sys_drm_msecure pins here. |
| 13 | */ |
| 14 | pinctrl-names = "default"; |
| 15 | pinctrl-0 = < |
| 16 | &twl6030_pins |
| 17 | &twl6030_wkup_pins |
| 18 | >; |
| 19 | }; |
| 20 | |
| 21 | &omap4_pmx_wkup { |
| 22 | twl6030_wkup_pins: pinmux_twl6030_wkup_pins { |
| 23 | pinctrl-single,pins = < |
| 24 | OMAP4_IOPAD(0x054, PIN_OUTPUT | MUX_MODE2) /* fref_clk0_out.sys_drm_msecure */ |
| 25 | >; |
| 26 | }; |
| 27 | }; |
| 28 | |
| 29 | &omap4_pmx_core { |
| 30 | twl6030_pins: pinmux_twl6030_pins { |
| 31 | pinctrl-single,pins = < |
| 32 | OMAP4_IOPAD(0x19e, WAKEUP_EN | PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1.sys_nirq1 */ |
| 33 | >; |
| 34 | }; |
| 35 | }; |