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Peng Fanaeb9c062018-11-20 10:20:00 +00001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 NXP
4 */
5
6#ifndef __IMX8M_EVK_H
7#define __IMX8M_EVK_H
8
9#include <linux/sizes.h>
Simon Glassfb64e362020-05-10 11:40:09 -060010#include <linux/stringify.h>
Peng Fanaeb9c062018-11-20 10:20:00 +000011#include <asm/arch/imx-regs.h>
12
Peng Fanaeb9c062018-11-20 10:20:00 +000013#ifdef CONFIG_SPL_BUILD
14/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
Peng Fanaeb9c062018-11-20 10:20:00 +000015#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
Peng Fanaeb9c062018-11-20 10:20:00 +000016
17/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
18#define CONFIG_MALLOC_F_ADDR 0x182000
19/* For RAW image gives a error info not panic */
Peng Fanaeb9c062018-11-20 10:20:00 +000020
Peng Fanaeb9c062018-11-20 10:20:00 +000021#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
22#endif
23
Peng Fanaeb9c062018-11-20 10:20:00 +000024/* ENET Config */
25/* ENET1 */
26#if defined(CONFIG_CMD_NET)
Peng Fanaeb9c062018-11-20 10:20:00 +000027#define CONFIG_FEC_MXC_PHYADDR 0
Peng Fanaeb9c062018-11-20 10:20:00 +000028#endif
29
Alice Guoa349b3b2021-01-14 16:23:23 +080030#define BOOT_TARGET_DEVICES(func) \
31 func(MMC, mmc, 0) \
32 func(MMC, mmc, 1) \
33 func(DHCP, dhcp, na)
34
35#include <config_distro_bootcmd.h>
Alice Guoa349b3b2021-01-14 16:23:23 +080036
Peng Fanaeb9c062018-11-20 10:20:00 +000037/* Initial environment variables */
Tom Rinic9edebe2022-12-04 10:03:50 -050038#define CFG_EXTRA_ENV_SETTINGS \
Alice Guoa349b3b2021-01-14 16:23:23 +080039 BOOTENV \
Andrey Zhizhikin202dc912022-01-16 22:38:31 +010040 "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
41 "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
Peng Fanaeb9c062018-11-20 10:20:00 +000042 "image=Image\0" \
Fabio Estevam21b135a2019-12-11 14:31:03 -030043 "console=ttymxc0,115200\0" \
Andrey Zhizhikin202dc912022-01-16 22:38:31 +010044 "fdt_addr_r=0x43000000\0" \
Peng Fanaeb9c062018-11-20 10:20:00 +000045 "boot_fdt=try\0" \
Andrey Zhizhikin202dc912022-01-16 22:38:31 +010046 "fdtfile=imx8mq-evk.dtb\0" \
Peng Fanaeb9c062018-11-20 10:20:00 +000047 "initrd_addr=0x43800000\0" \
Grygorii Tertychnyi4d7cbe52020-08-21 15:39:43 +020048 "bootm_size=0x10000000\0" \
Tom Rinib113bca2021-12-11 14:55:52 -050049 "mmcpart=1\0" \
Peng Fanbb4bb582022-04-15 12:23:41 +080050 "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
Peng Fanaeb9c062018-11-20 10:20:00 +000051
52/* Link Definitions */
Peng Fanaeb9c062018-11-20 10:20:00 +000053
Tom Rini6a5dccc2022-11-16 13:10:41 -050054#define CFG_SYS_INIT_RAM_ADDR 0x40000000
55#define CFG_SYS_INIT_RAM_SIZE 0x80000
Peng Fanaeb9c062018-11-20 10:20:00 +000056
Peng Fanaeb9c062018-11-20 10:20:00 +000057
Tom Rinibb4dd962022-11-16 13:10:37 -050058#define CFG_SYS_SDRAM_BASE 0x40000000
Peng Fanaeb9c062018-11-20 10:20:00 +000059#define PHYS_SDRAM 0x40000000
60#define PHYS_SDRAM_SIZE 0xC0000000 /* 3GB DDR */
61
Marek Vasut86a27482022-04-24 23:44:03 +020062#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
Peng Fanaeb9c062018-11-20 10:20:00 +000063
Tom Rini376b88a2022-10-28 20:27:13 -040064#define CFG_SYS_FSL_USDHC_NUM 2
65#define CFG_SYS_FSL_ESDHC_ADDR 0
Peng Fanaeb9c062018-11-20 10:20:00 +000066
Peng Fanaeb9c062018-11-20 10:20:00 +000067#endif