blob: 68b2773875ee8dd2863f39d4bc0bb64ba36e3f30 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass558ec672017-04-05 16:23:36 -06002/*
3 * (C) Copyright 2012 Stephen Warren
Simon Glass558ec672017-04-05 16:23:36 -06004 */
5
6#include <common.h>
7#include <memalign.h>
Simon Glass31efc382017-04-05 16:23:40 -06008#include <phys2bus.h>
Simon Glass558ec672017-04-05 16:23:36 -06009#include <asm/arch/mbox.h>
Nicolas Saenz Julienne2ae573d2020-06-29 18:37:22 +020010#include <linux/delay.h>
Simon Glass558ec672017-04-05 16:23:36 -060011
12struct msg_set_power_state {
13 struct bcm2835_mbox_hdr hdr;
14 struct bcm2835_mbox_tag_set_power_state set_power_state;
15 u32 end_tag;
16};
17
Simon Glass13ddef82017-04-05 16:23:37 -060018struct msg_get_clock_rate {
19 struct bcm2835_mbox_hdr hdr;
20 struct bcm2835_mbox_tag_get_clock_rate get_clock_rate;
21 u32 end_tag;
22};
23
Simon Glass31efc382017-04-05 16:23:40 -060024struct msg_query {
25 struct bcm2835_mbox_hdr hdr;
26 struct bcm2835_mbox_tag_physical_w_h physical_w_h;
27 u32 end_tag;
28};
29
Simon Glass929df012017-04-05 16:23:41 -060030struct msg_setup {
31 struct bcm2835_mbox_hdr hdr;
32 struct bcm2835_mbox_tag_physical_w_h physical_w_h;
33 struct bcm2835_mbox_tag_virtual_w_h virtual_w_h;
34 struct bcm2835_mbox_tag_depth depth;
35 struct bcm2835_mbox_tag_pixel_order pixel_order;
36 struct bcm2835_mbox_tag_alpha_mode alpha_mode;
37 struct bcm2835_mbox_tag_virtual_offset virtual_offset;
38 struct bcm2835_mbox_tag_overscan overscan;
39 struct bcm2835_mbox_tag_allocate_buffer allocate_buffer;
40 struct bcm2835_mbox_tag_pitch pitch;
41 u32 end_tag;
42};
43
Nicolas Saenz Julienne2ae573d2020-06-29 18:37:22 +020044struct msg_notify_vl805_reset {
45 struct bcm2835_mbox_hdr hdr;
46 struct bcm2835_mbox_tag_pci_dev_addr dev_addr;
47 u32 end_tag;
48};
49
Simon Glass558ec672017-04-05 16:23:36 -060050int bcm2835_power_on_module(u32 module)
51{
52 ALLOC_CACHE_ALIGN_BUFFER(struct msg_set_power_state, msg_pwr, 1);
53 int ret;
54
55 BCM2835_MBOX_INIT_HDR(msg_pwr);
56 BCM2835_MBOX_INIT_TAG(&msg_pwr->set_power_state,
57 SET_POWER_STATE);
58 msg_pwr->set_power_state.body.req.device_id = module;
59 msg_pwr->set_power_state.body.req.state =
60 BCM2835_MBOX_SET_POWER_STATE_REQ_ON |
61 BCM2835_MBOX_SET_POWER_STATE_REQ_WAIT;
62
63 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
64 &msg_pwr->hdr);
65 if (ret) {
66 printf("bcm2835: Could not set module %u power state\n",
67 module);
68 return -EIO;
69 }
70
71 return 0;
72}
Simon Glass13ddef82017-04-05 16:23:37 -060073
Jonathan Grayf98c4852018-03-17 16:15:48 +110074int bcm2835_get_mmc_clock(u32 clock_id)
Simon Glass13ddef82017-04-05 16:23:37 -060075{
76 ALLOC_CACHE_ALIGN_BUFFER(struct msg_get_clock_rate, msg_clk, 1);
77 int ret;
Vincent Fazioe02cb882021-09-14 13:19:18 -050078 u32 clock_rate = 0;
Simon Glass13ddef82017-04-05 16:23:37 -060079
80 ret = bcm2835_power_on_module(BCM2835_MBOX_POWER_DEVID_SDHCI);
81 if (ret)
82 return ret;
83
84 BCM2835_MBOX_INIT_HDR(msg_clk);
85 BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_CLOCK_RATE);
Jonathan Grayf98c4852018-03-17 16:15:48 +110086 msg_clk->get_clock_rate.body.req.clock_id = clock_id;
Simon Glass13ddef82017-04-05 16:23:37 -060087
88 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr);
89 if (ret) {
90 printf("bcm2835: Could not query eMMC clock rate\n");
91 return -EIO;
92 }
93
Vincent Fazioe02cb882021-09-14 13:19:18 -050094 clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz;
95
96 if (clock_rate == 0) {
97 BCM2835_MBOX_INIT_HDR(msg_clk);
98 BCM2835_MBOX_INIT_TAG(&msg_clk->get_clock_rate, GET_MAX_CLOCK_RATE);
99 msg_clk->get_clock_rate.body.req.clock_id = clock_id;
100
101 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_clk->hdr);
102 if (ret) {
103 printf("bcm2835: Could not query max eMMC clock rate\n");
104 return -EIO;
105 }
106
107 clock_rate = msg_clk->get_clock_rate.body.resp.rate_hz;
108 }
109
110 return clock_rate;
Simon Glass13ddef82017-04-05 16:23:37 -0600111}
Simon Glass31efc382017-04-05 16:23:40 -0600112
113int bcm2835_get_video_size(int *widthp, int *heightp)
114{
115 ALLOC_CACHE_ALIGN_BUFFER(struct msg_query, msg_query, 1);
116 int ret;
117
118 BCM2835_MBOX_INIT_HDR(msg_query);
119 BCM2835_MBOX_INIT_TAG_NO_REQ(&msg_query->physical_w_h,
120 GET_PHYSICAL_W_H);
121 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_query->hdr);
122 if (ret) {
123 printf("bcm2835: Could not query display resolution\n");
124 return ret;
125 }
126 *widthp = msg_query->physical_w_h.body.resp.width;
127 *heightp = msg_query->physical_w_h.body.resp.height;
128
129 return 0;
130}
Simon Glass929df012017-04-05 16:23:41 -0600131
132int bcm2835_set_video_params(int *widthp, int *heightp, int depth_bpp,
133 int pixel_order, int alpha_mode, ulong *fb_basep,
134 ulong *fb_sizep, int *pitchp)
135{
136 ALLOC_CACHE_ALIGN_BUFFER(struct msg_setup, msg_setup, 1);
137 int ret;
138
139 BCM2835_MBOX_INIT_HDR(msg_setup);
140 BCM2835_MBOX_INIT_TAG(&msg_setup->physical_w_h, SET_PHYSICAL_W_H);
141 msg_setup->physical_w_h.body.req.width = *widthp;
142 msg_setup->physical_w_h.body.req.height = *heightp;
143 BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_w_h, SET_VIRTUAL_W_H);
144 msg_setup->virtual_w_h.body.req.width = *widthp;
145 msg_setup->virtual_w_h.body.req.height = *heightp;
146 BCM2835_MBOX_INIT_TAG(&msg_setup->depth, SET_DEPTH);
147 msg_setup->depth.body.req.bpp = 32;
148 BCM2835_MBOX_INIT_TAG(&msg_setup->pixel_order, SET_PIXEL_ORDER);
149 msg_setup->pixel_order.body.req.order = pixel_order;
150 BCM2835_MBOX_INIT_TAG(&msg_setup->alpha_mode, SET_ALPHA_MODE);
151 msg_setup->alpha_mode.body.req.alpha = alpha_mode;
152 BCM2835_MBOX_INIT_TAG(&msg_setup->virtual_offset, SET_VIRTUAL_OFFSET);
153 msg_setup->virtual_offset.body.req.x = 0;
154 msg_setup->virtual_offset.body.req.y = 0;
155 BCM2835_MBOX_INIT_TAG(&msg_setup->overscan, SET_OVERSCAN);
156 msg_setup->overscan.body.req.top = 0;
157 msg_setup->overscan.body.req.bottom = 0;
158 msg_setup->overscan.body.req.left = 0;
159 msg_setup->overscan.body.req.right = 0;
160 BCM2835_MBOX_INIT_TAG(&msg_setup->allocate_buffer, ALLOCATE_BUFFER);
161 msg_setup->allocate_buffer.body.req.alignment = 0x100;
162 BCM2835_MBOX_INIT_TAG_NO_REQ(&msg_setup->pitch, GET_PITCH);
163
164 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN, &msg_setup->hdr);
165 if (ret) {
166 printf("bcm2835: Could not configure display\n");
167 return ret;
168 }
169 *widthp = msg_setup->physical_w_h.body.resp.width;
170 *heightp = msg_setup->physical_w_h.body.resp.height;
171 *pitchp = msg_setup->pitch.body.resp.pitch;
172 *fb_basep = bus_to_phys(
173 msg_setup->allocate_buffer.body.resp.fb_address);
174 *fb_sizep = msg_setup->allocate_buffer.body.resp.fb_size;
175
176 return 0;
177}
Nicolas Saenz Julienne2ae573d2020-06-29 18:37:22 +0200178
179/*
180 * On the Raspberry Pi 4, after a PCI reset, VL805's (the xHCI chip) firmware
181 * may either be loaded directly from an EEPROM or, if not present, by the
182 * SoC's VideoCore. This informs VideoCore that VL805 needs its firmware
183 * loaded.
184 */
185int bcm2711_notify_vl805_reset(void)
186{
187 ALLOC_CACHE_ALIGN_BUFFER(struct msg_notify_vl805_reset,
188 msg_notify_vl805_reset, 1);
189 int ret;
Marek Szyprowski34d298c2021-09-17 10:19:43 +0200190 static int done = false;
191
192 if (done)
193 return 0;
194
195 done = true;
Nicolas Saenz Julienne2ae573d2020-06-29 18:37:22 +0200196
197 BCM2835_MBOX_INIT_HDR(msg_notify_vl805_reset);
198 BCM2835_MBOX_INIT_TAG(&msg_notify_vl805_reset->dev_addr,
199 NOTIFY_XHCI_RESET);
200
201 /*
202 * The pci device address is expected like this:
203 *
204 * PCI_BUS << 20 | PCI_SLOT << 15 | PCI_FUNC << 12
205 *
206 * But since RPi4's PCIe setup is hardwired, we know the address in
207 * advance.
208 */
209 msg_notify_vl805_reset->dev_addr.body.req.dev_addr = 0x100000;
210
211 ret = bcm2835_mbox_call_prop(BCM2835_MBOX_PROP_CHAN,
212 &msg_notify_vl805_reset->hdr);
213 if (ret) {
Vagrant Cascadian85e747a2021-12-21 13:06:52 -0800214 printf("bcm2711: Failed to load vl805's firmware, %d\n", ret);
Nicolas Saenz Julienne2ae573d2020-06-29 18:37:22 +0200215 return -EIO;
216 }
217
218 udelay(200);
219
220 return 0;
221}