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git01.mediatek.com / filogic / uboot / c9285bf61ab39091553fce5c8871797a55f31f07 / . / configs / omapl138_lcdk_defconfig
blob: b5ff1f6b28847bc18dfbdbcb5506be99af845746 [file] [log] [blame]
Peter Howard9ed4f702015-03-23 09:19:56 +1100[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_DAVINCI=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0xc1080000
Peter Howard9ed4f702015-03-23 09:19:56 +1100[diff] [blame]4CONFIG_TARGET_OMAPL138_LCDK=y
David Lechner5425f2d2018-03-14 20:36:30 -0500[diff] [blame]5CONFIG_SYS_DA850_PLL0_POSTDIV=0
Adam Ford71750ee2018-01-23 04:04:28 -0600[diff] [blame]6CONFIG_SYS_DA850_PLL1_PLLDIV3=0x8003
Sekhar Noria552b442017-05-11 20:14:22 +0530[diff] [blame]7CONFIG_TI_COMMON_CMD_OPTIONS=y
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]8CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]9CONFIG_SPL_LIBGENERIC_SUPPORT=y
Fabien Parenta6b8b952017-01-09 11:06:37 +0100[diff] [blame]10CONFIG_SPL_MMC_SUPPORT=y
Simon Glasse076d6f2016-09-12 23:18:56 -0600[diff] [blame]11CONFIG_SPL_SERIAL_SUPPORT=y
Tom Rinif2260382018-08-16 08:16:24 -0400[diff] [blame]12CONFIG_NR_DRAM_BANKS=1
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame^]13CONFIG_SPL=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]14CONFIG_BOOTDELAY=3
Jean-Jacques Hiblot1d1a32d2017-11-30 17:44:04 +0100[diff] [blame]15CONFIG_LOGLEVEL=3
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]16CONFIG_MISC_INIT_R=y
Heiko Schocher20ea7ab2016-09-09 08:12:49 +0200[diff] [blame]17CONFIG_VERSION_VARIABLE=y
Lokesh Vutlafbad3702016-10-08 14:41:44 -0400[diff] [blame]18# CONFIG_DISPLAY_CPUINFO is not set
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]19CONFIG_BOARD_EARLY_INIT_F=y
Ley Foon Tan48fcc4a2017-05-03 17:13:32 +0800[diff] [blame]20CONFIG_SPL_BOARD_INIT=y
Fabien Parentce9d1712016-11-29 14:23:41 +0100[diff] [blame]21CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]22CONFIG_SPL_NAND_SUPPORT=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]23CONFIG_HUSH_PARSER=y
Daniel Thompsona9e2c672017-05-19 17:26:58 +0100[diff] [blame]24CONFIG_CRC32_VERIFY=y
Simon Glass4590d4e2017-05-17 03:25:10 -0600[diff] [blame]25# CONFIG_CMD_EEPROM is not set
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]26# CONFIG_CMD_FLASH is not set
Sekhar Noria552b442017-05-11 20:14:22 +0530[diff] [blame]27# CONFIG_CMD_GPIO is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]28CONFIG_CMD_NAND=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]29# CONFIG_CMD_SETEXPR is not set
Tom Rini2b62b912018-11-13 19:54:45 -0500[diff] [blame]30CONFIG_CMD_MTDPARTS=y
Simon Glass20ea5632017-04-26 22:28:08 -0600[diff] [blame]31CONFIG_CMD_DIAG=y
32CONFIG_CMD_UBI=y
Lokesh Vutlad601a6e2018-03-16 18:52:21 +0530[diff] [blame]33CONFIG_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]34CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]35CONFIG_ENV_IS_IN_NAND=y
Anna, Suman50e87c52017-05-16 12:50:18 -0500[diff] [blame]36CONFIG_NET_RANDOM_ETHADDR=y
Lokesh Vutlad601a6e2018-03-16 18:52:21 +0530[diff] [blame]37CONFIG_DM=y
38CONFIG_DM_I2C=y
39CONFIG_DM_I2C_COMPAT=y
Adam Forddecc8952018-08-10 05:05:22 -0500[diff] [blame]40CONFIG_SYS_I2C_DAVINCI=y
Adam Fordd4df8142018-08-09 06:15:14 -0500[diff] [blame]41CONFIG_DM_MMC=y
Adam Ford42efb612017-08-07 17:37:18 -0400[diff] [blame]42CONFIG_NAND=y
Adam Ford66466b02018-07-08 06:43:36 -0500[diff] [blame]43CONFIG_NAND_DAVINCI=y
Adam Ford5b7c9f02017-10-16 14:08:26 -0500[diff] [blame]44CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
Fabien Parenta2e4dac2016-11-29 14:31:34 +0100[diff] [blame]45CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
46CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000
Adam Ford5b7c9f02017-10-16 14:08:26 -0500[diff] [blame]47CONFIG_SPL_NAND_SIMPLE=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]48CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]49CONFIG_SF_DEFAULT_SPEED=30000000
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]50CONFIG_SPI_FLASH_STMICRO=y
51CONFIG_SPI_FLASH_WINBOND=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]52CONFIG_MII=y
53CONFIG_DRIVER_TI_EMAC=y
Lokesh Vutlad601a6e2018-03-16 18:52:21 +0530[diff] [blame]54CONFIG_DM_SERIAL=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]55CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]56CONFIG_SPI=y
Adam Ford19b336e2017-12-30 07:33:42 -0600[diff] [blame]57CONFIG_DAVINCI_SPI=y