| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Simon Glass | 71606de | 2016-03-11 22:07:18 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2016 Google, Inc |
| Simon Glass | 71606de | 2016-03-11 22:07:18 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __asm_arch_cpu_h |
| 7 | #define __asm_arch_cpu_h |
| 8 | |
| 9 | /* CPU types */ |
| 10 | #define HASWELL_FAMILY_ULT 0x40650 |
| 11 | #define BROADWELL_FAMILY_ULT 0x306d0 |
| 12 | |
| 13 | /* Supported CPUIDs */ |
| 14 | #define CPUID_HASWELL_A0 0x306c1 |
| 15 | #define CPUID_HASWELL_B0 0x306c2 |
| 16 | #define CPUID_HASWELL_C0 0x306c3 |
| 17 | #define CPUID_HASWELL_ULT_B0 0x40650 |
| 18 | #define CPUID_HASWELL_ULT 0x40651 |
| 19 | #define CPUID_HASWELL_HALO 0x40661 |
| 20 | #define CPUID_BROADWELL_C0 0x306d2 |
| 21 | #define CPUID_BROADWELL_D0 0x306d3 |
| 22 | #define CPUID_BROADWELL_E0 0x306d4 |
| 23 | |
| 24 | /* Broadwell bus clock is fixed at 100MHz */ |
| 25 | #define BROADWELL_BCLK 100 |
| 26 | |
| 27 | #define BROADWELL_FAMILY_ULT 0x306d0 |
| 28 | |
| 29 | #define CORE_THREAD_COUNT_MSR 0x35 |
| 30 | |
| 31 | #define MSR_VR_CURRENT_CONFIG 0x601 |
| 32 | #define MSR_VR_MISC_CONFIG 0x603 |
| 33 | #define MSR_PKG_POWER_SKU 0x614 |
| 34 | #define MSR_DDR_RAPL_LIMIT 0x618 |
| 35 | #define MSR_VR_MISC_CONFIG2 0x636 |
| 36 | |
| 37 | /* Latency times in units of 1024ns. */ |
| 38 | #define C_STATE_LATENCY_CONTROL_0_LIMIT 0x42 |
| 39 | #define C_STATE_LATENCY_CONTROL_1_LIMIT 0x73 |
| 40 | #define C_STATE_LATENCY_CONTROL_2_LIMIT 0x91 |
| 41 | #define C_STATE_LATENCY_CONTROL_3_LIMIT 0xe4 |
| 42 | #define C_STATE_LATENCY_CONTROL_4_LIMIT 0x145 |
| 43 | #define C_STATE_LATENCY_CONTROL_5_LIMIT 0x1ef |
| 44 | |
| 45 | void cpu_set_power_limits(int power_limit_1_time); |
| 46 | |
| 47 | #endif |