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git01.mediatek.com / filogic / uboot / c8c200933756d3fc2be9d866e98716a456dadb02 / . / arch / arm / dts / imx8mp-data-modul-edm-sbc-u-boot.dtsi
blob: 805b5f57955fdd3362eed830584925278b5e54eb [file] [log] [blame]
Marek Vasutaa2fc532023-04-04 01:07:43 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2022 Marek Vasut <marex@denx.de>
4 */
5
6#include "imx8mp-u-boot.dtsi"
Marek Vasut3869f2d2023-07-15 20:24:16 +0200[diff] [blame]7#include "imx8mp-pinfunc.h"
Marek Vasutaa2fc532023-04-04 01:07:43 +0200[diff] [blame]8
9/ {
10 aliases {
11 eeprom0 = &eeprom;
12 mmc0 = &usdhc3; /* eMMC */
13 mmc1 = &usdhc2; /* MicroSD */
14 spi0 = &ecspi1;
15 };
16
17 config {
18 dmo,ram-coding-gpios = <&gpio3 20 0>, <&gpio4 3 0>, <&gpio4 1 0>;
19 };
20
Marek Vasut3869f2d2023-07-15 20:24:16 +0200[diff] [blame]21 reg_usb1_vbus: regulator-usb1-vbus {
22 compatible = "regulator-fixed";
23 enable-active-high;
24 gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
25 pinctrl-names = "default";
26 pinctrl-0 = <&pinctrl_usb1_vbus>;
27 regulator-max-microvolt = <5000000>;
28 regulator-min-microvolt = <5000000>;
29 regulator-name = "USB1_PWR";
30 };
31
Marek Vasutaa2fc532023-04-04 01:07:43 +0200[diff] [blame]32 wdt-reboot {
33 compatible = "wdt-reboot";
34 wdt = <&wdog1>;
35 bootph-pre-ram;
36 };
37};
38
39&buck4 {
40 bootph-pre-ram;
41};
42
43&buck5 {
44 bootph-pre-ram;
45};
46
47&ecspi1 {
Marek Vasutf05f9362024-02-08 18:33:50 +0100[diff] [blame]48 /delete-property/ assigned-clocks;
49 /delete-property/ assigned-clock-rates;
50 /delete-property/ assigned-clock-parents;
Marek Vasutaa2fc532023-04-04 01:07:43 +0200[diff] [blame]51 bootph-pre-ram;
52 flash@0 {
53 bootph-pre-ram;
54 };
55};
56
Marek Vasutaa2fc532023-04-04 01:07:43 +0200[diff] [blame]57&gpio1 {
58 bootph-pre-ram;
59};
60
61&gpio2 {
62 bootph-pre-ram;
63};
64
65&gpio3 {
66 bootph-pre-ram;
Marek Vasut602accd2023-12-18 19:02:14 +0100[diff] [blame]67
68 bl-enable-hog {
69 bootph-pre-ram;
70 gpio-hog;
71 output-low;
72 gpios = <0 GPIO_ACTIVE_HIGH>;
73 line-name = "BL_ENABLE_1V8";
74 };
75
76 tft-enable-hog {
77 bootph-pre-ram;
78 gpio-hog;
79 output-low;
80 gpios = <6 GPIO_ACTIVE_HIGH>;
81 line-name = "TFT_ENABLE_1V8";
82 };
83
84 graphics-gpio0-hog {
85 bootph-pre-ram;
86 gpio-hog;
87 input;
88 gpios = <7 GPIO_ACTIVE_HIGH>;
89 line-name = "GRAPHICS_GPIO0_1V8";
90 };
Marek Vasutaa2fc532023-04-04 01:07:43 +0200[diff] [blame]91};
92
93&gpio4 {
94 bootph-pre-ram;
Marek Vasut602accd2023-12-18 19:02:14 +0100[diff] [blame]95
96 dsi-reset-hog {
97 bootph-pre-ram;
98 gpio-hog;
99 output-high;
100 gpios = <0 GPIO_ACTIVE_LOW>;
101 line-name = "DSI_RESET_1V8#";
102 };
103
104 graphics-prsnt-hog {
105 bootph-pre-ram;
106 gpio-hog;
107 input;
108 gpios = <18 GPIO_ACTIVE_LOW>;
109 line-name = "GRAPHICS_PRSNT_1V8#";
110 };
111
112 dsi-irq-hog {
113 bootph-pre-ram;
114 gpio-hog;
115 input;
116 gpios = <19 GPIO_ACTIVE_LOW>;
117 line-name = "DSI_IRQ_1V8#";
118 };
Marek Vasutaa2fc532023-04-04 01:07:43 +0200[diff] [blame]119};
120
121&gpio5 {
122 bootph-pre-ram;
123};
124
125&i2c3 {
126 bootph-pre-ram;
127};
128
129&pinctrl_ecspi1 {
130 bootph-pre-ram;
131};
132
133&pinctrl_hog_sbc {
134 bootph-pre-ram;
135};
136
137&pinctrl_i2c3 {
138 bootph-pre-ram;
139};
140
141&pinctrl_i2c3_gpio {
142 bootph-pre-ram;
143};
144
145&pinctrl_pmic {
146 bootph-pre-ram;
147};
148
149&pinctrl_uart3 {
150 bootph-pre-ram;
151};
152
153&pinctrl_usdhc2 {
154 bootph-pre-ram;
155};
156
157&pinctrl_usdhc3 {
158 bootph-pre-ram;
159};
160
161&pmic {
162 bootph-pre-ram;
163
164 regulators {
165 bootph-pre-ram;
166 };
167};
168
169&uart3 {
170 bootph-pre-ram;
171};
172
Marek Vasut3869f2d2023-07-15 20:24:16 +0200[diff] [blame]173&usb3_phy0 {
174 vbus-supply = <&reg_usb1_vbus>;
175};
176
Marek Vasutaa2fc532023-04-04 01:07:43 +0200[diff] [blame]177&usdhc2 {
178 bootph-pre-ram;
179 sd-uhs-sdr104;
180 sd-uhs-ddr50;
181};
182
183&usdhc3 {
184 bootph-pre-ram;
185 mmc-hs400-1_8v;
186 mmc-hs400-enhanced-strobe;
187};
188
189&wdog1 {
190 bootph-pre-ram;
191};
Marek Vasut3869f2d2023-07-15 20:24:16 +0200[diff] [blame]192
193&iomuxc {
194 usb1-grp {
195 fsl,pins = <
196 MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x80
197 >;
198 };
199
200 pinctrl_usb1_vbus: usb1-vbus-grp {
201 fsl,pins = <
202 MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x6
203 >;
204 };
205};