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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glass456dd7c2014-10-13 23:42:00 -06002/*
3 * Copyright (c) 2014 Google, Inc
4 *
5 * (C) Copyright 2002
6 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
7 *
8 * Influenced by code from:
9 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Simon Glass456dd7c2014-10-13 23:42:00 -060010 */
11
12#include <common.h>
13#include <dm.h>
14#include <errno.h>
15#include <fdtdec.h>
Simon Glass0f2af882020-05-10 11:40:05 -060016#include <log.h>
Simon Glass456dd7c2014-10-13 23:42:00 -060017#include <malloc.h>
18#include <spi.h>
19#include <asm/gpio.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060020#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060021#include <linux/delay.h>
Simon Glass456dd7c2014-10-13 23:42:00 -060022
23DECLARE_GLOBAL_DATA_PTR;
24
Simon Glassb75b15b2020-12-03 16:55:23 -070025struct soft_spi_plat {
Simon Glass61d10b72015-01-05 20:05:40 -070026 struct gpio_desc cs;
27 struct gpio_desc sclk;
28 struct gpio_desc mosi;
29 struct gpio_desc miso;
Simon Glass456dd7c2014-10-13 23:42:00 -060030 int spi_delay_us;
Peng Fan54108e72016-05-03 10:02:21 +080031 int flags;
Simon Glass456dd7c2014-10-13 23:42:00 -060032};
33
Peng Fan54108e72016-05-03 10:02:21 +080034#define SPI_MASTER_NO_RX BIT(0)
35#define SPI_MASTER_NO_TX BIT(1)
36
Simon Glass456dd7c2014-10-13 23:42:00 -060037struct soft_spi_priv {
38 unsigned int mode;
39};
40
41static int soft_spi_scl(struct udevice *dev, int bit)
42{
Peng Fanfa7dd9b2016-05-03 10:02:20 +080043 struct udevice *bus = dev_get_parent(dev);
Simon Glassb75b15b2020-12-03 16:55:23 -070044 struct soft_spi_plat *plat = dev_get_plat(bus);
Simon Glass456dd7c2014-10-13 23:42:00 -060045
Simon Glass61d10b72015-01-05 20:05:40 -070046 dm_gpio_set_value(&plat->sclk, bit);
Simon Glass456dd7c2014-10-13 23:42:00 -060047
48 return 0;
49}
50
51static int soft_spi_sda(struct udevice *dev, int bit)
52{
Peng Fanfa7dd9b2016-05-03 10:02:20 +080053 struct udevice *bus = dev_get_parent(dev);
Simon Glassb75b15b2020-12-03 16:55:23 -070054 struct soft_spi_plat *plat = dev_get_plat(bus);
Simon Glass456dd7c2014-10-13 23:42:00 -060055
Simon Glass61d10b72015-01-05 20:05:40 -070056 dm_gpio_set_value(&plat->mosi, bit);
Simon Glass456dd7c2014-10-13 23:42:00 -060057
58 return 0;
59}
60
61static int soft_spi_cs_activate(struct udevice *dev)
62{
Peng Fanfa7dd9b2016-05-03 10:02:20 +080063 struct udevice *bus = dev_get_parent(dev);
Johannes Holland84120622020-05-11 15:22:26 +020064 struct soft_spi_priv *priv = dev_get_priv(bus);
Simon Glassb75b15b2020-12-03 16:55:23 -070065 struct soft_spi_plat *plat = dev_get_plat(bus);
Johannes Holland84120622020-05-11 15:22:26 +020066 int cidle = !!(priv->mode & SPI_CPOL);
Simon Glass456dd7c2014-10-13 23:42:00 -060067
Simon Glass61d10b72015-01-05 20:05:40 -070068 dm_gpio_set_value(&plat->cs, 0);
Johannes Holland84120622020-05-11 15:22:26 +020069 dm_gpio_set_value(&plat->sclk, cidle); /* to idle */
Simon Glass61d10b72015-01-05 20:05:40 -070070 dm_gpio_set_value(&plat->cs, 1);
Simon Glass456dd7c2014-10-13 23:42:00 -060071
72 return 0;
73}
74
75static int soft_spi_cs_deactivate(struct udevice *dev)
76{
Peng Fanfa7dd9b2016-05-03 10:02:20 +080077 struct udevice *bus = dev_get_parent(dev);
Simon Glassb75b15b2020-12-03 16:55:23 -070078 struct soft_spi_plat *plat = dev_get_plat(bus);
Simon Glass456dd7c2014-10-13 23:42:00 -060079
Simon Glass61d10b72015-01-05 20:05:40 -070080 dm_gpio_set_value(&plat->cs, 0);
Simon Glass456dd7c2014-10-13 23:42:00 -060081
82 return 0;
83}
84
85static int soft_spi_claim_bus(struct udevice *dev)
86{
Johannes Holland84120622020-05-11 15:22:26 +020087 struct udevice *bus = dev_get_parent(dev);
88 struct soft_spi_priv *priv = dev_get_priv(bus);
89 int cidle = !!(priv->mode & SPI_CPOL);
Simon Glass456dd7c2014-10-13 23:42:00 -060090 /*
91 * Make sure the SPI clock is in idle state as defined for
92 * this slave.
93 */
Johannes Holland84120622020-05-11 15:22:26 +020094 return soft_spi_scl(dev, cidle);
Simon Glass456dd7c2014-10-13 23:42:00 -060095}
96
97static int soft_spi_release_bus(struct udevice *dev)
98{
99 /* Nothing to do */
100 return 0;
101}
102
103/*-----------------------------------------------------------------------
104 * SPI transfer
105 *
106 * This writes "bitlen" bits out the SPI MOSI port and simultaneously clocks
107 * "bitlen" bits in the SPI MISO port. That's just the way SPI works.
108 *
109 * The source of the outgoing bits is the "dout" parameter and the
110 * destination of the input bits is the "din" parameter. Note that "dout"
111 * and "din" can point to the same memory location, in which case the
112 * input data overwrites the output data (since both are buffered by
113 * temporary variables, this is OK).
114 */
115static int soft_spi_xfer(struct udevice *dev, unsigned int bitlen,
116 const void *dout, void *din, unsigned long flags)
117{
Peng Fanfa7dd9b2016-05-03 10:02:20 +0800118 struct udevice *bus = dev_get_parent(dev);
119 struct soft_spi_priv *priv = dev_get_priv(bus);
Simon Glassb75b15b2020-12-03 16:55:23 -0700120 struct soft_spi_plat *plat = dev_get_plat(bus);
Simon Glass456dd7c2014-10-13 23:42:00 -0600121 uchar tmpdin = 0;
122 uchar tmpdout = 0;
123 const u8 *txd = dout;
124 u8 *rxd = din;
Johannes Holland84120622020-05-11 15:22:26 +0200125 int cpha = !!(priv->mode & SPI_CPHA);
126 int cidle = !!(priv->mode & SPI_CPOL);
Simon Glass456dd7c2014-10-13 23:42:00 -0600127 unsigned int j;
128
129 debug("spi_xfer: slave %s:%s dout %08X din %08X bitlen %u\n",
130 dev->parent->name, dev->name, *(uint *)txd, *(uint *)rxd,
131 bitlen);
132
133 if (flags & SPI_XFER_BEGIN)
134 soft_spi_cs_activate(dev);
135
136 for (j = 0; j < bitlen; j++) {
137 /*
138 * Check if it is time to work on a new byte.
139 */
140 if ((j % 8) == 0) {
141 if (txd)
142 tmpdout = *txd++;
143 else
144 tmpdout = 0;
145 if (j != 0) {
146 if (rxd)
147 *rxd++ = tmpdin;
148 }
149 tmpdin = 0;
150 }
151
Johannes Holland84120622020-05-11 15:22:26 +0200152 /*
153 * CPOL 0: idle is low (0), active is high (1)
154 * CPOL 1: idle is high (1), active is low (0)
155 */
156
157 /*
158 * drive bit
159 * CPHA 1: CLK from idle to active
160 */
161 if (cpha)
162 soft_spi_scl(dev, !cidle);
Peng Fan54108e72016-05-03 10:02:21 +0800163 if ((plat->flags & SPI_MASTER_NO_TX) == 0)
164 soft_spi_sda(dev, !!(tmpdout & 0x80));
Simon Glass456dd7c2014-10-13 23:42:00 -0600165 udelay(plat->spi_delay_us);
Johannes Holland84120622020-05-11 15:22:26 +0200166
167 /*
168 * sample bit
169 * CPHA 0: CLK from idle to active
170 * CPHA 1: CLK from active to idle
171 */
172 if (!cpha)
173 soft_spi_scl(dev, !cidle);
Simon Glass456dd7c2014-10-13 23:42:00 -0600174 else
Johannes Holland84120622020-05-11 15:22:26 +0200175 soft_spi_scl(dev, cidle);
Simon Glass456dd7c2014-10-13 23:42:00 -0600176 tmpdin <<= 1;
Peng Fan54108e72016-05-03 10:02:21 +0800177 if ((plat->flags & SPI_MASTER_NO_RX) == 0)
178 tmpdin |= dm_gpio_get_value(&plat->miso);
Simon Glass456dd7c2014-10-13 23:42:00 -0600179 tmpdout <<= 1;
180 udelay(plat->spi_delay_us);
Johannes Holland84120622020-05-11 15:22:26 +0200181
182 /*
183 * drive bit
184 * CPHA 0: CLK from active to idle
185 */
186 if (!cpha)
187 soft_spi_scl(dev, cidle);
Simon Glass456dd7c2014-10-13 23:42:00 -0600188 }
189 /*
190 * If the number of bits isn't a multiple of 8, shift the last
191 * bits over to left-justify them. Then store the last byte
192 * read in.
193 */
194 if (rxd) {
195 if ((bitlen % 8) != 0)
196 tmpdin <<= 8 - (bitlen % 8);
197 *rxd++ = tmpdin;
198 }
199
200 if (flags & SPI_XFER_END)
201 soft_spi_cs_deactivate(dev);
202
203 return 0;
204}
205
206static int soft_spi_set_speed(struct udevice *dev, unsigned int speed)
207{
Johannes Holland84120622020-05-11 15:22:26 +0200208 /* Ignore any speed settings. Speed is implemented via "spi-delay-us" */
Simon Glass456dd7c2014-10-13 23:42:00 -0600209 return 0;
210}
211
212static int soft_spi_set_mode(struct udevice *dev, unsigned int mode)
213{
214 struct soft_spi_priv *priv = dev_get_priv(dev);
215
216 priv->mode = mode;
217
218 return 0;
219}
220
Simon Glass456dd7c2014-10-13 23:42:00 -0600221static const struct dm_spi_ops soft_spi_ops = {
222 .claim_bus = soft_spi_claim_bus,
223 .release_bus = soft_spi_release_bus,
224 .xfer = soft_spi_xfer,
225 .set_speed = soft_spi_set_speed,
226 .set_mode = soft_spi_set_mode,
227};
228
Simon Glassaad29ae2020-12-03 16:55:21 -0700229static int soft_spi_of_to_plat(struct udevice *dev)
Simon Glass456dd7c2014-10-13 23:42:00 -0600230{
Simon Glass95588622020-12-22 19:30:28 -0700231 struct soft_spi_plat *plat = dev_get_plat(dev);
Simon Glass456dd7c2014-10-13 23:42:00 -0600232 const void *blob = gd->fdt_blob;
Simon Glassdd79d6e2017-01-17 16:52:55 -0700233 int node = dev_of_offset(dev);
Simon Glass456dd7c2014-10-13 23:42:00 -0600234
Simon Glass456dd7c2014-10-13 23:42:00 -0600235 plat->spi_delay_us = fdtdec_get_int(blob, node, "spi-delay-us", 0);
236
237 return 0;
238}
239
240static int soft_spi_probe(struct udevice *dev)
241{
Simon Glassde44acf2015-09-28 23:32:01 -0600242 struct spi_slave *slave = dev_get_parent_priv(dev);
Simon Glass95588622020-12-22 19:30:28 -0700243 struct soft_spi_plat *plat = dev_get_plat(dev);
Simon Glass61d10b72015-01-05 20:05:40 -0700244 int cs_flags, clk_flags;
Peng Fan54108e72016-05-03 10:02:21 +0800245 int ret;
Simon Glass456dd7c2014-10-13 23:42:00 -0600246
Christophe Kerellob34a10a2019-08-02 15:46:29 +0200247 cs_flags = (slave && slave->mode & SPI_CS_HIGH) ? 0 : GPIOD_ACTIVE_LOW;
248 clk_flags = (slave && slave->mode & SPI_CPOL) ? GPIOD_ACTIVE_LOW : 0;
Peng Fan54108e72016-05-03 10:02:21 +0800249
250 if (gpio_request_by_name(dev, "cs-gpios", 0, &plat->cs,
Simon Glass61d10b72015-01-05 20:05:40 -0700251 GPIOD_IS_OUT | cs_flags) ||
Peng Fan54108e72016-05-03 10:02:21 +0800252 gpio_request_by_name(dev, "gpio-sck", 0, &plat->sclk,
253 GPIOD_IS_OUT | clk_flags))
254 return -EINVAL;
255
256 ret = gpio_request_by_name(dev, "gpio-mosi", 0, &plat->mosi,
257 GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
258 if (ret)
259 plat->flags |= SPI_MASTER_NO_TX;
260
261 ret = gpio_request_by_name(dev, "gpio-miso", 0, &plat->miso,
262 GPIOD_IS_IN);
263 if (ret)
264 plat->flags |= SPI_MASTER_NO_RX;
265
266 if ((plat->flags & (SPI_MASTER_NO_RX | SPI_MASTER_NO_TX)) ==
267 (SPI_MASTER_NO_RX | SPI_MASTER_NO_TX))
Simon Glass61d10b72015-01-05 20:05:40 -0700268 return -EINVAL;
Simon Glass456dd7c2014-10-13 23:42:00 -0600269
270 return 0;
271}
272
273static const struct udevice_id soft_spi_ids[] = {
Peng Fan54108e72016-05-03 10:02:21 +0800274 { .compatible = "spi-gpio" },
Simon Glass456dd7c2014-10-13 23:42:00 -0600275 { }
276};
277
278U_BOOT_DRIVER(soft_spi) = {
279 .name = "soft_spi",
280 .id = UCLASS_SPI,
281 .of_match = soft_spi_ids,
282 .ops = &soft_spi_ops,
Simon Glassaad29ae2020-12-03 16:55:21 -0700283 .of_to_plat = soft_spi_of_to_plat,
Simon Glassb75b15b2020-12-03 16:55:23 -0700284 .plat_auto = sizeof(struct soft_spi_plat),
Simon Glass8a2b47f2020-12-03 16:55:17 -0700285 .priv_auto = sizeof(struct soft_spi_priv),
Simon Glass456dd7c2014-10-13 23:42:00 -0600286 .probe = soft_spi_probe,
Simon Glass456dd7c2014-10-13 23:42:00 -0600287};