Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 1 | /* |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 2 | * AXP221 and AXP223 driver |
| 3 | * |
| 4 | * IMPORTANT when making changes to this file check that the registers |
| 5 | * used are the same for the axp221 and axp223. |
| 6 | * |
| 7 | * (C) Copyright 2014 Hans de Goede <hdegoede@redhat.com> |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 8 | * (C) Copyright 2013 Oliver Schinagl <oliver@schinagl.nl> |
| 9 | * |
| 10 | * SPDX-License-Identifier: GPL-2.0+ |
| 11 | */ |
| 12 | |
| 13 | #include <common.h> |
| 14 | #include <errno.h> |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 15 | #include <asm/arch/pmic_bus.h> |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 16 | #include <axp_pmic.h> |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 17 | |
| 18 | static u8 axp221_mvolt_to_cfg(int mvolt, int min, int max, int div) |
| 19 | { |
| 20 | if (mvolt < min) |
| 21 | mvolt = min; |
| 22 | else if (mvolt > max) |
| 23 | mvolt = max; |
| 24 | |
| 25 | return (mvolt - min) / div; |
| 26 | } |
| 27 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 28 | int axp_set_dcdc1(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 29 | { |
| 30 | int ret; |
| 31 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 1600, 3400, 100); |
| 32 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 33 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 34 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 35 | AXP221_OUTPUT_CTRL1_DCDC1_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 36 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 37 | ret = pmic_bus_write(AXP221_DCDC1_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 38 | if (ret) |
| 39 | return ret; |
| 40 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 41 | ret = pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 42 | AXP221_OUTPUT_CTRL2_DCDC1SW_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 43 | if (ret) |
| 44 | return ret; |
| 45 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 46 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 47 | AXP221_OUTPUT_CTRL1_DCDC1_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 48 | } |
| 49 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 50 | int axp_set_dcdc2(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 51 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 52 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 53 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20); |
| 54 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 55 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 56 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 57 | AXP221_OUTPUT_CTRL1_DCDC2_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 58 | |
| 59 | ret = pmic_bus_write(AXP221_DCDC2_CTRL, cfg); |
| 60 | if (ret) |
| 61 | return ret; |
| 62 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 63 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 64 | AXP221_OUTPUT_CTRL1_DCDC2_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 65 | } |
| 66 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 67 | int axp_set_dcdc3(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 68 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 69 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 70 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1860, 20); |
| 71 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 72 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 73 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 74 | AXP221_OUTPUT_CTRL1_DCDC3_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 75 | |
| 76 | ret = pmic_bus_write(AXP221_DCDC3_CTRL, cfg); |
| 77 | if (ret) |
| 78 | return ret; |
| 79 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 80 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 81 | AXP221_OUTPUT_CTRL1_DCDC3_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 82 | } |
| 83 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 84 | int axp_set_dcdc4(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 85 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 86 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 87 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 600, 1540, 20); |
| 88 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 89 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 90 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 91 | AXP221_OUTPUT_CTRL1_DCDC4_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 92 | |
| 93 | ret = pmic_bus_write(AXP221_DCDC4_CTRL, cfg); |
| 94 | if (ret) |
| 95 | return ret; |
| 96 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 97 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 98 | AXP221_OUTPUT_CTRL1_DCDC4_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 99 | } |
| 100 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 101 | int axp_set_dcdc5(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 102 | { |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 103 | int ret; |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 104 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 1000, 2550, 50); |
| 105 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 106 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 107 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 108 | AXP221_OUTPUT_CTRL1_DCDC5_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 109 | |
| 110 | ret = pmic_bus_write(AXP221_DCDC5_CTRL, cfg); |
| 111 | if (ret) |
| 112 | return ret; |
| 113 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 114 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 115 | AXP221_OUTPUT_CTRL1_DCDC5_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 116 | } |
| 117 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 118 | int axp_set_dldo1(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 119 | { |
| 120 | int ret; |
| 121 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 122 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 123 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 124 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 125 | AXP221_OUTPUT_CTRL2_DLDO1_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 126 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 127 | ret = pmic_bus_write(AXP221_DLDO1_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 128 | if (ret) |
| 129 | return ret; |
| 130 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 131 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 132 | AXP221_OUTPUT_CTRL2_DLDO1_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 133 | } |
| 134 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 135 | int axp_set_dldo2(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 136 | { |
| 137 | int ret; |
| 138 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 139 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 140 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 141 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 142 | AXP221_OUTPUT_CTRL2_DLDO2_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 143 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 144 | ret = pmic_bus_write(AXP221_DLDO2_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 145 | if (ret) |
| 146 | return ret; |
| 147 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 148 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 149 | AXP221_OUTPUT_CTRL2_DLDO2_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 150 | } |
| 151 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 152 | int axp_set_dldo3(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 153 | { |
| 154 | int ret; |
| 155 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 156 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 157 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 158 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 159 | AXP221_OUTPUT_CTRL2_DLDO3_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 160 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 161 | ret = pmic_bus_write(AXP221_DLDO3_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 162 | if (ret) |
| 163 | return ret; |
| 164 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 165 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 166 | AXP221_OUTPUT_CTRL2_DLDO3_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 167 | } |
| 168 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 169 | int axp_set_dldo4(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 170 | { |
| 171 | int ret; |
| 172 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 173 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 174 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 175 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, |
| 176 | AXP221_OUTPUT_CTRL2_DLDO4_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 177 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 178 | ret = pmic_bus_write(AXP221_DLDO4_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 179 | if (ret) |
| 180 | return ret; |
| 181 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 182 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, |
| 183 | AXP221_OUTPUT_CTRL2_DLDO4_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 184 | } |
| 185 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 186 | int axp_set_aldo1(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 187 | { |
| 188 | int ret; |
| 189 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 190 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 191 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 192 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 193 | AXP221_OUTPUT_CTRL1_ALDO1_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 194 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 195 | ret = pmic_bus_write(AXP221_ALDO1_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 196 | if (ret) |
| 197 | return ret; |
| 198 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 199 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 200 | AXP221_OUTPUT_CTRL1_ALDO1_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 201 | } |
| 202 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 203 | int axp_set_aldo2(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 204 | { |
| 205 | int ret; |
| 206 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 207 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 208 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 209 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL1, |
| 210 | AXP221_OUTPUT_CTRL1_ALDO2_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 211 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 212 | ret = pmic_bus_write(AXP221_ALDO2_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 213 | if (ret) |
| 214 | return ret; |
| 215 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 216 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL1, |
| 217 | AXP221_OUTPUT_CTRL1_ALDO2_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 218 | } |
| 219 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 220 | int axp_set_aldo3(unsigned int mvolt) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 221 | { |
| 222 | int ret; |
| 223 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 224 | |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 225 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 226 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL3, |
| 227 | AXP221_OUTPUT_CTRL3_ALDO3_EN); |
Hans de Goede | be4929c | 2014-12-13 14:02:38 +0100 | [diff] [blame] | 228 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 229 | ret = pmic_bus_write(AXP221_ALDO3_CTRL, cfg); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 230 | if (ret) |
| 231 | return ret; |
| 232 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 233 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL3, |
| 234 | AXP221_OUTPUT_CTRL3_ALDO3_EN); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 235 | } |
| 236 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 237 | int axp_set_eldo(int eldo_num, unsigned int mvolt) |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 238 | { |
| 239 | int ret; |
| 240 | u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100); |
| 241 | u8 addr, bits; |
| 242 | |
| 243 | switch (eldo_num) { |
| 244 | case 3: |
| 245 | addr = AXP221_ELDO3_CTRL; |
| 246 | bits = AXP221_OUTPUT_CTRL2_ELDO3_EN; |
| 247 | break; |
| 248 | case 2: |
| 249 | addr = AXP221_ELDO2_CTRL; |
| 250 | bits = AXP221_OUTPUT_CTRL2_ELDO2_EN; |
| 251 | break; |
| 252 | case 1: |
| 253 | addr = AXP221_ELDO1_CTRL; |
| 254 | bits = AXP221_OUTPUT_CTRL2_ELDO1_EN; |
| 255 | break; |
| 256 | default: |
| 257 | return -EINVAL; |
| 258 | } |
| 259 | |
| 260 | if (mvolt == 0) |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 261 | return pmic_bus_clrbits(AXP221_OUTPUT_CTRL2, bits); |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 262 | |
| 263 | ret = pmic_bus_write(addr, cfg); |
| 264 | if (ret) |
| 265 | return ret; |
| 266 | |
Hans de Goede | bb930c3 | 2015-04-25 14:07:37 +0200 | [diff] [blame] | 267 | return pmic_bus_setbits(AXP221_OUTPUT_CTRL2, bits); |
Siarhei Siamashka | 7e4eb6c | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 268 | } |
| 269 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 270 | int axp_init(void) |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 271 | { |
| 272 | u8 axp_chip_id; |
| 273 | int ret; |
| 274 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 275 | ret = pmic_bus_init(); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 276 | if (ret) |
| 277 | return ret; |
| 278 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 279 | ret = pmic_bus_read(AXP221_CHIP_ID, &axp_chip_id); |
Oliver Schinagl | d3a558d | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 280 | if (ret) |
| 281 | return ret; |
| 282 | |
| 283 | if (!(axp_chip_id == 0x6 || axp_chip_id == 0x7 || axp_chip_id == 0x17)) |
| 284 | return -ENODEV; |
| 285 | |
| 286 | return 0; |
| 287 | } |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 288 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 289 | int axp_get_sid(unsigned int *sid) |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 290 | { |
| 291 | u8 *dest = (u8 *)sid; |
| 292 | int i, ret; |
| 293 | |
Hans de Goede | d9ee84b | 2015-10-03 15:18:33 +0200 | [diff] [blame] | 294 | ret = pmic_bus_init(); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 295 | if (ret) |
| 296 | return ret; |
| 297 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 298 | ret = pmic_bus_write(AXP221_PAGE, 1); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 299 | if (ret) |
| 300 | return ret; |
| 301 | |
| 302 | for (i = 0; i < 16; i++) { |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 303 | ret = pmic_bus_read(AXP221_SID + i, &dest[i]); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 304 | if (ret) |
| 305 | return ret; |
| 306 | } |
| 307 | |
Hans de Goede | 1dd334b | 2014-11-29 23:54:25 +0100 | [diff] [blame] | 308 | pmic_bus_write(AXP221_PAGE, 0); |
Hans de Goede | 65142e9 | 2014-11-25 16:37:52 +0100 | [diff] [blame] | 309 | |
| 310 | for (i = 0; i < 4; i++) |
| 311 | sid[i] = be32_to_cpu(sid[i]); |
| 312 | |
| 313 | return 0; |
| 314 | } |