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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Tom McLeod91d024c2017-09-27 17:53:26 -07002/*
3 * (C) Copyright 2012 Xilinx
4 * (C) Copyright 2017 Opal Kelly Inc.
5 *
6 * Configuration settings for the SYZYGY Hub development board
7 * See zynq-common.h for Zynq common configs
Tom McLeod91d024c2017-09-27 17:53:26 -07008 */
9
10#ifndef __CONFIG_SYZYGY_HUB_H
11#define __CONFIG_SYZYGY_HUB_H
12
Tom McLeod91d024c2017-09-27 17:53:26 -070013#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
14#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x57
Tom McLeod91d024c2017-09-27 17:53:26 -070015
16#define CONFIG_EXTRA_ENV_SETTINGS \
17 "fit_image=fit.itb\0" \
18 "bitstream_image=download.bit\0" \
19 "loadbit_addr=0x1000000\0" \
20 "load_addr=0x2000000\0" \
21 "fit_size=0x800000\0" \
22 "flash_off=0x100000\0" \
23 "nor_flash_off=0xE2100000\0" \
24 "fdt_high=0x20000000\0" \
25 "initrd_high=0x20000000\0" \
26 "loadbootenv_addr=0x2000000\0" \
27 "fdt_addr_r=0x1f00000\0" \
28 "pxefile_addr_r=0x2000000\0" \
29 "kernel_addr_r=0x2000000\0" \
30 "scriptaddr=0x3000000\0" \
31 "ramdisk_addr_r=0x3100000\0" \
32 "bootenv=uEnv.txt\0" \
33 "bootenv_dev=mmc\0" \
34 "loadbootenv=load ${bootenv_dev} 0 ${loadbootenv_addr} ${bootenv}\0" \
35 "importbootenv=echo Importing environment from ${bootenv_dev} ...; " \
36 "env import -t ${loadbootenv_addr} $filesize\0" \
37 "bootenv_existence_test=test -e ${bootenv_dev} 0 /${bootenv}\0" \
38 "setbootenv=if env run bootenv_existence_test; then " \
39 "if env run loadbootenv; then " \
40 "env run importbootenv; " \
41 "fi; " \
42 "fi; \0" \
43 "sd_loadbootenv=set bootenv_dev mmc && " \
44 "run setbootenv \0" \
45 "usb_loadbootenv=set bootenv_dev usb && usb start && run setbootenv\0" \
46 "preboot=if test $modeboot = sdboot; then " \
47 "run sd_loadbootenv; " \
48 "echo Checking if uenvcmd is set ...; " \
49 "if test -n $uenvcmd; then " \
50 "echo Running uenvcmd ...; " \
51 "run uenvcmd; " \
52 "fi; " \
53 "fi; \0" \
54 "sdboot=echo Copying FPGA Bitstream from SD to RAM... && " \
55 "load mmc 0 ${loadbit_addr} ${bitstream_image} && " \
56 "echo Programming FPGA... && " \
57 "fpga loadb 0 ${loadbit_addr} ${filesize} && " \
58 "echo Copying FIT from SD to RAM... && " \
59 "load mmc 0 ${load_addr} ${fit_image} && " \
60 "bootm ${load_addr}\0" \
61 "jtagboot=echo TFTPing FIT to RAM... && " \
62 "tftpboot ${load_addr} ${fit_image} && " \
63 "bootm ${load_addr}\0" \
64 DFU_ALT_INFO \
65 BOOTENV
66
67#include <configs/zynq-common.h>
68
69#endif /* __CONFIG_SYZYGY_HUB_H */