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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Peter Baradae5b77e62011-12-19 19:54:51 +00002/*
3 * (C) Copyright 2011
4 * Logic Product Development <www.logicpd.com>
5 *
6 * Author :
7 * Peter Barada <peter.barada@logicpd.com>
8 *
9 * Derived from Beagle Board and 3430 SDP code by
10 * Richard Woodruff <r-woodruff2@ti.com>
11 * Syed Mohammed Khasim <khasim@ti.com>
Peter Baradae5b77e62011-12-19 19:54:51 +000012 */
13#include <common.h>
Adam Ford04c848a2015-09-02 09:18:20 -050014#include <dm.h>
15#include <ns16550.h>
Peter Baradae5b77e62011-12-19 19:54:51 +000016#include <netdev.h>
17#include <flash.h>
18#include <nand.h>
19#include <i2c.h>
20#include <twl4030.h>
21#include <asm/io.h>
22#include <asm/arch/mmc_host_def.h>
23#include <asm/arch/mux.h>
24#include <asm/arch/mem.h>
25#include <asm/arch/sys_proto.h>
26#include <asm/gpio.h>
Adam Ford39ce1252018-08-21 10:43:30 -050027#include <asm/omap_mmc.h>
Peter Baradae5b77e62011-12-19 19:54:51 +000028#include <asm/mach-types.h>
Masahiro Yamada2b7a8732017-11-30 13:45:24 +090029#include <linux/mtd/rawnand.h>
Adam Fordd76b69c2016-01-31 13:34:39 -060030#include <asm/omap_musb.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +090031#include <linux/errno.h>
Adam Fordd76b69c2016-01-31 13:34:39 -060032#include <linux/usb/ch9.h>
33#include <linux/usb/gadget.h>
34#include <linux/usb/musb.h>
Peter Baradae5b77e62011-12-19 19:54:51 +000035#include "omap3logic.h"
Adam Ford0c5b44f2017-08-13 07:36:14 -050036#ifdef CONFIG_USB_EHCI_HCD
37#include <usb.h>
38#include <asm/ehci-omap.h>
39#endif
Peter Baradae5b77e62011-12-19 19:54:51 +000040
41DECLARE_GLOBAL_DATA_PTR;
42
Adam Ford39ce1252018-08-21 10:43:30 -050043/* This is only needed until SPL gets OF support */
44#ifdef CONFIG_SPL_BUILD
45static const struct ns16550_platdata omap3logic_serial = {
46 .base = OMAP34XX_UART1,
47 .reg_shift = 2,
48 .clock = V_NS16550_CLK,
49 .fcr = UART_FCR_DEFVAL,
50};
51
52U_BOOT_DEVICE(omap3logic_uart) = {
Adam Ford29e6e452018-10-07 17:42:42 -050053 "omap_serial",
Adam Ford39ce1252018-08-21 10:43:30 -050054 &omap3logic_serial
55};
56
57static const struct omap_hsmmc_plat omap3_logic_mmc0_platdata = {
58 .base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE,
59 .cfg.host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_4BIT,
60 .cfg.f_min = 400000,
61 .cfg.f_max = 52000000,
62 .cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195,
63 .cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT,
64};
65
66U_BOOT_DEVICE(am335x_mmc0) = {
67 .name = "omap_hsmmc",
68 .platdata = &omap3_logic_mmc0_platdata,
69};
70
71#endif
72
Adam Ford5326c292016-01-29 20:12:34 -060073#ifdef CONFIG_SPL_OS_BOOT
74int spl_start_uboot(void)
75{
76 /* break into full u-boot on 'c' */
77 return serial_tstc() && serial_getc() == 'c';
78}
79#endif
80
81#if defined(CONFIG_SPL_BUILD)
82/*
83 * Routine: get_board_mem_timings
84 * Description: If we use SPL then there is no x-loader nor config header
85 * so we have to setup the DDR timings ourself on the first bank. This
86 * provides the timing values back to the function that configures
87 * the memory.
88 */
89void get_board_mem_timings(struct board_sdrc_timings *timings)
90{
91 timings->mr = MICRON_V_MR_165;
Adam Fordc3696922018-10-07 09:20:45 -050092
93 if (get_cpu_family() == CPU_OMAP36XX) {
94 /* 200 MHz works for OMAP36/DM37 */
95 /* 256MB DDR */
96 timings->mcfg = MICRON_V_MCFG_200(256 << 20);
97 timings->ctrla = MICRON_V_ACTIMA_200;
98 timings->ctrlb = MICRON_V_ACTIMB_200;
99 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_200MHz;
100 } else {
101 /* 165 MHz works for OMAP35 */
102 timings->mcfg = MICRON_V_MCFG_165(256 << 20);
103 timings->ctrla = MICRON_V_ACTIMA_165;
104 timings->ctrlb = MICRON_V_ACTIMB_165;
105 timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
106 }
Adam Ford5326c292016-01-29 20:12:34 -0600107}
Adam Ford9968e4a2017-12-04 17:54:50 -0600108
109#define GPMC_NAND_COMMAND_0 (OMAP34XX_GPMC_BASE + 0x7c)
110#define GPMC_NAND_DATA_0 (OMAP34XX_GPMC_BASE + 0x84)
111#define GPMC_NAND_ADDRESS_0 (OMAP34XX_GPMC_BASE + 0x80)
112
113void spl_board_prepare_for_linux(void)
114{
115 /* The Micron NAND starts locked which
116 * prohibits mounting the NAND as RW
117 * The following commands are what unlocks
118 * the NAND to become RW Falcon Mode does not
119 * have as many smarts as U-Boot, but Logic PD
120 * only makes NAND with 512MB so these hard coded
121 * values should work for all current models
122 */
123
124 writeb(0x70, GPMC_NAND_COMMAND_0);
125 writeb(-1, GPMC_NAND_DATA_0);
126 writeb(0x7a, GPMC_NAND_COMMAND_0);
127 writeb(0x00, GPMC_NAND_ADDRESS_0);
128 writeb(0x00, GPMC_NAND_ADDRESS_0);
129 writeb(0x00, GPMC_NAND_ADDRESS_0);
130 writeb(-1, GPMC_NAND_COMMAND_0);
131
132 /* Begin address 0 */
133 writeb(NAND_CMD_UNLOCK1, 0x6e00007c);
134 writeb(0x00, GPMC_NAND_ADDRESS_0);
135 writeb(0x00, GPMC_NAND_ADDRESS_0);
136 writeb(0x00, GPMC_NAND_ADDRESS_0);
137 writeb(-1, GPMC_NAND_DATA_0);
138
139 /* Ending address at the end of Flash */
140 writeb(NAND_CMD_UNLOCK2, GPMC_NAND_COMMAND_0);
141 writeb(0xc0, GPMC_NAND_ADDRESS_0);
142 writeb(0xff, GPMC_NAND_ADDRESS_0);
143 writeb(0x03, GPMC_NAND_ADDRESS_0);
144 writeb(-1, GPMC_NAND_DATA_0);
145 writeb(0x79, GPMC_NAND_COMMAND_0);
146 writeb(-1, GPMC_NAND_DATA_0);
147 writeb(-1, GPMC_NAND_DATA_0);
148}
Adam Ford5326c292016-01-29 20:12:34 -0600149#endif
150
Adam Ford0845f1d2018-10-07 17:39:29 -0500151#if !CONFIG_IS_ENABLED(DM_USB)
Adam Fordd76b69c2016-01-31 13:34:39 -0600152#ifdef CONFIG_USB_MUSB_OMAP2PLUS
153static struct musb_hdrc_config musb_config = {
154 .multipoint = 1,
155 .dyn_fifo = 1,
156 .num_eps = 16,
157 .ram_bits = 12,
158};
159
160static struct omap_musb_board_data musb_board_data = {
161 .interface_type = MUSB_INTERFACE_ULPI,
162};
163
164static struct musb_hdrc_platform_data musb_plat = {
165#if defined(CONFIG_USB_MUSB_HOST)
166 .mode = MUSB_HOST,
167#elif defined(CONFIG_USB_MUSB_GADGET)
168 .mode = MUSB_PERIPHERAL,
169#else
170#error "Please define either CONFIG_USB_MUSB_HOST or CONFIG_USB_MUSB_GADGET"
171#endif
172 .config = &musb_config,
173 .power = 100,
174 .platform_ops = &omap2430_ops,
175 .board_data = &musb_board_data,
176};
177#endif
178
Adam Ford0c5b44f2017-08-13 07:36:14 -0500179#if defined(CONFIG_USB_EHCI_HCD) && !defined(CONFIG_SPL_BUILD)
180/* Call usb_stop() before starting the kernel */
181void show_boot_progress(int val)
182{
183 if (val == BOOTSTAGE_ID_RUN_OS)
184 usb_stop();
185}
186
187static struct omap_usbhs_board_data usbhs_bdata = {
188 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
189 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
190 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
191};
192
193int ehci_hcd_init(int index, enum usb_init_type init,
194 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
195{
196 return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
197}
198
199int ehci_hcd_stop(int index)
200{
201 return omap_ehci_hcd_stop();
202}
203
204#endif /* CONFIG_USB_EHCI_HCD */
Adam Ford0845f1d2018-10-07 17:39:29 -0500205#endif /* !DM_USB*/
Adam Ford5326c292016-01-29 20:12:34 -0600206/*
207 * Routine: misc_init_r
208 * Description: Configure board specific parts
209 */
210int misc_init_r(void)
211{
Adam Ford5326c292016-01-29 20:12:34 -0600212 twl4030_power_init();
Adam Ford5326c292016-01-29 20:12:34 -0600213 omap_die_id_display();
Adam Ford5326c292016-01-29 20:12:34 -0600214
Adam Ford0845f1d2018-10-07 17:39:29 -0500215#if !CONFIG_IS_ENABLED(DM_USB)
Adam Fordd76b69c2016-01-31 13:34:39 -0600216#ifdef CONFIG_USB_MUSB_OMAP2PLUS
217 musb_register(&musb_plat, &musb_board_data, (void *)MUSB_BASE);
218#endif
Adam Ford0845f1d2018-10-07 17:39:29 -0500219#endif
Adam Ford5326c292016-01-29 20:12:34 -0600220 return 0;
221}
222
Peter Baradae5b77e62011-12-19 19:54:51 +0000223/*
Peter Baradae5b77e62011-12-19 19:54:51 +0000224 * Routine: board_init
225 * Description: Early hardware init.
226 */
227int board_init(void)
228{
Peter Baradae5b77e62011-12-19 19:54:51 +0000229 gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
230
231 /* boot param addr */
232 gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
233
Tom Rini3a23c422017-01-10 17:22:05 -0500234 return 0;
235}
236
237#ifdef CONFIG_BOARD_LATE_INIT
Adam Fordc1769042017-12-03 06:24:53 -0600238
239static void unlock_nand(void)
240{
241 int dev = nand_curr_device;
242 struct mtd_info *mtd;
243
244 mtd = get_nand_dev_by_index(dev);
245 nand_unlock(mtd, 0, mtd->size, 0);
246}
247
Tom Rini3a23c422017-01-10 17:22:05 -0500248int board_late_init(void)
249{
Adam Fordc1769042017-12-03 06:24:53 -0600250#ifdef CONFIG_CMD_NAND_LOCK_UNLOCK
251 unlock_nand();
252#endif
Adam Ford60da8c32016-02-17 21:49:49 -0600253 return 0;
254}
255#endif
256
Masahiro Yamada0a780172017-05-09 20:31:39 +0900257#if defined(CONFIG_MMC)
Paul Kocialkowski69559892014-11-08 20:55:47 +0100258void board_mmc_power_init(void)
259{
260 twl4030_power_mmc_init(0);
261}
262#endif
263
Peter Baradae5b77e62011-12-19 19:54:51 +0000264#ifdef CONFIG_SMC911X
265/* GPMC CS1 settings for Logic SOM LV/Torpedo LAN92xx Ethernet chip */
266static const u32 gpmc_lan92xx_config[] = {
267 NET_LAN92XX_GPMC_CONFIG1,
268 NET_LAN92XX_GPMC_CONFIG2,
269 NET_LAN92XX_GPMC_CONFIG3,
270 NET_LAN92XX_GPMC_CONFIG4,
271 NET_LAN92XX_GPMC_CONFIG5,
272 NET_LAN92XX_GPMC_CONFIG6,
273};
274
275int board_eth_init(bd_t *bis)
276{
277 enable_gpmc_cs_config(gpmc_lan92xx_config, &gpmc_cfg->cs[1],
278 CONFIG_SMC911X_BASE, GPMC_SIZE_16M);
279
280 return smc911x_initialize(0, CONFIG_SMC911X_BASE);
281}
282#endif