| Jagan Teki | 3cf5bca | 2023-01-30 20:27:42 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2021 Rockchip Electronics Co., Ltd. |
| 4 | */ |
| 5 | |
| 6 | #include "rk3588s.dtsi" |
| 7 | #include "rk3588-pinctrl.dtsi" |
| 8 | |
| 9 | / { |
| 10 | gmac0: ethernet@fe1b0000 { |
| 11 | compatible = "rockchip,rk3588-gmac", "snps,dwmac-4.20a"; |
| 12 | reg = <0x0 0xfe1b0000 0x0 0x10000>; |
| 13 | interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH 0>, |
| 14 | <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH 0>; |
| 15 | interrupt-names = "macirq", "eth_wake_irq"; |
| 16 | clocks = <&cru CLK_GMAC_125M>, <&cru CLK_GMAC_50M>, |
| 17 | <&cru PCLK_GMAC0>, <&cru ACLK_GMAC0>, |
| 18 | <&cru CLK_GMAC0_PTP_REF>; |
| 19 | clock-names = "stmmaceth", "clk_mac_ref", |
| 20 | "pclk_mac", "aclk_mac", |
| 21 | "ptp_ref"; |
| 22 | power-domains = <&power RK3588_PD_GMAC>; |
| 23 | resets = <&cru SRST_A_GMAC0>; |
| 24 | reset-names = "stmmaceth"; |
| 25 | rockchip,grf = <&sys_grf>; |
| 26 | rockchip,php-grf = <&php_grf>; |
| 27 | snps,axi-config = <&gmac0_stmmac_axi_setup>; |
| 28 | snps,mixed-burst; |
| 29 | snps,mtl-rx-config = <&gmac0_mtl_rx_setup>; |
| 30 | snps,mtl-tx-config = <&gmac0_mtl_tx_setup>; |
| 31 | snps,tso; |
| 32 | status = "disabled"; |
| 33 | |
| 34 | mdio0: mdio { |
| 35 | compatible = "snps,dwmac-mdio"; |
| 36 | #address-cells = <0x1>; |
| 37 | #size-cells = <0x0>; |
| 38 | }; |
| 39 | |
| 40 | gmac0_stmmac_axi_setup: stmmac-axi-config { |
| 41 | snps,blen = <0 0 0 0 16 8 4>; |
| 42 | snps,wr_osr_lmt = <4>; |
| 43 | snps,rd_osr_lmt = <8>; |
| 44 | }; |
| 45 | |
| 46 | gmac0_mtl_rx_setup: rx-queues-config { |
| 47 | snps,rx-queues-to-use = <2>; |
| 48 | queue0 {}; |
| 49 | queue1 {}; |
| 50 | }; |
| 51 | |
| 52 | gmac0_mtl_tx_setup: tx-queues-config { |
| 53 | snps,tx-queues-to-use = <2>; |
| 54 | queue0 {}; |
| 55 | queue1 {}; |
| 56 | }; |
| 57 | }; |
| 58 | }; |