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git01.mediatek.com / filogic / uboot / c375411562402b3d8010ec2d5c16a78b1cb40cbb / . / configs / phycore-rk3288_defconfig
blob: c7d5b73ea9312b742bafb3b201963d35d37dcfb1 [file] [log] [blame]
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]3CONFIG_SYS_ARCH_TIMER=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]5CONFIG_TEXT_BASE=0x00000000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]7CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
8CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]9CONFIG_SF_DEFAULT_SPEED=20000000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]10CONFIG_ENV_OFFSET=0x3F8000
Wadim Egorov19ba3ba2024-04-19 08:51:17 +0200[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3288-phycore-rdk"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]12CONFIG_SPL_TEXT_BASE=0xff704000
Tom Rini3d2b97c2023-05-29 10:43:26 -0400[diff] [blame]13CONFIG_SYS_MONITOR_LEN=614400
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]14CONFIG_ROCKCHIP_RK3288=y
Philipp Tomsich798370f2017-06-29 11:21:15 +0200[diff] [blame]15CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]16CONFIG_TARGET_PHYCORE_RK3288=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]17CONFIG_SPL_STACK_R_ADDR=0x80000
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]18CONFIG_SPL_STACK=0xff718000
Wadim Egorov19ba3ba2024-04-19 08:51:17 +0200[diff] [blame]19CONFIG_SPL_STACK_R=y
20CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
Tom Rinic427a582024-10-08 09:18:32 -0600[diff] [blame]21CONFIG_SYS_BOOTM_LEN=0x4000000
22CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]23CONFIG_DEBUG_UART_BASE=0xff690000
24CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]25CONFIG_DEBUG_UART=y
Wadim Egorov34e931f2022-12-13 11:38:09 +0100[diff] [blame]26CONFIG_LTO=y
Tom Rinib5bf5622017-08-25 17:50:27 -0400[diff] [blame]27# CONFIG_ANDROID_BOOT_IMAGE is not set
Simon Glass4be229d2019-07-20 20:51:14 -0600[diff] [blame]28CONFIG_USE_PREBOOT=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]29CONFIG_DEFAULT_FDT_FILE="rk3288-phycore-rdk.dtb"
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]30CONFIG_SILENT_CONSOLE=y
31CONFIG_CONSOLE_MUX=y
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]32CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]33CONFIG_SPL_PAD_TO=0x7f8000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]34CONFIG_SPL_NO_BSS_LIMIT=y
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]35# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]36CONFIG_CMD_GPIO=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]37CONFIG_CMD_GPT=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]38CONFIG_CMD_I2C=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]39CONFIG_CMD_MMC=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]40CONFIG_CMD_SPI=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]41CONFIG_CMD_USB=y
Urja Rannikko17dd9d32019-05-13 13:51:04 +0000[diff] [blame]42CONFIG_CMD_USB_MASS_STORAGE=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]43# CONFIG_CMD_SETEXPR is not set
44CONFIG_CMD_CACHE=y
45CONFIG_CMD_TIME=y
46CONFIG_CMD_PMIC=y
47CONFIG_CMD_REGULATOR=y
48# CONFIG_SPL_DOS_PARTITION is not set
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]49# CONFIG_SPL_EFI_PARTITION is not set
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]50CONFIG_SPL_OF_CONTROL=y
Wadim Egorov19ba3ba2024-04-19 08:51:17 +0200[diff] [blame]51CONFIG_OF_UPSTREAM=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]52CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]53CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]54CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Tom Rinieb1f9092020-07-24 17:14:47 -0400[diff] [blame]55CONFIG_SYS_MMC_ENV_DEV=1
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]56CONFIG_REGMAP=y
57CONFIG_SPL_REGMAP=y
58CONFIG_SYSCON=y
59CONFIG_SPL_SYSCON=y
60# CONFIG_SPL_SIMPLE_BUS is not set
61CONFIG_CLK=y
62CONFIG_SPL_CLK=y
Alex Kiernane80d2942018-05-29 15:30:55 +0000[diff] [blame]63CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]64CONFIG_ROCKCHIP_GPIO=y
65CONFIG_SYS_I2C_ROCKCHIP=y
Wadim Egorovdec8af42017-08-21 10:59:00 +0200[diff] [blame]66CONFIG_MISC=y
67CONFIG_I2C_EEPROM=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]68CONFIG_MMC_DW=y
69CONFIG_MMC_DW_ROCKCHIP=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]70CONFIG_ETH_DESIGNWARE=y
71CONFIG_GMAC_ROCKCHIP=y
72CONFIG_PINCTRL=y
73CONFIG_SPL_PINCTRL=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]74CONFIG_DM_PMIC=y
75CONFIG_PMIC_RK8XX=y
76CONFIG_DM_REGULATOR_FIXED=y
77CONFIG_REGULATOR_RK8XX=y
78CONFIG_PWM_ROCKCHIP=y
79CONFIG_RAM=y
80CONFIG_SPL_RAM=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]81CONFIG_DEBUG_UART_SHIFT=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]82CONFIG_SYS_NS16550_MEM32=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]83CONFIG_SYSRESET=y
84CONFIG_USB=y
Eddie Caib3501fe2017-12-15 08:17:13 +0800[diff] [blame]85CONFIG_USB_DWC2=y
Tom Rini6c3798f2018-02-10 20:27:45 -0500[diff] [blame]86CONFIG_ROCKCHIP_USB2_PHY=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]87CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]88CONFIG_USB_ETHER_ASIX=y
89CONFIG_USB_ETHER_SMSC95XX=y
Tom Rini2c082ab2021-07-26 21:10:37 -0400[diff] [blame]90CONFIG_USB_GADGET=y
91CONFIG_USB_GADGET_DWC2_OTG=y
Wadim Egorov6ee2d012017-06-19 12:36:40 +0200[diff] [blame]92CONFIG_CMD_DHRYSTONE=y
93CONFIG_ERRNO_STR=y