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Masahiro Yamadacc85b7b2015-07-26 02:46:26 +09001#
2# GPIO infrastructure and drivers
3#
4
5menu "GPIO Support"
6
Masahiro Yamada57ad8ee2014-10-23 22:26:09 +09007config DM_GPIO
8 bool "Enable Driver Model for GPIO drivers"
9 depends on DM
10 help
Simon Glassd8b771d2015-02-05 21:41:35 -070011 Enable driver model for GPIO access. The standard GPIO
12 interface (gpio_get_value(), etc.) is then implemented by
13 the GPIO uclass. Drivers provide methods to query the
14 particular GPIOs that they provide. The uclass interface
15 is defined in include/asm-generic/gpio.h.
Albert ARIBAUD \(3ADEV\)eb135ad2015-03-31 11:40:46 +020016
Thomas Choufb1a4bf2015-10-21 21:33:45 +080017config ALTERA_PIO
18 bool "Altera PIO driver"
19 depends on DM_GPIO
20 help
21 Select this to enable PIO for Altera devices. Please find
22 details on the "Embedded Peripherals IP User Guide" of Altera.
23
Marek Vasut12a8d792015-06-23 15:54:19 +020024config DWAPB_GPIO
25 bool "DWAPB GPIO driver"
26 depends on DM && DM_GPIO
27 default n
28 help
29 Support for the Designware APB GPIO driver.
30
Wenyou Yang5a09d132015-11-04 14:25:13 +080031config ATMEL_PIO4
32 bool "ATMEL PIO4 driver"
Wenyou Yang0b971522016-07-20 17:16:26 +080033 depends on DM_GPIO
Wenyou Yang5a09d132015-11-04 14:25:13 +080034 default n
35 help
36 Say yes here to support the Atmel PIO4 driver.
37 The PIO4 is new version of Atmel PIO controller, which manages
38 up to 128 fully programmable input/output lines. Each I/O line
39 may be dedicated as a general purpose I/O or be assigned to
40 a function of an embedded peripheral.
41
Simon Glass52c365f2016-03-11 22:07:27 -070042config INTEL_BROADWELL_GPIO
43 bool "Intel Broadwell GPIO driver"
44 depends on DM
45 help
46 This driver supports Broadwell U devices which have an expanded
47 GPIO feature set. The difference is large enough to merit a separate
48 driver from the common Intel ICH6 driver. It supports a total of
49 95 GPIOs which can be configured from the device tree.
50
Peng Fanc5f49862017-02-22 16:21:45 +080051config IMX_RGPIO2P
52 bool "i.MX7ULP RGPIO2P driver"
53 depends on DM
54 default n
55 help
56 This driver supports i.MX7ULP Rapid GPIO2P controller.
57
Albert ARIBAUD \(3ADEV\)eb135ad2015-03-31 11:40:46 +020058config LPC32XX_GPIO
59 bool "LPC32XX GPIO driver"
60 depends on DM
61 default n
62 help
63 Support for the LPC32XX GPIO driver.
Simon Glass084a3fe2015-03-06 13:19:01 -070064
Mateusz Kulikowskia1b3ae92016-03-31 23:12:15 +020065config MSM_GPIO
66 bool "Qualcomm GPIO driver"
67 depends on DM_GPIO
68 default n
69 help
70 Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
71 This controller have single bank (default name "soc"), every
72 gpio has it's own set of registers.
73 Only simple GPIO operations are supported (get/set, change of
74 direction and checking pin function).
75 Supported devices:
76 - APQ8016
77 - MSM8916
78
Mateusz Kulikowski15a58532016-03-31 23:12:31 +020079config PM8916_GPIO
80 bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
81 depends on DM_GPIO && PMIC_PM8916
82 help
83 Support for GPIO pins and power/reset buttons found on
84 Qualcomm PM8916 PMIC.
85 Default name for GPIO bank is "pm8916".
86 Power and reset buttons are placed in "pm8916_key" bank and
87 have gpio numbers 0 and 1 respectively.
88
Vignesh R0caf07c2016-08-02 10:14:24 +053089config PCF8575_GPIO
90 bool "PCF8575 I2C GPIO Expander driver"
91 depends on DM_GPIO && DM_I2C
92 help
93 Support for PCF8575 I2C 16-bit GPIO expander. Most of these
94 chips are from NXP and TI.
95
Simon Glass8fa4d5a2015-08-30 16:55:27 -060096config ROCKCHIP_GPIO
97 bool "Rockchip GPIO driver"
98 depends on DM_GPIO
99 help
100 Support GPIO access on Rockchip SoCs. The GPIOs are arranged into
101 a number of banks (different for each SoC type) each with 32 GPIOs.
102 The GPIOs for a device are defined in the device tree with one node
103 for each bank.
104
Simon Glass084a3fe2015-03-06 13:19:01 -0700105config SANDBOX_GPIO
106 bool "Enable sandbox GPIO driver"
107 depends on SANDBOX && DM && DM_GPIO
108 help
109 This driver supports some simulated GPIOs which can be adjusted
110 using 'back door' functions like sandbox_gpio_set_value(). Then the
111 GPIOs can be inspected through the normal get_get_value()
112 interface. The purpose of this is to allow GPIOs to be used as
113 normal in sandbox, perhaps with test code actually driving the
114 behaviour of those GPIOs.
115
116config SANDBOX_GPIO_COUNT
117 int "Number of sandbox GPIOs"
118 depends on SANDBOX_GPIO
119 default 128
120 help
121 The sandbox driver can support any number of GPIOs. Generally these
122 are specified using the device tree. But you can also have a number
123 of 'anonymous' GPIOs that do not belong to any device or bank.
124 Select a suitable value depending on your needs.
Bhuvanchandra DV6d236aa2015-06-01 18:37:16 +0530125
Stephen Warrenaf974be2016-05-12 12:07:41 -0600126config TEGRA_GPIO
127 bool "Tegra20..210 GPIO driver"
128 depends on DM_GPIO
129 help
130 Support for the GPIO controller contained in NVIDIA Tegra20 through
131 Tegra210.
132
Stephen Warren0c5403f2016-05-25 14:38:51 -0600133config TEGRA186_GPIO
134 bool "Tegra186 GPIO driver"
135 depends on DM_GPIO
136 help
137 Support for the GPIO controller contained in NVIDIA Tegra186. This
138 covers both the "main" and "AON" controller instances, even though
139 they have slightly different register layout.
140
Masahiro Yamada2dbca982016-02-16 17:03:48 +0900141config GPIO_UNIPHIER
142 bool "UniPhier GPIO"
143 depends on ARCH_UNIPHIER
144 help
145 Say yes here to support UniPhier GPIOs.
146
Bhuvanchandra DV6d236aa2015-06-01 18:37:16 +0530147config VYBRID_GPIO
148 bool "Vybrid GPIO driver"
149 depends on DM
150 default n
151 help
152 Say yes here to support Vybrid vf610 GPIOs.
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +0900153
Purna Chandra Mandal0ee99ca2016-01-28 15:30:13 +0530154config PIC32_GPIO
155 bool "Microchip PIC32 GPIO driver"
156 depends on DM_GPIO && MACH_PIC32
157 default y
158 help
159 Say yes here to support Microchip PIC32 GPIOs.
160
Stefan Roesee0e70422016-02-12 13:46:50 +0100161config MVEBU_GPIO
162 bool "Marvell MVEBU GPIO driver"
163 depends on DM_GPIO && ARCH_MVEBU
164 default y
165 help
166 Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs.
167
Siva Durga Prasad Paladugud6d00822016-03-10 16:27:39 +0530168config ZYNQ_GPIO
169 bool "Zynq GPIO driver"
Siva Durga Prasad Paladugu3c1107e2016-03-10 16:27:44 +0530170 depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP)
Siva Durga Prasad Paladugud6d00822016-03-10 16:27:39 +0530171 default y
172 help
173 Supports GPIO access on Zynq SoC.
174
Peng Fan28b4a1c2016-05-03 10:02:23 +0800175config DM_74X164
176 bool "74x164 serial-in/parallel-out 8-bits shift register"
177 depends on DM_GPIO
178 help
179 Driver for 74x164 compatible serial-in/parallel-out 8-outputs
180 shift registers, such as 74lv165, 74hc595.
181 This driver can be used to provide access to more gpio outputs.
182
Peng Fanca675072016-04-14 21:45:06 +0800183config DM_PCA953X
184 bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports"
185 depends on DM_GPIO
186 help
187 Say yes here to provide access to several register-oriented
188 SMBus I/O expanders, made mostly by NXP or TI. Compatible
189 models include:
190
191 4 bits: pca9536, pca9537
192
193 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554,
194 pca9556, pca9557, pca9574, tca6408, xra1202
195
196 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575,
197 tca6416
198
199 24 bits: tca6424
200
201 40 bits: pca9505, pca9698
202
203 Now, max 24 bits chips and PCA953X compatible chips are
204 supported
mario.six@gdsys.cc5b59a352016-05-25 15:15:20 +0200205
206config MPC85XX_GPIO
207 bool "Freescale MPC85XX GPIO driver"
208 depends on DM_GPIO
209 help
210 This driver supports the built-in GPIO controller of MPC85XX CPUs.
211 Each GPIO bank is identified by its own entry in the device tree,
212 i.e.
213
214 gpio-controller@fc00 {
215 #gpio-cells = <2>;
216 compatible = "fsl,pq3-gpio";
217 reg = <0xfc00 0x100>
218 }
219
220 By default, each bank is assumed to have 32 GPIOs, but the ngpios
221 setting is honored, so the number of GPIOs for each bank is
222 configurable to match the actual GPIO count of the SoC (e.g. the
223 32/32/23 banks of the P1022 SoC).
224
mario.six@gdsys.cc7b4cf8b2016-05-25 15:15:22 +0200225 Aside from the standard functions of input/output mode, and output
226 value setting, the open-drain feature, which can configure individual
227 GPIOs to work as open-drain outputs, is supported.
mario.six@gdsys.cc5b59a352016-05-25 15:15:20 +0200228
229 The driver has been tested on MPC85XX, but it is likely that other
230 PowerQUICC III devices will work as well.
Masahiro Yamadacc85b7b2015-07-26 02:46:26 +0900231endmenu