Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2006 Ben Warren, Qstreams Networks Inc. |
Stefan Roese | 88fbf93 | 2010-04-15 16:07:28 +0200 | [diff] [blame] | 3 | * With help from the common/soft_spi and arch/powerpc/cpu/mpc8260 drivers |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 4 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Ben Warren | 3753140 | 2008-01-26 23:41:19 -0500 | [diff] [blame] | 9 | |
Haavard Skinnemoen | d74084a | 2008-05-16 11:10:31 +0200 | [diff] [blame] | 10 | #include <malloc.h> |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 11 | #include <spi.h> |
| 12 | #include <asm/mpc8xxx_spi.h> |
| 13 | |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 14 | #define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */ |
| 15 | #define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */ |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 16 | |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 17 | #define SPI_MODE_LOOP (0x80000000 >> 1) /* Loopback mode */ |
| 18 | #define SPI_MODE_REV (0x80000000 >> 5) /* Reverse mode - MSB first */ |
| 19 | #define SPI_MODE_MS (0x80000000 >> 6) /* Always master */ |
| 20 | #define SPI_MODE_EN (0x80000000 >> 7) /* Enable interface */ |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 21 | |
| 22 | #define SPI_TIMEOUT 1000 |
| 23 | |
Haavard Skinnemoen | d74084a | 2008-05-16 11:10:31 +0200 | [diff] [blame] | 24 | struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, |
| 25 | unsigned int max_hz, unsigned int mode) |
| 26 | { |
| 27 | struct spi_slave *slave; |
| 28 | |
| 29 | if (!spi_cs_is_valid(bus, cs)) |
| 30 | return NULL; |
| 31 | |
Simon Glass | d034a95 | 2013-03-18 19:23:40 +0000 | [diff] [blame] | 32 | slave = spi_alloc_slave_base(bus, cs); |
Haavard Skinnemoen | d74084a | 2008-05-16 11:10:31 +0200 | [diff] [blame] | 33 | if (!slave) |
| 34 | return NULL; |
| 35 | |
Haavard Skinnemoen | d74084a | 2008-05-16 11:10:31 +0200 | [diff] [blame] | 36 | /* |
| 37 | * TODO: Some of the code in spi_init() should probably move |
| 38 | * here, or into spi_claim_bus() below. |
| 39 | */ |
| 40 | |
| 41 | return slave; |
| 42 | } |
| 43 | |
| 44 | void spi_free_slave(struct spi_slave *slave) |
| 45 | { |
| 46 | free(slave); |
| 47 | } |
| 48 | |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 49 | void spi_init(void) |
| 50 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 51 | volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 52 | |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 53 | /* |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 54 | * SPI pins on the MPC83xx are not muxed, so all we do is initialize |
| 55 | * some registers |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 56 | */ |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 57 | spi->mode = SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN; |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 58 | spi->mode = (spi->mode & 0xfff0ffff) | (1 << 16); /* Use SYSCLK / 8 |
| 59 | (16.67MHz typ.) */ |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 60 | spi->event = 0xffffffff; /* Clear all SPI events */ |
| 61 | spi->mask = 0x00000000; /* Mask all SPI interrupts */ |
| 62 | spi->com = 0; /* LST bit doesn't do anything, so disregard */ |
| 63 | } |
| 64 | |
Haavard Skinnemoen | d74084a | 2008-05-16 11:10:31 +0200 | [diff] [blame] | 65 | int spi_claim_bus(struct spi_slave *slave) |
| 66 | { |
| 67 | return 0; |
| 68 | } |
| 69 | |
| 70 | void spi_release_bus(struct spi_slave *slave) |
| 71 | { |
| 72 | |
| 73 | } |
| 74 | |
| 75 | int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, |
| 76 | void *din, unsigned long flags) |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 77 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 78 | volatile spi8xxx_t *spi = &((immap_t *) (CONFIG_SYS_IMMR))->spi; |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 79 | unsigned int tmpdout, tmpdin, event; |
Axel Lin | 3db3928 | 2013-07-12 17:42:15 +0800 | [diff] [blame] | 80 | int numBlks = DIV_ROUND_UP(bitlen, 32); |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 81 | int tm, isRead = 0; |
| 82 | unsigned char charSize = 32; |
| 83 | |
Haavard Skinnemoen | d74084a | 2008-05-16 11:10:31 +0200 | [diff] [blame] | 84 | debug("spi_xfer: slave %u:%u dout %08X din %08X bitlen %u\n", |
| 85 | slave->bus, slave->cs, *(uint *) dout, *(uint *) din, bitlen); |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 86 | |
Haavard Skinnemoen | d74084a | 2008-05-16 11:10:31 +0200 | [diff] [blame] | 87 | if (flags & SPI_XFER_BEGIN) |
| 88 | spi_cs_activate(slave); |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 89 | |
| 90 | spi->event = 0xffffffff; /* Clear all SPI events */ |
| 91 | |
| 92 | /* handle data in 32-bit chunks */ |
| 93 | while (numBlks--) { |
| 94 | tmpdout = 0; |
| 95 | charSize = (bitlen >= 32 ? 32 : bitlen); |
| 96 | |
| 97 | /* Shift data so it's msb-justified */ |
| 98 | tmpdout = *(u32 *) dout >> (32 - charSize); |
| 99 | |
| 100 | /* The LEN field of the SPMODE register is set as follows: |
| 101 | * |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 102 | * Bit length setting |
| 103 | * len <= 4 3 |
| 104 | * 4 < len <= 16 len - 1 |
| 105 | * len > 16 0 |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 106 | */ |
| 107 | |
Ira W. Snyder | 5261b00 | 2012-09-12 14:17:31 -0700 | [diff] [blame] | 108 | spi->mode &= ~SPI_MODE_EN; |
| 109 | |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 110 | if (bitlen <= 16) { |
| 111 | if (bitlen <= 4) |
| 112 | spi->mode = (spi->mode & 0xff0fffff) | |
Wolfgang Denk | ec7fbf5 | 2013-10-04 17:43:24 +0200 | [diff] [blame] | 113 | (3 << 20); |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 114 | else |
| 115 | spi->mode = (spi->mode & 0xff0fffff) | |
Wolfgang Denk | ec7fbf5 | 2013-10-04 17:43:24 +0200 | [diff] [blame] | 116 | ((bitlen - 1) << 20); |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 117 | } else { |
| 118 | spi->mode = (spi->mode & 0xff0fffff); |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 119 | /* Set up the next iteration if sending > 32 bits */ |
| 120 | bitlen -= 32; |
| 121 | dout += 4; |
| 122 | } |
| 123 | |
Ira W. Snyder | 5261b00 | 2012-09-12 14:17:31 -0700 | [diff] [blame] | 124 | spi->mode |= SPI_MODE_EN; |
| 125 | |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 126 | spi->tx = tmpdout; /* Write the data out */ |
| 127 | debug("*** spi_xfer: ... %08x written\n", tmpdout); |
| 128 | |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 129 | /* |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 130 | * Wait for SPI transmit to get out |
| 131 | * or time out (1 second = 1000 ms) |
| 132 | * The NE event must be read and cleared first |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 133 | */ |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 134 | for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) { |
| 135 | event = spi->event; |
| 136 | if (event & SPI_EV_NE) { |
| 137 | tmpdin = spi->rx; |
| 138 | spi->event |= SPI_EV_NE; |
| 139 | isRead = 1; |
| 140 | |
| 141 | *(u32 *) din = (tmpdin << (32 - charSize)); |
| 142 | if (charSize == 32) { |
| 143 | /* Advance output buffer by 32 bits */ |
| 144 | din += 4; |
| 145 | } |
| 146 | } |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 147 | /* |
| 148 | * Only bail when we've had both NE and NF events. |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 149 | * This will cause timeouts on RO devices, so maybe |
| 150 | * in the future put an arbitrary delay after writing |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 151 | * the device. Arbitrary delays suck, though... |
| 152 | */ |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 153 | if (isRead && (event & SPI_EV_NF)) |
| 154 | break; |
| 155 | } |
| 156 | if (tm >= SPI_TIMEOUT) |
| 157 | puts("*** spi_xfer: Time out during SPI transfer"); |
| 158 | |
| 159 | debug("*** spi_xfer: transfer ended. Value=%08x\n", tmpdin); |
| 160 | } |
| 161 | |
Haavard Skinnemoen | d74084a | 2008-05-16 11:10:31 +0200 | [diff] [blame] | 162 | if (flags & SPI_XFER_END) |
| 163 | spi_cs_deactivate(slave); |
Kim Phillips | b8e2520 | 2008-01-17 12:48:00 -0600 | [diff] [blame] | 164 | |
Ben Warren | 7efe927 | 2008-01-16 22:37:35 -0500 | [diff] [blame] | 165 | return 0; |
| 166 | } |