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wdenk041b1de2002-09-07 21:30:09 +00001/*
2 * linux/include/asm-arm/io.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Modifications:
11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
12 * constant addresses and variable addresses.
13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
14 * specific IO header files.
15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
16 * 04-Apr-1999 PJB Added check_signature.
17 * 12-Dec-1999 RMK More cleanups
18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
19 */
20#ifndef __ASM_ARM_IO_H
21#define __ASM_ARM_IO_H
22
wdenkbb2d9272003-06-25 22:26:29 +000023#ifdef __KERNEL__
24
wdenk041b1de2002-09-07 21:30:09 +000025#include <linux/types.h>
26#include <asm/byteorder.h>
27#include <asm/memory.h>
wdenkbb2d9272003-06-25 22:26:29 +000028#if 0 /* XXX###XXX */
wdenk041b1de2002-09-07 21:30:09 +000029#include <asm/arch/hardware.h>
wdenkbb2d9272003-06-25 22:26:29 +000030#endif /* XXX###XXX */
wdenk041b1de2002-09-07 21:30:09 +000031
32/*
33 * Generic virtual read/write. Note that we don't support half-word
34 * read/writes. We define __arch_*[bl] here, and leave __arch_*w
35 * to the architecture specific code.
36 */
37#define __arch_getb(a) (*(volatile unsigned char *)(a))
wdenkf8062712005-01-09 23:16:25 +000038#define __arch_getw(a) (*(volatile unsigned short *)(a))
39#define __arch_getl(a) (*(volatile unsigned int *)(a))
wdenk041b1de2002-09-07 21:30:09 +000040
41#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
wdenkf8062712005-01-09 23:16:25 +000042#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
43#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
wdenk041b1de2002-09-07 21:30:09 +000044
45extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
46extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
47extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
48
49extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
50extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
51extern void __raw_readsl(unsigned int addr, void *data, int longlen);
52
53#define __raw_writeb(v,a) __arch_putb(v,a)
54#define __raw_writew(v,a) __arch_putw(v,a)
55#define __raw_writel(v,a) __arch_putl(v,a)
56
57#define __raw_readb(a) __arch_getb(a)
58#define __raw_readw(a) __arch_getw(a)
59#define __raw_readl(a) __arch_getl(a)
60
Wolfgang Denk7b9bc3a2005-09-14 23:53:32 +020061#define writeb(v,a) __arch_putb(v,a)
62#define writew(v,a) __arch_putw(v,a)
63#define writel(v,a) __arch_putl(v,a)
64
65#define readb(a) __arch_getb(a)
66#define readw(a) __arch_getw(a)
67#define readl(a) __arch_getl(a)
68
wdenk041b1de2002-09-07 21:30:09 +000069/*
70 * The compiler seems to be incapable of optimising constants
71 * properly. Spell it out to the compiler in some cases.
72 * These are only valid for small values of "off" (< 1<<12)
73 */
74#define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off)
75#define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off)
76#define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off)
77
78#define __raw_base_readb(base,off) __arch_base_getb(base,off)
79#define __raw_base_readw(base,off) __arch_base_getw(base,off)
80#define __raw_base_readl(base,off) __arch_base_getl(base,off)
81
82/*
83 * Now, pick up the machine-defined IO definitions
84 */
wdenkbb2d9272003-06-25 22:26:29 +000085#if 0 /* XXX###XXX */
wdenk041b1de2002-09-07 21:30:09 +000086#include <asm/arch/io.h>
wdenkbb2d9272003-06-25 22:26:29 +000087#endif /* XXX###XXX */
wdenk041b1de2002-09-07 21:30:09 +000088
89/*
wdenk6b58f332003-03-14 20:47:52 +000090 * IO port access primitives
91 * -------------------------
92 *
93 * The ARM doesn't have special IO access instructions; all IO is memory
94 * mapped. Note that these are defined to perform little endian accesses
95 * only. Their primary purpose is to access PCI and ISA peripherals.
96 *
97 * Note that for a big endian machine, this implies that the following
98 * big endian mode connectivity is in place, as described by numerious
99 * ARM documents:
100 *
101 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
102 * ARM: D24-D31 D16-D23 D8-D15 D0-D7
103 *
104 * The machine specific io.h include defines __io to translate an "IO"
105 * address to a memory address.
wdenk041b1de2002-09-07 21:30:09 +0000106 *
107 * Note that we prevent GCC re-ordering or caching values in expressions
108 * by introducing sequence points into the in*() definitions. Note that
109 * __raw_* do not guarantee this behaviour.
wdenk6b58f332003-03-14 20:47:52 +0000110 *
111 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
wdenk041b1de2002-09-07 21:30:09 +0000112 */
113#ifdef __io
114#define outb(v,p) __raw_writeb(v,__io(p))
wdenk6b58f332003-03-14 20:47:52 +0000115#define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p))
116#define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p))
wdenk041b1de2002-09-07 21:30:09 +0000117
wdenk6b58f332003-03-14 20:47:52 +0000118#define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
119#define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
120#define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
wdenk041b1de2002-09-07 21:30:09 +0000121
122#define outsb(p,d,l) __raw_writesb(__io(p),d,l)
123#define outsw(p,d,l) __raw_writesw(__io(p),d,l)
124#define outsl(p,d,l) __raw_writesl(__io(p),d,l)
125
126#define insb(p,d,l) __raw_readsb(__io(p),d,l)
127#define insw(p,d,l) __raw_readsw(__io(p),d,l)
128#define insl(p,d,l) __raw_readsl(__io(p),d,l)
129#endif
130
131#define outb_p(val,port) outb((val),(port))
132#define outw_p(val,port) outw((val),(port))
133#define outl_p(val,port) outl((val),(port))
134#define inb_p(port) inb((port))
135#define inw_p(port) inw((port))
136#define inl_p(port) inl((port))
137
138#define outsb_p(port,from,len) outsb(port,from,len)
139#define outsw_p(port,from,len) outsw(port,from,len)
140#define outsl_p(port,from,len) outsl(port,from,len)
141#define insb_p(port,to,len) insb(port,to,len)
142#define insw_p(port,to,len) insw(port,to,len)
143#define insl_p(port,to,len) insl(port,to,len)
144
145/*
146 * ioremap and friends.
147 *
148 * ioremap takes a PCI memory address, as specified in
149 * linux/Documentation/IO-mapping.txt. If you want a
150 * physical address, use __ioremap instead.
151 */
152extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags);
153extern void __iounmap(void *addr);
154
155/*
156 * Generic ioremap support.
157 *
158 * Define:
159 * iomem_valid_addr(off,size)
160 * iomem_to_phys(off)
161 */
162#ifdef iomem_valid_addr
163#define __arch_ioremap(off,sz,nocache) \
164 ({ \
165 unsigned long _off = (off), _size = (sz); \
166 void *_ret = (void *)0; \
167 if (iomem_valid_addr(_off, _size)) \
168 _ret = __ioremap(iomem_to_phys(_off),_size,0); \
169 _ret; \
170 })
171
172#define __arch_iounmap __iounmap
173#endif
174
175#define ioremap(off,sz) __arch_ioremap((off),(sz),0)
176#define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1)
177#define iounmap(_addr) __arch_iounmap(_addr)
178
179/*
180 * DMA-consistent mapping functions. These allocate/free a region of
181 * uncached, unwrite-buffered mapped memory space for use with DMA
182 * devices. This is the "generic" version. The PCI specific version
183 * is in pci.h
184 */
185extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
186extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
187extern void consistent_sync(void *vaddr, size_t size, int rw);
188
189/*
190 * String version of IO memory access ops:
191 */
192extern void _memcpy_fromio(void *, unsigned long, size_t);
193extern void _memcpy_toio(unsigned long, const void *, size_t);
194extern void _memset_io(unsigned long, int, size_t);
195
196extern void __readwrite_bug(const char *fn);
197
198/*
199 * If this architecture has PCI memory IO, then define the read/write
200 * macros. These should only be used with the cookie passed from
201 * ioremap.
202 */
203#ifdef __mem_pci
204
wdenk6b58f332003-03-14 20:47:52 +0000205#define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
206#define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
207#define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
wdenk041b1de2002-09-07 21:30:09 +0000208
wdenk6b58f332003-03-14 20:47:52 +0000209#define writeb(v,c) __raw_writeb(v,__mem_pci(c))
210#define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c))
211#define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c))
wdenk041b1de2002-09-07 21:30:09 +0000212
wdenk6b58f332003-03-14 20:47:52 +0000213#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
214#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
215#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l))
wdenk041b1de2002-09-07 21:30:09 +0000216
wdenk6b58f332003-03-14 20:47:52 +0000217#define eth_io_copy_and_sum(s,c,l,b) \
218 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
wdenk041b1de2002-09-07 21:30:09 +0000219
220static inline int
221check_signature(unsigned long io_addr, const unsigned char *signature,
222 int length)
223{
224 int retval = 0;
225 do {
226 if (readb(io_addr) != *signature)
227 goto out;
228 io_addr++;
229 signature++;
230 length--;
231 } while (length);
232 retval = 1;
233out:
234 return retval;
235}
236
237#elif !defined(readb)
238
239#define readb(addr) (__readwrite_bug("readb"),0)
240#define readw(addr) (__readwrite_bug("readw"),0)
241#define readl(addr) (__readwrite_bug("readl"),0)
242#define writeb(v,addr) __readwrite_bug("writeb")
243#define writew(v,addr) __readwrite_bug("writew")
244#define writel(v,addr) __readwrite_bug("writel")
245
246#define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum")
247
248#define check_signature(io,sig,len) (0)
249
250#endif /* __mem_pci */
251
252/*
wdenk041b1de2002-09-07 21:30:09 +0000253 * If this architecture has ISA IO, then define the isa_read/isa_write
254 * macros.
255 */
256#ifdef __mem_isa
257
258#define isa_readb(addr) __raw_readb(__mem_isa(addr))
259#define isa_readw(addr) __raw_readw(__mem_isa(addr))
260#define isa_readl(addr) __raw_readl(__mem_isa(addr))
261#define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr))
262#define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr))
263#define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr))
264#define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c))
265#define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c))
266#define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c))
267
268#define isa_eth_io_copy_and_sum(a,b,c,d) \
269 eth_copy_and_sum((a),__mem_isa(b),(c),(d))
270
wdenk041b1de2002-09-07 21:30:09 +0000271static inline int
272isa_check_signature(unsigned long io_addr, const unsigned char *signature,
273 int length)
274{
275 int retval = 0;
276 do {
277 if (isa_readb(io_addr) != *signature)
278 goto out;
279 io_addr++;
280 signature++;
281 length--;
282 } while (length);
283 retval = 1;
284out:
285 return retval;
286}
287
288#else /* __mem_isa */
289
290#define isa_readb(addr) (__readwrite_bug("isa_readb"),0)
291#define isa_readw(addr) (__readwrite_bug("isa_readw"),0)
292#define isa_readl(addr) (__readwrite_bug("isa_readl"),0)
293#define isa_writeb(val,addr) __readwrite_bug("isa_writeb")
294#define isa_writew(val,addr) __readwrite_bug("isa_writew")
295#define isa_writel(val,addr) __readwrite_bug("isa_writel")
296#define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io")
297#define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio")
298#define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio")
299
300#define isa_eth_io_copy_and_sum(a,b,c,d) \
301 __readwrite_bug("isa_eth_io_copy_and_sum")
302
303#define isa_check_signature(io,sig,len) (0)
304
305#endif /* __mem_isa */
wdenkbb2d9272003-06-25 22:26:29 +0000306#endif /* __KERNEL__ */
wdenk041b1de2002-09-07 21:30:09 +0000307#endif /* __ASM_ARM_IO_H */