wdenk | e221174 | 2002-11-02 23:30:20 +0000 | [diff] [blame] | 1 | /*********************************************************************** |
| 2 | * |
| 3 | M* Modul: lwmon.c |
| 4 | M* |
| 5 | M* Content: LWMON specific U-Boot commands. |
| 6 | * |
| 7 | * (C) Copyright 2001, 2002 |
| 8 | * DENX Software Engineering |
| 9 | * Wolfgang Denk, wd@denx.de |
| 10 | * All rights reserved. |
| 11 | * |
| 12 | D* Design: wd@denx.de |
| 13 | C* Coding: wd@denx.de |
| 14 | V* Verification: dzu@denx.de |
| 15 | * |
| 16 | * See file CREDITS for list of people who contributed to this |
| 17 | * project. |
| 18 | * |
| 19 | * This program is free software; you can redistribute it and/or |
| 20 | * modify it under the terms of the GNU General Public License as |
| 21 | * published by the Free Software Foundation; either version 2 of |
| 22 | * the License, or (at your option) any later version. |
| 23 | * |
| 24 | * This program is distributed in the hope that it will be useful, |
| 25 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 26 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 27 | * GNU General Public License for more details. |
| 28 | * |
| 29 | * You should have received a copy of the GNU General Public License |
| 30 | * along with this program; if not, write to the Free Software |
| 31 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 32 | * MA 02111-1307 USA |
| 33 | ***********************************************************************/ |
| 34 | |
| 35 | /*---------------------------- Headerfiles ----------------------------*/ |
| 36 | #include <common.h> |
| 37 | #include <mpc8xx.h> |
| 38 | #include <commproc.h> |
| 39 | #include <i2c.h> |
| 40 | #include <command.h> |
| 41 | #include <cmd_bsp.h> |
| 42 | #include <malloc.h> |
| 43 | #include <post.h> |
| 44 | |
| 45 | #include <linux/types.h> |
| 46 | #include <linux/string.h> /* for strdup */ |
| 47 | |
| 48 | /*------------------------ Local prototypes ---------------------------*/ |
| 49 | static long int dram_size (long int, long int *, long int); |
| 50 | |
| 51 | |
| 52 | /*--------------------- Local macros and constants --------------------*/ |
| 53 | #define _NOT_USED_ 0xFFFFFFFF |
| 54 | |
| 55 | /* |
| 56 | * 66 MHz SDRAM access using UPM A |
| 57 | */ |
| 58 | const uint sdram_table[] = |
| 59 | { |
| 60 | #if defined(CFG_MEMORY_75) || defined(CFG_MEMORY_8E) |
| 61 | /* |
| 62 | * Single Read. (Offset 0 in UPM RAM) |
| 63 | */ |
| 64 | 0x1F0DFC04, 0xEEAFBC04, 0x11AF7C04, 0xEFBAFC00, |
| 65 | 0x1FF5FC47, /* last */ |
| 66 | /* |
| 67 | * SDRAM Initialization (offset 5 in UPM RAM) |
| 68 | * |
| 69 | * This is no UPM entry point. The following definition uses |
| 70 | * the remaining space to establish an initialization |
| 71 | * sequence, which is executed by a RUN command. |
| 72 | * |
| 73 | */ |
| 74 | 0x1FF5FC34, 0xEFEABC34, 0x1FB57C35, /* last */ |
| 75 | /* |
| 76 | * Burst Read. (Offset 8 in UPM RAM) |
| 77 | */ |
| 78 | 0x1F0DFC04, 0xEEAFBC04, 0x10AF7C04, 0xF0AFFC00, |
| 79 | 0xF0AFFC00, 0xF1AFFC00, 0xEFBAFC00, 0x1FF5FC47, /* last */ |
| 80 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 81 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 82 | /* |
| 83 | * Single Write. (Offset 18 in UPM RAM) |
| 84 | */ |
| 85 | 0x1F2DFC04, 0xEEABBC00, 0x01B27C04, 0x1FF5FC47, /* last */ |
| 86 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 87 | /* |
| 88 | * Burst Write. (Offset 20 in UPM RAM) |
| 89 | */ |
| 90 | 0x1F0DFC04, 0xEEABBC00, 0x10A77C00, 0xF0AFFC00, |
| 91 | 0xF0AFFC00, 0xE1BAFC04, 0x01FF5FC47, /* last */ |
| 92 | _NOT_USED_, |
| 93 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 94 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 95 | /* |
| 96 | * Refresh (Offset 30 in UPM RAM) |
| 97 | */ |
| 98 | 0x1FFD7C84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, |
| 99 | 0xFFFFFC84, 0xFFFFFC07, /* last */ |
| 100 | _NOT_USED_, _NOT_USED_, |
| 101 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 102 | /* |
| 103 | * Exception. (Offset 3c in UPM RAM) |
| 104 | */ |
| 105 | 0x7FFFFC07, /* last */ |
| 106 | 0xFFFFFCFF, 0xFFFFFCFF, 0xFFFFFCFF, |
| 107 | #endif |
| 108 | #ifdef CFG_MEMORY_7E |
| 109 | /* |
| 110 | * Single Read. (Offset 0 in UPM RAM) |
| 111 | */ |
| 112 | 0x0E2DBC04, 0x11AF7C04, 0xEFBAFC00, 0x1FF5FC47, /* last */ |
| 113 | _NOT_USED_, |
| 114 | /* |
| 115 | * SDRAM Initialization (offset 5 in UPM RAM) |
| 116 | * |
| 117 | * This is no UPM entry point. The following definition uses |
| 118 | * the remaining space to establish an initialization |
| 119 | * sequence, which is executed by a RUN command. |
| 120 | * |
| 121 | */ |
| 122 | 0x1FF5FC34, 0xEFEABC34, 0x1FB57C35, /* last */ |
| 123 | /* |
| 124 | * Burst Read. (Offset 8 in UPM RAM) |
| 125 | */ |
| 126 | 0x0E2DBC04, 0x10AF7C04, 0xF0AFFC00, 0xF0AFFC00, |
| 127 | 0xF1AFFC00, 0xEFBAFC00, 0x1FF5FC47, /* last */ |
| 128 | _NOT_USED_, |
| 129 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 130 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 131 | /* |
| 132 | * Single Write. (Offset 18 in UPM RAM) |
| 133 | */ |
| 134 | 0x0E29BC04, 0x01B27C04, 0x1FF5FC47, /* last */ |
| 135 | _NOT_USED_, |
| 136 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 137 | /* |
| 138 | * Burst Write. (Offset 20 in UPM RAM) |
| 139 | */ |
| 140 | 0x0E29BC04, 0x10A77C00, 0xF0AFFC00, 0xF0AFFC00, |
| 141 | 0xE1BAFC04, 0x1FF5FC47, /* last */ |
| 142 | _NOT_USED_, _NOT_USED_, |
| 143 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 144 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 145 | /* |
| 146 | * Refresh (Offset 30 in UPM RAM) |
| 147 | */ |
| 148 | 0x1FFD7C84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, |
| 149 | 0xFFFFFC84, 0xFFFFFC07, /* last */ |
| 150 | _NOT_USED_, _NOT_USED_, |
| 151 | _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, |
| 152 | /* |
| 153 | * Exception. (Offset 3c in UPM RAM) |
| 154 | */ |
| 155 | 0x7FFFFC07, /* last */ |
| 156 | 0xFFFFFCFF, 0xFFFFFCFF, 0xFFFFFCFF, |
| 157 | #endif |
| 158 | }; |
| 159 | |
| 160 | /* |
| 161 | * Check Board Identity: |
| 162 | * |
| 163 | */ |
| 164 | |
| 165 | /*********************************************************************** |
| 166 | F* Function: int checkboard (void) P*A*Z* |
| 167 | * |
| 168 | P* Parameters: none |
| 169 | P* |
| 170 | P* Returnvalue: int - 0 is always returned |
| 171 | * |
| 172 | Z* Intention: This function is the checkboard() method implementation |
| 173 | Z* for the lwmon board. Only a standard message is printed. |
| 174 | * |
| 175 | D* Design: wd@denx.de |
| 176 | C* Coding: wd@denx.de |
| 177 | V* Verification: dzu@denx.de |
| 178 | ***********************************************************************/ |
| 179 | int checkboard (void) |
| 180 | { |
| 181 | puts ("Board: Litronic Monitor IV\n"); |
| 182 | return (0); |
| 183 | } |
| 184 | |
| 185 | /*********************************************************************** |
| 186 | F* Function: long int initdram (int board_type) P*A*Z* |
| 187 | * |
| 188 | P* Parameters: int board_type |
| 189 | P* - Usually type of the board - ignored here. |
| 190 | P* |
| 191 | P* Returnvalue: long int |
| 192 | P* - Size of initialized memory |
| 193 | * |
| 194 | Z* Intention: This function is the initdram() method implementation |
| 195 | Z* for the lwmon board. |
| 196 | Z* The memory controller is initialized to access the |
| 197 | Z* DRAM. |
| 198 | * |
| 199 | D* Design: wd@denx.de |
| 200 | C* Coding: wd@denx.de |
| 201 | V* Verification: dzu@denx.de |
| 202 | ***********************************************************************/ |
| 203 | long int initdram (int board_type) |
| 204 | { |
| 205 | volatile immap_t *immr = (immap_t *) CFG_IMMR; |
| 206 | volatile memctl8xx_t *memctl = &immr->im_memctl; |
| 207 | long int size_b0; |
| 208 | long int size8, size9; |
| 209 | int i; |
| 210 | |
| 211 | /* |
| 212 | * Configure UPMA for SDRAM |
| 213 | */ |
| 214 | upmconfig (UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint)); |
| 215 | |
| 216 | memctl->memc_mptpr = CFG_MPTPR; |
| 217 | |
| 218 | /* burst length=4, burst type=sequential, CAS latency=2 */ |
| 219 | memctl->memc_mar = CFG_MAR; |
| 220 | |
| 221 | /* |
| 222 | * Map controller bank 3 to the SDRAM bank at preliminary address. |
| 223 | */ |
| 224 | memctl->memc_or3 = CFG_OR3_PRELIM; |
| 225 | memctl->memc_br3 = CFG_BR3_PRELIM; |
| 226 | |
| 227 | /* initialize memory address register */ |
| 228 | memctl->memc_mamr = CFG_MAMR_8COL; /* refresh not enabled yet */ |
| 229 | |
| 230 | /* mode initialization (offset 5) */ |
| 231 | udelay (200); /* 0x80006105 */ |
| 232 | memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x05); |
| 233 | |
| 234 | /* run 2 refresh sequence with 4-beat refresh burst (offset 0x30) */ |
| 235 | udelay (1); /* 0x80006130 */ |
| 236 | memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x30); |
| 237 | udelay (1); /* 0x80006130 */ |
| 238 | memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x30); |
| 239 | |
| 240 | udelay (1); /* 0x80006106 */ |
| 241 | memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x06); |
| 242 | |
| 243 | memctl->memc_mamr |= MAMR_PTBE; /* refresh enabled */ |
| 244 | |
| 245 | udelay (200); |
| 246 | |
| 247 | /* Need at least 10 DRAM accesses to stabilize */ |
| 248 | for (i = 0; i < 10; ++i) { |
| 249 | volatile unsigned long *addr = |
| 250 | (volatile unsigned long *) SDRAM_BASE3_PRELIM; |
| 251 | unsigned long val; |
| 252 | |
| 253 | val = *(addr + i); |
| 254 | *(addr + i) = val; |
| 255 | } |
| 256 | |
| 257 | /* |
| 258 | * Check Bank 0 Memory Size for re-configuration |
| 259 | * |
| 260 | * try 8 column mode |
| 261 | */ |
| 262 | size8 = dram_size (CFG_MAMR_8COL, (ulong *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE); |
| 263 | |
| 264 | udelay (1000); |
| 265 | |
| 266 | /* |
| 267 | * try 9 column mode |
| 268 | */ |
| 269 | size9 = dram_size (CFG_MAMR_9COL, (ulong *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE); |
| 270 | |
| 271 | if (size8 < size9) { /* leave configuration at 9 columns */ |
| 272 | size_b0 = size9; |
| 273 | memctl->memc_mamr = CFG_MAMR_9COL | MAMR_PTBE; |
| 274 | udelay (500); |
| 275 | } else { /* back to 8 columns */ |
| 276 | size_b0 = size8; |
| 277 | memctl->memc_mamr = CFG_MAMR_8COL | MAMR_PTBE; |
| 278 | udelay (500); |
| 279 | } |
| 280 | |
| 281 | /* |
| 282 | * Final mapping: |
| 283 | */ |
| 284 | |
| 285 | memctl->memc_or3 = ((-size_b0) & 0xFFFF0000) | |
| 286 | OR_CSNT_SAM | OR_G5LS | SDRAM_TIMING; |
| 287 | memctl->memc_br3 = (CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMA | BR_V; |
| 288 | udelay (1000); |
| 289 | |
| 290 | return (size_b0); |
| 291 | } |
| 292 | |
| 293 | /*********************************************************************** |
| 294 | F* Function: static long int dram_size (long int mamr_value, |
| 295 | F* long int *base, |
| 296 | F* long int maxsize) P*A*Z* |
| 297 | * |
| 298 | P* Parameters: long int mamr_value |
| 299 | P* - Value for MAMR for the test |
| 300 | P* long int *base |
| 301 | P* - Base address for the test |
| 302 | P* long int maxsize |
| 303 | P* - Maximum size to test for |
| 304 | P* |
| 305 | P* Returnvalue: long int |
| 306 | P* - Size of probed memory |
| 307 | * |
| 308 | Z* Intention: Check memory range for valid RAM. A simple memory test |
| 309 | Z* determines the actually available RAM size between |
| 310 | Z* addresses `base' and `base + maxsize'. Some (not all) |
| 311 | Z* hardware errors are detected: |
| 312 | Z* - short between address lines |
| 313 | Z* - short between data lines |
| 314 | * |
| 315 | D* Design: wd@denx.de |
| 316 | C* Coding: wd@denx.de |
| 317 | V* Verification: dzu@denx.de |
| 318 | ***********************************************************************/ |
| 319 | static long int dram_size (long int mamr_value, long int *base, long int maxsize) |
| 320 | { |
| 321 | volatile immap_t *immr = (immap_t *) CFG_IMMR; |
| 322 | volatile memctl8xx_t *memctl = &immr->im_memctl; |
| 323 | volatile long int *addr; |
| 324 | ulong cnt, val; |
| 325 | ulong save[32]; /* to make test non-destructive */ |
| 326 | unsigned char i = 0; |
| 327 | |
| 328 | memctl->memc_mamr = mamr_value; |
| 329 | |
| 330 | for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) { |
| 331 | addr = base + cnt; /* pointer arith! */ |
| 332 | |
| 333 | save[i++] = *addr; |
| 334 | *addr = ~cnt; |
| 335 | } |
| 336 | |
| 337 | /* write 0 to base address */ |
| 338 | addr = base; |
| 339 | save[i] = *addr; |
| 340 | *addr = 0; |
| 341 | |
| 342 | /* check at base address */ |
| 343 | if ((val = *addr) != 0) { |
| 344 | *addr = save[i]; |
| 345 | return (0); |
| 346 | } |
| 347 | |
| 348 | for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) { |
| 349 | addr = base + cnt; /* pointer arith! */ |
| 350 | |
| 351 | val = *addr; |
| 352 | *addr = save[--i]; |
| 353 | |
| 354 | if (val != (~cnt)) { |
| 355 | return (cnt * sizeof (long)); |
| 356 | } |
| 357 | } |
| 358 | return (maxsize); |
| 359 | } |
| 360 | |
| 361 | /* ------------------------------------------------------------------------- */ |
| 362 | |
| 363 | #ifndef PB_ENET_TENA |
| 364 | # define PB_ENET_TENA ((uint)0x00002000) /* PB 18 */ |
| 365 | #endif |
| 366 | |
| 367 | /*********************************************************************** |
| 368 | F* Function: int board_pre_init (void) P*A*Z* |
| 369 | * |
| 370 | P* Parameters: none |
| 371 | P* |
| 372 | P* Returnvalue: int |
| 373 | P* - 0 is always returned. |
| 374 | * |
| 375 | Z* Intention: This function is the board_pre_init() method implementation |
| 376 | Z* for the lwmon board. |
| 377 | Z* Disable Ethernet TENA on Port B. |
| 378 | * |
| 379 | D* Design: wd@denx.de |
| 380 | C* Coding: wd@denx.de |
| 381 | V* Verification: dzu@denx.de |
| 382 | ***********************************************************************/ |
| 383 | int board_pre_init (void) |
| 384 | { |
| 385 | volatile immap_t *immr = (immap_t *) CFG_IMMR; |
| 386 | |
| 387 | /* Disable Ethernet TENA on Port B |
| 388 | * Necessary because of pull up in COM3 port. |
| 389 | * |
| 390 | * This is just a preliminary fix, intended to turn off TENA |
| 391 | * as soon as possible to avoid noise on the network. Once |
| 392 | * I²C is running we will make sure the interface is |
| 393 | * correctly initialized. |
| 394 | */ |
| 395 | immr->im_cpm.cp_pbpar &= ~PB_ENET_TENA; |
| 396 | immr->im_cpm.cp_pbodr &= ~PB_ENET_TENA; |
| 397 | immr->im_cpm.cp_pbdat &= ~PB_ENET_TENA; /* set to 0 = disabled */ |
| 398 | immr->im_cpm.cp_pbdir |= PB_ENET_TENA; |
| 399 | return (0); |
| 400 | } |
| 401 | |
| 402 | /* ------------------------------------------------------------------------- */ |
| 403 | |
| 404 | /*********************************************************************** |
| 405 | F* Function: void reset_phy (void) P*A*Z* |
| 406 | * |
| 407 | P* Parameters: none |
| 408 | P* |
| 409 | P* Returnvalue: none |
| 410 | * |
| 411 | Z* Intention: Reset the PHY. In the lwmon case we do this by the |
| 412 | Z* signaling the PIC I/O expander. |
| 413 | * |
| 414 | D* Design: wd@denx.de |
| 415 | C* Coding: wd@denx.de |
| 416 | V* Verification: dzu@denx.de |
| 417 | ***********************************************************************/ |
| 418 | void reset_phy (void) |
| 419 | { |
| 420 | uchar c; |
| 421 | |
| 422 | #ifdef DEBUG |
| 423 | printf ("### Switch on Ethernet for SCC2 ###\n"); |
| 424 | #endif |
| 425 | c = pic_read (0x61); |
| 426 | #ifdef DEBUG |
| 427 | printf ("Old PIC read: reg_61 = 0x%02x\n", c); |
| 428 | #endif |
| 429 | c |= 0x40; /* disable COM3 */ |
| 430 | c &= ~0x80; /* enable Ethernet */ |
| 431 | pic_write (0x61, c); |
| 432 | #ifdef DEBUG |
| 433 | c = pic_read (0x61); |
| 434 | printf ("New PIC read: reg_61 = 0x%02x\n", c); |
| 435 | #endif |
| 436 | udelay (1000); |
| 437 | } |
| 438 | |
| 439 | |
| 440 | /*------------------------- Keyboard controller -----------------------*/ |
| 441 | /* command codes */ |
| 442 | #define KEYBD_CMD_READ_KEYS 0x01 |
| 443 | #define KEYBD_CMD_READ_VERSION 0x02 |
| 444 | #define KEYBD_CMD_READ_STATUS 0x03 |
| 445 | #define KEYBD_CMD_RESET_ERRORS 0x10 |
| 446 | |
| 447 | /* status codes */ |
| 448 | #define KEYBD_STATUS_MASK 0x3F |
| 449 | #define KEYBD_STATUS_H_RESET 0x20 |
| 450 | #define KEYBD_STATUS_BROWNOUT 0x10 |
| 451 | #define KEYBD_STATUS_WD_RESET 0x08 |
| 452 | #define KEYBD_STATUS_OVERLOAD 0x04 |
| 453 | #define KEYBD_STATUS_ILLEGAL_WR 0x02 |
| 454 | #define KEYBD_STATUS_ILLEGAL_RD 0x01 |
| 455 | |
| 456 | /* Number of bytes returned from Keyboard Controller */ |
| 457 | #define KEYBD_VERSIONLEN 2 /* version information */ |
| 458 | #define KEYBD_DATALEN 9 /* normal key scan data */ |
| 459 | |
| 460 | /* maximum number of "magic" key codes that can be assigned */ |
| 461 | |
| 462 | static uchar kbd_addr = CFG_I2C_KEYBD_ADDR; |
| 463 | |
| 464 | static uchar *key_match (uchar *); |
| 465 | |
| 466 | #define KEYBD_SET_DEBUGMODE '#' /* Magic key to enable debug output */ |
| 467 | |
| 468 | /*********************************************************************** |
| 469 | F* Function: int misc_init_r (void) P*A*Z* |
| 470 | * |
| 471 | P* Parameters: none |
| 472 | P* |
| 473 | P* Returnvalue: int |
| 474 | P* - 0 is always returned, even in the case of a keyboard |
| 475 | P* error. |
| 476 | * |
| 477 | Z* Intention: This function is the misc_init_r() method implementation |
| 478 | Z* for the lwmon board. |
| 479 | Z* The keyboard controller is initialized and the result |
| 480 | Z* of a read copied to the environment variable "keybd". |
| 481 | Z* If KEYBD_SET_DEBUGMODE is defined, a check is made for |
| 482 | Z* this key, and if found display to the LCD will be enabled. |
| 483 | Z* The keys in "keybd" are checked against the magic |
| 484 | Z* keycommands defined in the environment. |
| 485 | Z* See also key_match(). |
| 486 | * |
| 487 | D* Design: wd@denx.de |
| 488 | C* Coding: wd@denx.de |
| 489 | V* Verification: dzu@denx.de |
| 490 | ***********************************************************************/ |
| 491 | int misc_init_r (void) |
| 492 | { |
| 493 | uchar kbd_data[KEYBD_DATALEN]; |
| 494 | uchar tmp_data[KEYBD_DATALEN]; |
| 495 | uchar keybd_env[2 * KEYBD_DATALEN + 1]; |
| 496 | uchar val, errcd; |
| 497 | uchar *str; |
| 498 | int i; |
| 499 | |
| 500 | i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); |
| 501 | |
| 502 | /* Read initial keyboard error code */ |
| 503 | val = KEYBD_CMD_READ_STATUS; |
| 504 | i2c_write (kbd_addr, 0, 0, &val, 1); |
| 505 | i2c_read (kbd_addr, 0, 0, &errcd, 1); |
| 506 | /* clear unused bits */ |
| 507 | errcd &= KEYBD_STATUS_MASK; |
| 508 | /* clear "irrelevant" bits. Recommended by Martin Rajek, LWN */ |
| 509 | errcd &= ~(KEYBD_STATUS_H_RESET|KEYBD_STATUS_BROWNOUT); |
| 510 | if (errcd) { |
| 511 | printf ("KEYBD: Error %02X\n", errcd); |
| 512 | } |
| 513 | /* Reset error code and verify */ |
| 514 | val = KEYBD_CMD_RESET_ERRORS; |
| 515 | i2c_write (kbd_addr, 0, 0, &val, 1); |
| 516 | udelay(1000); /* delay NEEDED by keyboard PIC !!! */ |
| 517 | |
| 518 | val = KEYBD_CMD_READ_STATUS; |
| 519 | i2c_write (kbd_addr, 0, 0, &val, 1); |
| 520 | i2c_read (kbd_addr, 0, 0, &val, 1); |
| 521 | |
| 522 | val &= KEYBD_STATUS_MASK; /* clear unused bits */ |
| 523 | if (val) { /* permanent error, report it */ |
| 524 | printf ("*** Keyboard error code %02X ***\n", val); |
| 525 | sprintf (keybd_env, "%02X", val); |
| 526 | setenv ("keybd", keybd_env); |
| 527 | return 0; |
| 528 | } |
| 529 | |
| 530 | /* |
| 531 | * Now we know that we have a working keyboard, so disable |
| 532 | * all output to the LCD except when a key press is detected. |
| 533 | */ |
| 534 | |
| 535 | if ((console_assign (stdout, "serial") < 0) || |
| 536 | (console_assign (stderr, "serial") < 0)) { |
| 537 | printf ("Can't assign serial port as output device\n"); |
| 538 | } |
| 539 | |
| 540 | /* Read Version */ |
| 541 | val = KEYBD_CMD_READ_VERSION; |
| 542 | i2c_write (kbd_addr, 0, 0, &val, 1); |
| 543 | i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_VERSIONLEN); |
| 544 | printf ("KEYBD: Version %d.%d\n", kbd_data[0], kbd_data[1]); |
| 545 | |
| 546 | /* |
| 547 | * Read current keyboard state. |
| 548 | * |
| 549 | * After the error reset it may take some time before the |
| 550 | * keyboard PIC picks up a valid keyboard scan - the total |
| 551 | * scan time is approx. 1.6 ms (information by Martin Rajek, |
| 552 | * 28 Sep 2002). We read a couple of times for the keyboard |
| 553 | * to stabilize, using a big enough delay. |
| 554 | * 10 times should be enough. If the data is still changing, |
| 555 | * we use what we get :-( |
| 556 | */ |
| 557 | |
| 558 | memset (tmp_data, 0xFF, KEYBD_DATALEN); /* impossible value */ |
| 559 | for (i=0; i<10; ++i) { |
| 560 | val = KEYBD_CMD_READ_KEYS; |
| 561 | i2c_write (kbd_addr, 0, 0, &val, 1); |
| 562 | i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN); |
| 563 | |
| 564 | if (memcmp(kbd_data, tmp_data, KEYBD_DATALEN) == 0) { |
| 565 | /* consistent state, done */ |
| 566 | break; |
| 567 | } |
| 568 | /* remeber last state, delay, and retry */ |
| 569 | memcpy (tmp_data, kbd_data, KEYBD_DATALEN); |
| 570 | udelay (5000); |
| 571 | } |
| 572 | |
| 573 | for (i = 0; i < KEYBD_DATALEN; ++i) { |
| 574 | sprintf (keybd_env + i + i, "%02X", kbd_data[i]); |
| 575 | } |
| 576 | setenv ("keybd", keybd_env); |
| 577 | |
| 578 | str = strdup (key_match (kbd_data)); /* decode keys */ |
| 579 | #ifdef KEYBD_SET_DEBUGMODE |
| 580 | if (kbd_data[0] == KEYBD_SET_DEBUGMODE) { /* set debug mode */ |
| 581 | if ((console_assign (stdout, "lcd") < 0) || |
| 582 | (console_assign (stderr, "lcd") < 0)) { |
| 583 | printf ("Can't assign LCD display as output device\n"); |
| 584 | } |
| 585 | } |
| 586 | #endif /* KEYBD_SET_DEBUGMODE */ |
| 587 | #ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */ |
| 588 | setenv ("preboot", str); /* set or delete definition */ |
| 589 | #endif /* CONFIG_PREBOOT */ |
| 590 | if (str != NULL) { |
| 591 | free (str); |
| 592 | } |
| 593 | return (0); |
| 594 | } |
| 595 | |
| 596 | #ifdef CONFIG_PREBOOT |
| 597 | |
| 598 | static uchar kbd_magic_prefix[] = "key_magic"; |
| 599 | static uchar kbd_command_prefix[] = "key_cmd"; |
| 600 | |
| 601 | /*********************************************************************** |
| 602 | F* Function: static uchar *key_match (uchar *kbd_data) P*A*Z* |
| 603 | * |
| 604 | P* Parameters: uchar *kbd_data |
| 605 | P* - The keys to match against our magic definitions |
| 606 | P* |
| 607 | P* Returnvalue: uchar * |
| 608 | P* - != NULL: Pointer to the corresponding command(s) |
| 609 | P* NULL: No magic is about to happen |
| 610 | * |
| 611 | Z* Intention: Check if pressed key(s) match magic sequence, |
| 612 | Z* and return the command string associated with that key(s). |
| 613 | Z* |
| 614 | Z* If no key press was decoded, NULL is returned. |
| 615 | Z* |
| 616 | Z* Note: the first character of the argument will be |
| 617 | Z* overwritten with the "magic charcter code" of the |
| 618 | Z* decoded key(s), or '\0'. |
| 619 | Z* |
| 620 | Z* Note: the string points to static environment data |
| 621 | Z* and must be saved before you call any function that |
| 622 | Z* modifies the environment. |
| 623 | * |
| 624 | D* Design: wd@denx.de |
| 625 | C* Coding: wd@denx.de |
| 626 | V* Verification: dzu@denx.de |
| 627 | ***********************************************************************/ |
| 628 | static uchar *key_match (uchar *kbd_data) |
| 629 | { |
| 630 | uchar compare[KEYBD_DATALEN-1]; |
| 631 | uchar magic[sizeof (kbd_magic_prefix) + 1]; |
| 632 | uchar extra; |
| 633 | uchar *str, *nxt, *suffix; |
| 634 | uchar *kbd_magic_keys; |
| 635 | int i; |
| 636 | |
| 637 | /* |
| 638 | * The following string defines the characters that can pe appended |
| 639 | * to "key_magic" to form the names of environment variables that |
| 640 | * hold "magic" key codes, i. e. such key codes that can cause |
| 641 | * pre-boot actions. If the string is empty (""), then only |
| 642 | * "key_magic" is checked (old behaviour); the string "125" causes |
| 643 | * checks for "key_magic1", "key_magic2" and "key_magic5", etc. |
| 644 | */ |
| 645 | if ((kbd_magic_keys = getenv ("magic_keys")) == NULL) |
| 646 | kbd_magic_keys = ""; |
| 647 | |
| 648 | /* loop over all magic keys; |
| 649 | * use '\0' suffix in case of empty string |
| 650 | */ |
| 651 | for (suffix=kbd_magic_keys; *suffix || suffix==kbd_magic_keys; ++suffix) { |
| 652 | sprintf (magic, "%s%c", kbd_magic_prefix, *suffix); |
| 653 | #if 0 |
| 654 | printf ("### Check magic \"%s\"\n", magic); |
| 655 | #endif |
| 656 | /* Don't include modifier byte */ |
| 657 | memcpy (compare, kbd_data+1, KEYBD_DATALEN-1); |
| 658 | |
| 659 | extra = 0; |
| 660 | |
| 661 | for (str= getenv(magic); str != NULL; str = (*nxt) ? nxt+1 : nxt) { |
| 662 | uchar c; |
| 663 | int k; |
| 664 | |
| 665 | c = (uchar) simple_strtoul (str, (char **) (&nxt), 16); |
| 666 | |
| 667 | if (str == nxt) { /* invalid character */ |
| 668 | break; |
| 669 | } |
| 670 | |
| 671 | /* |
| 672 | * Check if this key matches the input. |
| 673 | * Set matches to zero, so they match only once |
| 674 | * and we can find duplicates or extra keys |
| 675 | */ |
| 676 | for (k = 0; k < sizeof(compare); ++k) { |
| 677 | if (compare[k] == '\0') /* only non-zero entries */ |
| 678 | continue; |
| 679 | if (c == compare[k]) { /* found matching key */ |
| 680 | compare[k] = '\0'; |
| 681 | break; |
| 682 | } |
| 683 | } |
| 684 | if (k == sizeof(compare)) { |
| 685 | extra = 1; /* unmatched key */ |
| 686 | } |
| 687 | } |
| 688 | |
| 689 | /* |
| 690 | * A full match leaves no keys in the `compare' array, |
| 691 | * and has no extra keys |
| 692 | */ |
| 693 | |
| 694 | for (i = 0; i < sizeof(compare); ++i) { |
| 695 | if (compare[i]) |
| 696 | break; |
| 697 | } |
| 698 | |
| 699 | if ((i == sizeof(compare)) && (extra == 0)) { |
| 700 | uchar cmd_name[sizeof (kbd_command_prefix) + 1]; |
| 701 | char *cmd; |
| 702 | |
| 703 | sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix); |
| 704 | |
| 705 | cmd = getenv (cmd_name); |
| 706 | #if 0 |
| 707 | printf ("### Set PREBOOT to $(%s): \"%s\"\n", |
| 708 | cmd_name, cmd ? cmd : "<<NULL>>"); |
| 709 | #endif |
| 710 | *kbd_data = *suffix; |
| 711 | return (cmd); |
| 712 | } |
| 713 | } |
| 714 | #if 0 |
| 715 | printf ("### Delete PREBOOT\n"); |
| 716 | #endif |
| 717 | *kbd_data = '\0'; |
| 718 | return (NULL); |
| 719 | } |
| 720 | #endif /* CONFIG_PREBOOT */ |
| 721 | |
| 722 | /*---------------Board Special Commands: PIC read/write ---------------*/ |
| 723 | |
| 724 | #if (CONFIG_COMMANDS & CFG_CMD_BSP) |
| 725 | /*********************************************************************** |
| 726 | F* Function: int do_pic (cmd_tbl_t *cmdtp, int flag, |
| 727 | F* int argc, char *argv[]) P*A*Z* |
| 728 | * |
| 729 | P* Parameters: cmd_tbl_t *cmdtp |
| 730 | P* - Pointer to our command table entry |
| 731 | P* int flag |
| 732 | P* - If the CMD_FLAG_REPEAT bit is set, then this call is |
| 733 | P* a repetition |
| 734 | P* int argc |
| 735 | P* - Argument count |
| 736 | P* char *argv[] |
| 737 | P* - Array of the actual arguments |
| 738 | P* |
| 739 | P* Returnvalue: int |
| 740 | P* - 0 The command was handled successfully |
| 741 | P* 1 An error occurred |
| 742 | * |
| 743 | Z* Intention: Implement the "pic [read|write]" commands. |
| 744 | Z* The read subcommand takes one argument, the register, |
| 745 | Z* whereas the write command takes two, the register and |
| 746 | Z* the new value. |
| 747 | * |
| 748 | D* Design: wd@denx.de |
| 749 | C* Coding: wd@denx.de |
| 750 | V* Verification: dzu@denx.de |
| 751 | ***********************************************************************/ |
| 752 | int do_pic (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 753 | { |
| 754 | uchar reg, val; |
| 755 | |
| 756 | switch (argc) { |
| 757 | case 3: /* PIC read reg */ |
| 758 | if (strcmp (argv[1], "read") != 0) |
| 759 | break; |
| 760 | |
| 761 | reg = simple_strtoul (argv[2], NULL, 16); |
| 762 | |
| 763 | printf ("PIC read: reg %02x: %02x\n\n", reg, pic_read (reg)); |
| 764 | |
| 765 | return 0; |
| 766 | case 4: /* PIC write reg val */ |
| 767 | if (strcmp (argv[1], "write") != 0) |
| 768 | break; |
| 769 | |
| 770 | reg = simple_strtoul (argv[2], NULL, 16); |
| 771 | val = simple_strtoul (argv[3], NULL, 16); |
| 772 | |
| 773 | printf ("PIC write: reg %02x val 0x%02x: %02x => ", |
| 774 | reg, val, pic_read (reg)); |
| 775 | pic_write (reg, val); |
| 776 | printf ("%02x\n\n", pic_read (reg)); |
| 777 | return 0; |
| 778 | default: |
| 779 | break; |
| 780 | } |
| 781 | printf ("Usage:\n%s\n", cmdtp->usage); |
| 782 | return 1; |
| 783 | } |
| 784 | |
| 785 | /*********************************************************************** |
| 786 | F* Function: int do_kbd (cmd_tbl_t *cmdtp, int flag, |
| 787 | F* int argc, char *argv[]) P*A*Z* |
| 788 | * |
| 789 | P* Parameters: cmd_tbl_t *cmdtp |
| 790 | P* - Pointer to our command table entry |
| 791 | P* int flag |
| 792 | P* - If the CMD_FLAG_REPEAT bit is set, then this call is |
| 793 | P* a repetition |
| 794 | P* int argc |
| 795 | P* - Argument count |
| 796 | P* char *argv[] |
| 797 | P* - Array of the actual arguments |
| 798 | P* |
| 799 | P* Returnvalue: int |
| 800 | P* - 0 is always returned. |
| 801 | * |
| 802 | Z* Intention: Implement the "kbd" command. |
| 803 | Z* The keyboard status is read. The result is printed on |
| 804 | Z* the console and written into the "keybd" environment |
| 805 | Z* variable. |
| 806 | * |
| 807 | D* Design: wd@denx.de |
| 808 | C* Coding: wd@denx.de |
| 809 | V* Verification: dzu@denx.de |
| 810 | ***********************************************************************/ |
| 811 | int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 812 | { |
| 813 | uchar kbd_data[KEYBD_DATALEN]; |
| 814 | uchar keybd_env[2 * KEYBD_DATALEN + 1]; |
| 815 | uchar val; |
| 816 | int i; |
| 817 | |
| 818 | i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); |
| 819 | |
| 820 | /* Read keys */ |
| 821 | val = KEYBD_CMD_READ_KEYS; |
| 822 | i2c_write (kbd_addr, 0, 0, &val, 1); |
| 823 | i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN); |
| 824 | |
| 825 | puts ("Keys:"); |
| 826 | for (i = 0; i < KEYBD_DATALEN; ++i) { |
| 827 | sprintf (keybd_env + i + i, "%02X", kbd_data[i]); |
| 828 | printf (" %02x", kbd_data[i]); |
| 829 | } |
| 830 | putc ('\n'); |
| 831 | setenv ("keybd", keybd_env); |
| 832 | return 0; |
| 833 | } |
| 834 | |
| 835 | /* Read and set LSB switch */ |
wdenk | e7f34c6 | 2003-01-11 09:48:40 +0000 | [diff] [blame] | 836 | #define CFG_PC_TXD1_ENA 0x0008 /* PC.12 */ |
wdenk | e221174 | 2002-11-02 23:30:20 +0000 | [diff] [blame] | 837 | |
| 838 | /*********************************************************************** |
| 839 | F* Function: int do_lsb (cmd_tbl_t *cmdtp, int flag, |
| 840 | F* int argc, char *argv[]) P*A*Z* |
| 841 | * |
| 842 | P* Parameters: cmd_tbl_t *cmdtp |
| 843 | P* - Pointer to our command table entry |
| 844 | P* int flag |
| 845 | P* - If the CMD_FLAG_REPEAT bit is set, then this call is |
| 846 | P* a repetition |
| 847 | P* int argc |
| 848 | P* - Argument count |
| 849 | P* char *argv[] |
| 850 | P* - Array of the actual arguments |
| 851 | P* |
| 852 | P* Returnvalue: int |
| 853 | P* - 0 The command was handled successfully |
| 854 | P* 1 An error occurred |
| 855 | * |
| 856 | Z* Intention: Implement the "lsb [on|off]" commands. |
| 857 | Z* The lsb is switched according to the first parameter by |
| 858 | Z* by signaling the PIC I/O expander. |
| 859 | Z* Called with no arguments, the current setting is |
| 860 | Z* printed. |
| 861 | * |
| 862 | D* Design: wd@denx.de |
| 863 | C* Coding: wd@denx.de |
| 864 | V* Verification: dzu@denx.de |
| 865 | ***********************************************************************/ |
| 866 | int do_lsb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
| 867 | { |
| 868 | uchar val; |
| 869 | immap_t *immr = (immap_t *) CFG_IMMR; |
| 870 | |
| 871 | switch (argc) { |
| 872 | case 1: /* lsb - print setting */ |
| 873 | val = pic_read (0x60); |
| 874 | printf ("LSB is o%s\n", (val & 0x20) ? "n" : "ff"); |
| 875 | return 0; |
| 876 | case 2: /* lsb on or lsb off - set switch */ |
| 877 | val = pic_read (0x60); |
| 878 | |
| 879 | if (strcmp (argv[1], "on") == 0) { |
| 880 | val |= 0x20; |
| 881 | immr->im_ioport.iop_pcpar &= ~(CFG_PC_TXD1_ENA); |
| 882 | immr->im_ioport.iop_pcdat |= CFG_PC_TXD1_ENA; |
| 883 | immr->im_ioport.iop_pcdir |= CFG_PC_TXD1_ENA; |
| 884 | } else if (strcmp (argv[1], "off") == 0) { |
| 885 | val &= ~0x20; |
| 886 | immr->im_ioport.iop_pcpar &= ~(CFG_PC_TXD1_ENA); |
| 887 | immr->im_ioport.iop_pcdat &= ~(CFG_PC_TXD1_ENA); |
| 888 | immr->im_ioport.iop_pcdir |= CFG_PC_TXD1_ENA; |
| 889 | } else { |
| 890 | break; |
| 891 | } |
| 892 | pic_write (0x60, val); |
| 893 | return 0; |
| 894 | default: |
| 895 | break; |
| 896 | } |
| 897 | printf ("Usage:\n%s\n", cmdtp->usage); |
| 898 | return 1; |
| 899 | } |
| 900 | |
| 901 | #endif /* CFG_CMD_BSP */ |
| 902 | |
| 903 | /*----------------------------- Utilities -----------------------------*/ |
| 904 | /*********************************************************************** |
| 905 | F* Function: uchar pic_read (uchar reg) P*A*Z* |
| 906 | * |
| 907 | P* Parameters: uchar reg |
| 908 | P* - Register to read |
| 909 | P* |
| 910 | P* Returnvalue: uchar |
| 911 | P* - Value read from register |
| 912 | * |
| 913 | Z* Intention: Read a register from the PIC I/O expander. |
| 914 | * |
| 915 | D* Design: wd@denx.de |
| 916 | C* Coding: wd@denx.de |
| 917 | V* Verification: dzu@denx.de |
| 918 | ***********************************************************************/ |
| 919 | uchar pic_read (uchar reg) |
| 920 | { |
| 921 | return (i2c_reg_read (CFG_I2C_PICIO_ADDR, reg)); |
| 922 | } |
| 923 | |
| 924 | /*********************************************************************** |
| 925 | F* Function: void pic_write (uchar reg, uchar val) P*A*Z* |
| 926 | * |
| 927 | P* Parameters: uchar reg |
| 928 | P* - Register to read |
| 929 | P* uchar val |
| 930 | P* - Value to write |
| 931 | P* |
| 932 | P* Returnvalue: none |
| 933 | * |
| 934 | Z* Intention: Write to a register on the PIC I/O expander. |
| 935 | * |
| 936 | D* Design: wd@denx.de |
| 937 | C* Coding: wd@denx.de |
| 938 | V* Verification: dzu@denx.de |
| 939 | ***********************************************************************/ |
| 940 | void pic_write (uchar reg, uchar val) |
| 941 | { |
| 942 | i2c_reg_write (CFG_I2C_PICIO_ADDR, reg, val); |
| 943 | } |
| 944 | |
| 945 | /*---------------------- Board Control Functions ----------------------*/ |
| 946 | /*********************************************************************** |
| 947 | F* Function: void board_poweroff (void) P*A*Z* |
| 948 | * |
| 949 | P* Parameters: none |
| 950 | P* |
| 951 | P* Returnvalue: none |
| 952 | * |
| 953 | Z* Intention: Turn off the battery power and loop endless, so this |
| 954 | Z* should better be the last function you call... |
| 955 | * |
| 956 | D* Design: wd@denx.de |
| 957 | C* Coding: wd@denx.de |
| 958 | V* Verification: dzu@denx.de |
| 959 | ***********************************************************************/ |
| 960 | void board_poweroff (void) |
| 961 | { |
| 962 | /* Turn battery off */ |
| 963 | ((volatile immap_t *)CFG_IMMR)->im_ioport.iop_pcdat &= ~(1 << (31 - 13)); |
| 964 | |
| 965 | while (1); |
| 966 | } |