Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2019 Toradex |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | afb0215 | 2019-12-28 10:45:01 -0700 | [diff] [blame] | 7 | #include <cpu_func.h> |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 8 | #include <init.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 9 | #include <asm/global_data.h> |
Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 10 | |
| 11 | #include <asm/arch/clock.h> |
| 12 | #include <asm/arch/imx8-pins.h> |
| 13 | #include <asm/arch/iomux.h> |
Peng Fan | 2e0644a | 2023-04-28 12:08:09 +0800 | [diff] [blame] | 14 | #include <firmware/imx/sci/sci.h> |
Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 15 | #include <asm/arch/sys_proto.h> |
| 16 | #include <asm/gpio.h> |
| 17 | #include <asm/io.h> |
Simon Glass | 5e6201b | 2019-08-01 09:46:51 -0600 | [diff] [blame] | 18 | #include <env.h> |
Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 19 | #include <errno.h> |
| 20 | #include <linux/libfdt.h> |
| 21 | |
| 22 | #include "../common/tdx-cfg-block.h" |
| 23 | |
| 24 | DECLARE_GLOBAL_DATA_PTR; |
| 25 | |
| 26 | #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | \ |
| 27 | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) | \ |
| 28 | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | \ |
| 29 | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) |
| 30 | |
| 31 | static iomux_cfg_t uart3_pads[] = { |
| 32 | SC_P_FLEXCAN2_RX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 33 | SC_P_FLEXCAN2_TX | MUX_MODE_ALT(2) | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 34 | /* Transceiver FORCEOFF# signal, mux to use pull-up */ |
| 35 | SC_P_QSPI0B_DQS | MUX_MODE_ALT(4) | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 36 | }; |
| 37 | |
| 38 | static void setup_iomux_uart(void) |
| 39 | { |
| 40 | imx8_iomux_setup_multiple_pads(uart3_pads, ARRAY_SIZE(uart3_pads)); |
| 41 | } |
| 42 | |
Max Krummenacher | 88c7071 | 2023-03-03 14:26:32 +0100 | [diff] [blame] | 43 | static int is_imx8dx(void) |
Igor Opaniuk | dcc63c1 | 2020-10-22 11:21:43 +0300 | [diff] [blame] | 44 | { |
Max Krummenacher | 88c7071 | 2023-03-03 14:26:32 +0100 | [diff] [blame] | 45 | u32 val = 0; |
| 46 | sc_err_t sc_err = sc_misc_otp_fuse_read(-1, 6, &val); |
Igor Opaniuk | dcc63c1 | 2020-10-22 11:21:43 +0300 | [diff] [blame] | 47 | |
Max Krummenacher | 88c7071 | 2023-03-03 14:26:32 +0100 | [diff] [blame] | 48 | if (sc_err == SC_ERR_NONE) { |
Igor Opaniuk | dcc63c1 | 2020-10-22 11:21:43 +0300 | [diff] [blame] | 49 | /* DX has two A35 cores disabled */ |
Max Krummenacher | 88c7071 | 2023-03-03 14:26:32 +0100 | [diff] [blame] | 50 | return (val & 0xf) != 0x0; |
Igor Opaniuk | dcc63c1 | 2020-10-22 11:21:43 +0300 | [diff] [blame] | 51 | } |
Max Krummenacher | 88c7071 | 2023-03-03 14:26:32 +0100 | [diff] [blame] | 52 | return false; |
| 53 | } |
Igor Opaniuk | dcc63c1 | 2020-10-22 11:21:43 +0300 | [diff] [blame] | 54 | |
Max Krummenacher | 88c7071 | 2023-03-03 14:26:32 +0100 | [diff] [blame] | 55 | void board_mem_get_layout(u64 *phys_sdram_1_start, |
| 56 | u64 *phys_sdram_1_size, |
| 57 | u64 *phys_sdram_2_start, |
| 58 | u64 *phys_sdram_2_size) |
| 59 | { |
Igor Opaniuk | dcc63c1 | 2020-10-22 11:21:43 +0300 | [diff] [blame] | 60 | *phys_sdram_1_start = PHYS_SDRAM_1; |
Max Krummenacher | 88c7071 | 2023-03-03 14:26:32 +0100 | [diff] [blame] | 61 | if (is_imx8dx()) |
Igor Opaniuk | dcc63c1 | 2020-10-22 11:21:43 +0300 | [diff] [blame] | 62 | /* Our DX based SKUs only have 1 GB RAM */ |
| 63 | *phys_sdram_1_size = SZ_1G; |
| 64 | else |
| 65 | *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; |
| 66 | *phys_sdram_2_start = PHYS_SDRAM_2; |
| 67 | *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; |
| 68 | } |
| 69 | |
Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 70 | int board_early_init_f(void) |
| 71 | { |
| 72 | sc_pm_clock_rate_t rate; |
| 73 | sc_err_t err = 0; |
| 74 | |
| 75 | /* |
| 76 | * This works around that having only UART3 up the baudrate is 1.2M |
| 77 | * instead of 115.2k. Set UART0 clock root to 80 MHz |
| 78 | */ |
| 79 | rate = 80000000; |
| 80 | err = sc_pm_set_clock_rate(-1, SC_R_UART_0, SC_PM_CLK_PER, &rate); |
| 81 | if (err != SC_ERR_NONE) |
| 82 | return 0; |
| 83 | |
Anatolij Gustschin | ef156d2 | 2019-06-12 13:35:25 +0200 | [diff] [blame] | 84 | /* Set UART3 clock root to 80 MHz and enable it */ |
| 85 | rate = SC_80MHZ; |
| 86 | err = sc_pm_setup_uart(SC_R_UART_3, rate); |
Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 87 | if (err != SC_ERR_NONE) |
| 88 | return 0; |
| 89 | |
| 90 | setup_iomux_uart(); |
| 91 | |
| 92 | return 0; |
| 93 | } |
| 94 | |
| 95 | #if IS_ENABLED(CONFIG_DM_GPIO) |
| 96 | static void board_gpio_init(void) |
| 97 | { |
| 98 | /* TODO */ |
| 99 | } |
| 100 | #else |
| 101 | static inline void board_gpio_init(void) {} |
| 102 | #endif |
| 103 | |
| 104 | #if IS_ENABLED(CONFIG_FEC_MXC) |
| 105 | #include <miiphy.h> |
| 106 | |
| 107 | int board_phy_config(struct phy_device *phydev) |
| 108 | { |
| 109 | if (phydev->drv->config) |
| 110 | phydev->drv->config(phydev); |
| 111 | |
| 112 | return 0; |
| 113 | } |
| 114 | #endif |
| 115 | |
Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 116 | int checkboard(void) |
| 117 | { |
| 118 | puts("Model: Toradex Colibri iMX8X\n"); |
| 119 | |
| 120 | build_info(); |
| 121 | print_bootinfo(); |
| 122 | |
| 123 | return 0; |
| 124 | } |
| 125 | |
Andrejs Cainikovs | a4d8154 | 2023-03-03 14:26:33 +0100 | [diff] [blame] | 126 | static void select_dt_from_module_version(void) |
| 127 | { |
| 128 | /* |
| 129 | * The dtb filename is constructed from ${soc}-colibri-${fdt_board}.dtb. |
| 130 | * Set soc depending on the used SoC. |
| 131 | */ |
| 132 | if (is_imx8dx()) |
| 133 | env_set("soc", "imx8dx"); |
| 134 | else |
| 135 | env_set("soc", "imx8qxp"); |
| 136 | } |
| 137 | |
Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 138 | int board_init(void) |
| 139 | { |
| 140 | board_gpio_init(); |
| 141 | |
| 142 | return 0; |
| 143 | } |
| 144 | |
Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 145 | /* |
| 146 | * Board specific reset that is system reset. |
| 147 | */ |
Harald Seiler | 6f14d5f | 2020-12-15 16:47:52 +0100 | [diff] [blame] | 148 | void reset_cpu(void) |
Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 149 | { |
| 150 | /* TODO */ |
| 151 | } |
| 152 | |
| 153 | #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 154 | int ft_board_setup(void *blob, struct bd_info *bd) |
Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 155 | { |
| 156 | return ft_common_board_setup(blob, bd); |
| 157 | } |
| 158 | #endif |
| 159 | |
| 160 | int board_mmc_get_env_dev(int devno) |
| 161 | { |
| 162 | return devno; |
| 163 | } |
| 164 | |
| 165 | int board_late_init(void) |
| 166 | { |
| 167 | #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
| 168 | /* TODO move to common */ |
| 169 | env_set("board_name", "Colibri iMX8QXP"); |
| 170 | env_set("board_rev", "v1.0"); |
| 171 | #endif |
| 172 | |
Andrejs Cainikovs | aa390ed | 2023-04-03 13:14:25 +0200 | [diff] [blame] | 173 | build_info(); |
| 174 | |
Andrejs Cainikovs | a4d8154 | 2023-03-03 14:26:33 +0100 | [diff] [blame] | 175 | select_dt_from_module_version(); |
| 176 | |
Marcel Ziswiler | 99d768b | 2019-05-31 18:56:39 +0300 | [diff] [blame] | 177 | return 0; |
| 178 | } |