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git01.mediatek.com / filogic / uboot / bf961adb641f94624afa933a026a98727d9ac8c0 / . / configs / pinebook-pro-rk3399_defconfig
blob: 8ca1d0708f9a8100b636ca17c1a51ea40a77a361 [file] [log] [blame]
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
5CONFIG_SYS_TEXT_BASE=0x00200000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
Peter Robinsoncee3edd2020-06-08 23:50:30 +0100[diff] [blame]7CONFIG_ENV_SIZE=0x8000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]8CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro"
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]9CONFIG_ROCKCHIP_RK3399=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]10CONFIG_TARGET_PINEBOOK_PRO_RK3399=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]11CONFIG_DEBUG_UART_BASE=0xFF1A0000
12CONFIG_DEBUG_UART_CLOCK=24000000
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]13CONFIG_SPL_SPI_FLASH_SUPPORT=y
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]14CONFIG_SPL_SPI=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]15CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]16CONFIG_DEBUG_UART=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]17CONFIG_BOOTDELAY=3
Peter Robinsoncee3edd2020-06-08 23:50:30 +0100[diff] [blame]18CONFIG_USE_PREBOOT=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]19CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb"
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]20CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]21CONFIG_MISC_INIT_R=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]22# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
23CONFIG_SPL_STACK_R=y
24CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]25CONFIG_SPL_MTD_SUPPORT=y
Peter Robinsoncee3edd2020-06-08 23:50:30 +0100[diff] [blame]26CONFIG_SPL_SPI_LOAD=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]27CONFIG_TPL=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]28CONFIG_CMD_BOOTZ=y
29CONFIG_CMD_GPIO=y
30CONFIG_CMD_GPT=y
31CONFIG_CMD_I2C=y
32CONFIG_CMD_MMC=y
Patrick Wildt44d52132020-06-07 12:08:35 +0200[diff] [blame]33CONFIG_CMD_PCI=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]34CONFIG_CMD_USB=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]35# CONFIG_CMD_SETEXPR is not set
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]36CONFIG_CMD_TIME=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]37CONFIG_CMD_PMIC=y
38CONFIG_CMD_REGULATOR=y
39CONFIG_SPL_OF_CONTROL=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]40CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Peter Robinsoncee3edd2020-06-08 23:50:30 +0100[diff] [blame]41CONFIG_ENV_IS_IN_SPI_FLASH=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]42CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Hugh Cole-Baker008e43c2020-11-22 13:03:44 +0000[diff] [blame]43CONFIG_SPL_DM_SEQ_ALIAS=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]44CONFIG_ROCKCHIP_GPIO=y
45CONFIG_SYS_I2C_ROCKCHIP=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]46CONFIG_LED=y
47CONFIG_LED_GPIO=y
48CONFIG_MISC=y
49CONFIG_ROCKCHIP_EFUSE=y
50CONFIG_MMC_DW=y
51CONFIG_MMC_DW_ROCKCHIP=y
52CONFIG_MMC_SDHCI=y
53CONFIG_MMC_SDHCI_SDMA=y
54CONFIG_MMC_SDHCI_ROCKCHIP=y
Hugh Cole-Baker008e43c2020-11-22 13:03:44 +0000[diff] [blame]55CONFIG_SF_DEFAULT_BUS=1
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]56CONFIG_SF_DEFAULT_SPEED=20000000
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]57CONFIG_SPI_FLASH_GIGADEVICE=y
58CONFIG_SPI_FLASH_WINBOND=y
59CONFIG_DM_ETH=y
Mark Kettenisf8463d62022-01-22 20:38:11 +0100[diff] [blame]60CONFIG_NVME_PCI=y
Patrick Wildt44d52132020-06-07 12:08:35 +0200[diff] [blame]61CONFIG_PCI=y
Peter Robinson7cbcda02020-11-10 10:09:06 +0000[diff] [blame]62CONFIG_PHY_ROCKCHIP_INNO_USB2=y
63CONFIG_PHY_ROCKCHIP_TYPEC=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]64CONFIG_DM_PMIC_FAN53555=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]65CONFIG_PMIC_RK8XX=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]66CONFIG_REGULATOR_PWM=y
67CONFIG_REGULATOR_RK8XX=y
68CONFIG_PWM_ROCKCHIP=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]69CONFIG_RAM_RK3399_LPDDR4=y
Patrick Wildt44d52132020-06-07 12:08:35 +0200[diff] [blame]70CONFIG_DM_RESET=y
Peter Robinsoncee3edd2020-06-08 23:50:30 +0100[diff] [blame]71CONFIG_DM_RNG=y
72CONFIG_RNG_ROCKCHIP=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]73CONFIG_BAUDRATE=1500000
74CONFIG_DEBUG_UART_SHIFT=2
75CONFIG_ROCKCHIP_SPI=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]76CONFIG_SYSRESET=y
77CONFIG_USB=y
78CONFIG_USB_XHCI_HCD=y
79CONFIG_USB_XHCI_DWC3=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]80CONFIG_USB_EHCI_HCD=y
81CONFIG_USB_EHCI_GENERIC=y
Peter Robinson34e63272020-06-08 23:50:29 +0100[diff] [blame]82CONFIG_USB_OHCI_HCD=y
83CONFIG_USB_OHCI_GENERIC=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]84CONFIG_USB_DWC3=y
Peter Robinson7cbcda02020-11-10 10:09:06 +0000[diff] [blame]85CONFIG_USB_DWC3_GENERIC=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]86CONFIG_USB_KEYBOARD=y
Peter Robinson7cbcda02020-11-10 10:09:06 +0000[diff] [blame]87CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]88CONFIG_USB_HOST_ETHER=y
89CONFIG_USB_ETHER_ASIX=y
90CONFIG_USB_ETHER_RTL8152=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]91CONFIG_DM_VIDEO=y
Peter Robinson6a349e72020-04-20 20:27:36 +0100[diff] [blame]92CONFIG_DISPLAY=y
93CONFIG_VIDEO_ROCKCHIP=y
94CONFIG_DISPLAY_ROCKCHIP_EDP=y
Tom Rini9e4bacb2020-06-04 19:29:09 -0400[diff] [blame]95CONFIG_SPL_TINY_MEMSET=y
96CONFIG_ERRNO_STR=y