blob: 85f318bd779a7a4ad5784bf0c88e16aa998e9209 [file] [log] [blame]
Philippe Reynes5aa6cfb2019-03-15 15:14:36 +01001// SPDX-License-Identifier: GPL-2.0+
2
3#include <common.h>
4#include <asm/io.h>
5#include <memalign.h>
6#include <nand.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -06007#include <linux/bitops.h>
Simon Glassd66c5f72020-02-03 07:36:15 -07008#include <linux/err.h>
Philippe Reynes5aa6cfb2019-03-15 15:14:36 +01009#include <linux/errno.h>
10#include <linux/io.h>
11#include <linux/ioport.h>
12#include <dm.h>
13
14#include "brcmnand.h"
15
16struct bcm6838_nand_soc {
17 struct brcmnand_soc soc;
18 void __iomem *base;
19};
20
21#define BCM6838_NAND_INT 0x00
22#define BCM6838_NAND_STATUS_SHIFT 0
23#define BCM6838_NAND_STATUS_MASK (0xfff << BCM6838_NAND_STATUS_SHIFT)
24#define BCM6838_NAND_ENABLE_SHIFT 16
25#define BCM6838_NAND_ENABLE_MASK (0xffff << BCM6838_NAND_ENABLE_SHIFT)
26
27enum {
28 BCM6838_NP_READ = BIT(0),
29 BCM6838_BLOCK_ERASE = BIT(1),
30 BCM6838_COPY_BACK = BIT(2),
31 BCM6838_PAGE_PGM = BIT(3),
32 BCM6838_CTRL_READY = BIT(4),
33 BCM6838_DEV_RBPIN = BIT(5),
34 BCM6838_ECC_ERR_UNC = BIT(6),
35 BCM6838_ECC_ERR_CORR = BIT(7),
36};
37
38static bool bcm6838_nand_intc_ack(struct brcmnand_soc *soc)
39{
40 struct bcm6838_nand_soc *priv =
41 container_of(soc, struct bcm6838_nand_soc, soc);
42 void __iomem *mmio = priv->base + BCM6838_NAND_INT;
43 u32 val = brcmnand_readl(mmio);
44
45 if (val & (BCM6838_CTRL_READY << BCM6838_NAND_STATUS_SHIFT)) {
46 /* Ack interrupt */
47 val &= ~BCM6838_NAND_STATUS_MASK;
48 val |= BCM6838_CTRL_READY << BCM6838_NAND_STATUS_SHIFT;
49 brcmnand_writel(val, mmio);
50 return true;
51 }
52
53 return false;
54}
55
56static void bcm6838_nand_intc_set(struct brcmnand_soc *soc, bool en)
57{
58 struct bcm6838_nand_soc *priv =
59 container_of(soc, struct bcm6838_nand_soc, soc);
60 void __iomem *mmio = priv->base + BCM6838_NAND_INT;
61 u32 val = brcmnand_readl(mmio);
62
63 /* Don't ack any interrupts */
64 val &= ~BCM6838_NAND_STATUS_MASK;
65
66 if (en)
67 val |= BCM6838_CTRL_READY << BCM6838_NAND_ENABLE_SHIFT;
68 else
69 val &= ~(BCM6838_CTRL_READY << BCM6838_NAND_ENABLE_SHIFT);
70
71 brcmnand_writel(val, mmio);
72}
73
74static int bcm6838_nand_probe(struct udevice *dev)
75{
76 struct udevice *pdev = dev;
77 struct bcm6838_nand_soc *priv = dev_get_priv(dev);
78 struct brcmnand_soc *soc;
79 struct resource res;
80
81 soc = &priv->soc;
82
83 dev_read_resource_byname(pdev, "nand-int-base", &res);
84 priv->base = ioremap(res.start, resource_size(&res));
85 if (IS_ERR(priv->base))
86 return PTR_ERR(priv->base);
87
88 soc->ctlrdy_ack = bcm6838_nand_intc_ack;
89 soc->ctlrdy_set_enabled = bcm6838_nand_intc_set;
90
91 /* Disable and ack all interrupts */
92 brcmnand_writel(0, priv->base + BCM6838_NAND_INT);
93 brcmnand_writel(BCM6838_NAND_STATUS_MASK,
94 priv->base + BCM6838_NAND_INT);
95
96 return brcmnand_probe(pdev, soc);
97}
98
99static const struct udevice_id bcm6838_nand_dt_ids[] = {
100 {
101 .compatible = "brcm,nand-bcm6838",
102 },
103 { /* sentinel */ }
104};
105
106U_BOOT_DRIVER(bcm6838_nand) = {
107 .name = "bcm6838-nand",
108 .id = UCLASS_MTD,
109 .of_match = bcm6838_nand_dt_ids,
110 .probe = bcm6838_nand_probe,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700111 .priv_auto = sizeof(struct bcm6838_nand_soc),
Philippe Reynes5aa6cfb2019-03-15 15:14:36 +0100112};
113
114void board_nand_init(void)
115{
116 struct udevice *dev;
117 int ret;
118
119 ret = uclass_get_device_by_driver(UCLASS_MTD,
Simon Glass65130cd2020-12-28 20:34:56 -0700120 DM_DRIVER_GET(bcm6838_nand), &dev);
Philippe Reynes5aa6cfb2019-03-15 15:14:36 +0100121 if (ret && ret != -ENODEV)
122 pr_err("Failed to initialize %s. (error %d)\n", dev->name,
123 ret);
124}