blob: 4408b07c5531a7460700b252a1e9debe721388cc [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <mpc824x.h>
26#include <pci.h>
27
28int checkboard (void)
29{
30 ulong busfreq = get_bus_freq(0);
31 char buf[32];
32
33 printf("Board: MUSENKI Local Bus at %s MHz\n", strmhz(buf, busfreq));
34 return 0;
35
36}
37
Wolfgang Denka1be4762008-05-20 16:00:29 +020038#if 0 /* NOT USED */
wdenkc6097192002-11-03 00:24:07 +000039int checkflash (void)
40{
41 /* TODO: XXX XXX XXX */
42 printf ("## Test not implemented yet ##\n");
43
44 return (0);
45}
46#endif
47
48long int initdram (int board_type)
49{
wdenk87249ba2004-01-06 22:38:14 +000050 long size;
51 long new_bank0_end;
52 long mear1;
53 long emear1;
wdenkc6097192002-11-03 00:24:07 +000054
wdenk87249ba2004-01-06 22:38:14 +000055 size = get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE);
wdenkc6097192002-11-03 00:24:07 +000056
wdenk87249ba2004-01-06 22:38:14 +000057 new_bank0_end = size - 1;
58 mear1 = mpc824x_mpc107_getreg(MEAR1);
59 emear1 = mpc824x_mpc107_getreg(EMEAR1);
60 mear1 = (mear1 & 0xFFFFFF00) |
61 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
62 emear1 = (emear1 & 0xFFFFFF00) |
63 ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
64 mpc824x_mpc107_setreg(MEAR1, mear1);
65 mpc824x_mpc107_setreg(EMEAR1, emear1);
wdenkc6097192002-11-03 00:24:07 +000066
wdenk87249ba2004-01-06 22:38:14 +000067 return (size);
wdenkc6097192002-11-03 00:24:07 +000068}
69
70/*
71 * Initialize PCI Devices
72 */
73#ifndef CONFIG_PCI_PNP
74static struct pci_config_table pci_sandpoint_config_table[] = {
75#if 0
76 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
77 0x0, 0x0, 0x0, /* unknown eth0 divice */
78 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
79 PCI_ENET0_MEMADDR,
80 PCI_COMMAND_IO |
81 PCI_COMMAND_MEMORY |
82 PCI_COMMAND_MASTER }},
83 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
84 0x0, 0x0, 0x0, /* unknown eth1 device */
85 pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
86 PCI_ENET1_MEMADDR,
87 PCI_COMMAND_IO |
88 PCI_COMMAND_MEMORY |
89 PCI_COMMAND_MASTER }},
90#endif
91 { }
92};
93#endif
94
95struct pci_controller hose = {
96#ifndef CONFIG_PCI_PNP
97 config_table: pci_sandpoint_config_table,
98#endif
99};
100
stroesef5dd4102003-02-14 11:21:23 +0000101void pci_init_board(void)
wdenkc6097192002-11-03 00:24:07 +0000102{
103 pci_mpc824x_init(&hose);
104}