blob: 222405bb3bba7512cd948f446a45bca9684ca2b1 [file] [log] [blame]
wdenk0aeb8532004-10-10 21:21:55 +00001/*
2 * Copyright 2004 Freescale Semiconductor.
3 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
wdenk0aeb8532004-10-10 21:21:55 +00005 */
6
7#ifndef __EEPROM_H_
8#define __EEPROM_H_
9
10
11/*
12 * EEPROM Board System Register interface.
13 */
14
15
16/*
17 * CPU Board Revision
18 */
19#define MPC85XX_CPU_BOARD_REV(maj, min) ((((maj)&0xff) << 8) | ((min) & 0xff))
20#define MPC85XX_CPU_BOARD_MAJOR(rev) (((rev) >> 8) & 0xff)
21#define MPC85XX_CPU_BOARD_MINOR(rev) ((rev) & 0xff)
22
23#define MPC85XX_CPU_BOARD_REV_UNKNOWN MPC85XX_CPU_BOARD_REV(0,0)
24#define MPC85XX_CPU_BOARD_REV_1_0 MPC85XX_CPU_BOARD_REV(1,0)
25#define MPC85XX_CPU_BOARD_REV_1_1 MPC85XX_CPU_BOARD_REV(1,1)
26
27/*
28 * Returns CPU board revision register as a 16-bit value with
29 * the Major in the high byte, and Minor in the low byte.
30 */
31extern unsigned int get_cpu_board_revision(void);
32
33
34#endif /* __CADMUS_H_ */