Michael Walle | f874e09 | 2022-08-17 21:37:51 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | #include <asm/io.h> |
| 3 | #include <common.h> |
Stefan Roese | 537f018 | 2022-09-15 16:20:38 +0200 | [diff] [blame] | 4 | #include <div64.h> |
Michael Walle | f874e09 | 2022-08-17 21:37:51 +0200 | [diff] [blame] | 5 | #include <dm/device.h> |
| 6 | #include <dm/fdtaddr.h> |
| 7 | #include <timer.h> |
| 8 | |
| 9 | #define TIMER_CTRL 0x00 |
| 10 | #define TIMER0_EN BIT(0) |
| 11 | #define TIMER0_RELOAD_EN BIT(1) |
| 12 | #define TIMER0_RELOAD 0x10 |
| 13 | #define TIMER0_VAL 0x14 |
| 14 | |
Stefan Roese | 70280f2 | 2022-09-15 16:20:37 +0200 | [diff] [blame] | 15 | enum input_clock_type { |
| 16 | INPUT_CLOCK_NON_FIXED, |
| 17 | INPUT_CLOCK_25MHZ, /* input clock rate is fixed to 25MHz */ |
| 18 | }; |
| 19 | |
Michael Walle | f874e09 | 2022-08-17 21:37:51 +0200 | [diff] [blame] | 20 | struct orion_timer_priv { |
| 21 | void *base; |
| 22 | }; |
| 23 | |
Stefan Roese | 70280f2 | 2022-09-15 16:20:37 +0200 | [diff] [blame] | 24 | #define MVEBU_TIMER_FIXED_RATE_25MHZ 25000000 |
| 25 | |
Stefan Roese | 537f018 | 2022-09-15 16:20:38 +0200 | [diff] [blame] | 26 | static bool early_init_done __section(".data") = false; |
| 27 | |
| 28 | /* Common functions for early (boot) and DM based timer */ |
| 29 | static void orion_timer_init(void *base, enum input_clock_type type) |
| 30 | { |
| 31 | writel(~0, base + TIMER0_VAL); |
| 32 | writel(~0, base + TIMER0_RELOAD); |
| 33 | |
| 34 | if (type == INPUT_CLOCK_25MHZ) { |
| 35 | /* |
| 36 | * On Armada XP / 38x ..., the 25MHz clock source needs to |
| 37 | * be enabled |
| 38 | */ |
| 39 | setbits_le32(base + TIMER_CTRL, BIT(11)); |
| 40 | } |
| 41 | |
| 42 | /* enable timer */ |
| 43 | setbits_le32(base + TIMER_CTRL, TIMER0_EN | TIMER0_RELOAD_EN); |
| 44 | } |
| 45 | |
| 46 | static uint64_t orion_timer_get_count(void *base) |
| 47 | { |
| 48 | return timer_conv_64(~readl(base + TIMER0_VAL)); |
| 49 | } |
| 50 | |
| 51 | /* Early (e.g. bootstage etc) timer functions */ |
| 52 | static void notrace timer_early_init(void) |
| 53 | { |
| 54 | /* Only init the timer once */ |
| 55 | if (early_init_done) |
| 56 | return; |
| 57 | early_init_done = true; |
| 58 | |
| 59 | if (IS_ENABLED(CONFIG_ARCH_MVEBU)) |
| 60 | orion_timer_init((void *)MVEBU_TIMER_BASE, INPUT_CLOCK_25MHZ); |
| 61 | else |
| 62 | orion_timer_init((void *)MVEBU_TIMER_BASE, INPUT_CLOCK_NON_FIXED); |
| 63 | } |
| 64 | |
Stefan Roese | 70280f2 | 2022-09-15 16:20:37 +0200 | [diff] [blame] | 65 | /** |
| 66 | * timer_early_get_rate() - Get the timer rate before driver model |
| 67 | */ |
| 68 | unsigned long notrace timer_early_get_rate(void) |
| 69 | { |
Stefan Roese | 537f018 | 2022-09-15 16:20:38 +0200 | [diff] [blame] | 70 | timer_early_init(); |
| 71 | |
| 72 | if (IS_ENABLED(CONFIG_ARCH_MVEBU)) |
| 73 | return MVEBU_TIMER_FIXED_RATE_25MHZ; |
| 74 | else |
| 75 | return CONFIG_SYS_TCLK; |
Stefan Roese | 70280f2 | 2022-09-15 16:20:37 +0200 | [diff] [blame] | 76 | } |
| 77 | |
| 78 | /** |
| 79 | * timer_early_get_count() - Get the timer count before driver model |
| 80 | * |
| 81 | */ |
| 82 | u64 notrace timer_early_get_count(void) |
| 83 | { |
Stefan Roese | 537f018 | 2022-09-15 16:20:38 +0200 | [diff] [blame] | 84 | timer_early_init(); |
| 85 | |
| 86 | return orion_timer_get_count((void *)MVEBU_TIMER_BASE); |
Stefan Roese | 70280f2 | 2022-09-15 16:20:37 +0200 | [diff] [blame] | 87 | } |
| 88 | |
Stefan Roese | 537f018 | 2022-09-15 16:20:38 +0200 | [diff] [blame] | 89 | ulong timer_get_boot_us(void) |
| 90 | { |
| 91 | u64 ticks; |
| 92 | |
| 93 | ticks = timer_early_get_count(); |
| 94 | return lldiv(ticks * 1000, timer_early_get_rate()); |
| 95 | } |
| 96 | |
| 97 | /* DM timer functions */ |
| 98 | static uint64_t dm_orion_timer_get_count(struct udevice *dev) |
Michael Walle | f874e09 | 2022-08-17 21:37:51 +0200 | [diff] [blame] | 99 | { |
| 100 | struct orion_timer_priv *priv = dev_get_priv(dev); |
| 101 | |
Stefan Roese | 537f018 | 2022-09-15 16:20:38 +0200 | [diff] [blame] | 102 | return orion_timer_get_count(priv->base); |
Michael Walle | f874e09 | 2022-08-17 21:37:51 +0200 | [diff] [blame] | 103 | } |
| 104 | |
| 105 | static int orion_timer_probe(struct udevice *dev) |
| 106 | { |
| 107 | struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev); |
Stefan Roese | 70280f2 | 2022-09-15 16:20:37 +0200 | [diff] [blame] | 108 | enum input_clock_type type = dev_get_driver_data(dev); |
Michael Walle | f874e09 | 2022-08-17 21:37:51 +0200 | [diff] [blame] | 109 | struct orion_timer_priv *priv = dev_get_priv(dev); |
| 110 | |
| 111 | priv->base = devfdt_remap_addr_index(dev, 0); |
| 112 | if (!priv->base) { |
| 113 | debug("unable to map registers\n"); |
| 114 | return -ENOMEM; |
| 115 | } |
| 116 | |
Stefan Roese | 537f018 | 2022-09-15 16:20:38 +0200 | [diff] [blame] | 117 | if (type == INPUT_CLOCK_25MHZ) |
Stefan Roese | 70280f2 | 2022-09-15 16:20:37 +0200 | [diff] [blame] | 118 | uc_priv->clock_rate = MVEBU_TIMER_FIXED_RATE_25MHZ; |
Stefan Roese | 537f018 | 2022-09-15 16:20:38 +0200 | [diff] [blame] | 119 | else |
Stefan Roese | 70280f2 | 2022-09-15 16:20:37 +0200 | [diff] [blame] | 120 | uc_priv->clock_rate = CONFIG_SYS_TCLK; |
Stefan Roese | 537f018 | 2022-09-15 16:20:38 +0200 | [diff] [blame] | 121 | orion_timer_init(priv->base, type); |
Michael Walle | f874e09 | 2022-08-17 21:37:51 +0200 | [diff] [blame] | 122 | |
| 123 | return 0; |
| 124 | } |
| 125 | |
| 126 | static const struct timer_ops orion_timer_ops = { |
Stefan Roese | 537f018 | 2022-09-15 16:20:38 +0200 | [diff] [blame] | 127 | .get_count = dm_orion_timer_get_count, |
Michael Walle | f874e09 | 2022-08-17 21:37:51 +0200 | [diff] [blame] | 128 | }; |
| 129 | |
| 130 | static const struct udevice_id orion_timer_ids[] = { |
Stefan Roese | 70280f2 | 2022-09-15 16:20:37 +0200 | [diff] [blame] | 131 | { .compatible = "marvell,orion-timer", .data = INPUT_CLOCK_NON_FIXED }, |
| 132 | { .compatible = "marvell,armada-370-timer", .data = INPUT_CLOCK_25MHZ }, |
| 133 | { .compatible = "marvell,armada-xp-timer", .data = INPUT_CLOCK_25MHZ }, |
Michael Walle | f874e09 | 2022-08-17 21:37:51 +0200 | [diff] [blame] | 134 | {} |
| 135 | }; |
| 136 | |
| 137 | U_BOOT_DRIVER(orion_timer) = { |
| 138 | .name = "orion_timer", |
| 139 | .id = UCLASS_TIMER, |
| 140 | .of_match = orion_timer_ids, |
| 141 | .probe = orion_timer_probe, |
| 142 | .ops = &orion_timer_ops, |
| 143 | .priv_auto = sizeof(struct orion_timer_priv), |
| 144 | }; |