blob: ef5992d7c3979a7a995e845c940edfc6e37e26ab [file] [log] [blame]
Alifer Moraesa0a29482020-03-06 07:46:33 -03001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2020 NXP
4 */
5
6#ifndef __IMX8M_PHANBELL_H
7#define __IMX8M_PHANBELL_H
8
9#include <linux/sizes.h>
10#include <asm/arch/imx-regs.h>
11
12#define CONFIG_SPL_MAX_SIZE (172 * 1024)
13#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
Alifer Moraesa0a29482020-03-06 07:46:33 -030014
15#ifdef CONFIG_SPL_BUILD
16/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
Alifer Moraesa0a29482020-03-06 07:46:33 -030017#define CONFIG_SPL_STACK 0x187FF0
Alifer Moraesa0a29482020-03-06 07:46:33 -030018#define CONFIG_SPL_BSS_START_ADDR 0x00180000
19#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
20#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
21#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
22#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
23
24/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
25#define CONFIG_MALLOC_F_ADDR 0x182000
26/* For RAW image gives a error info not panic */
27#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
Alifer Moraesa0a29482020-03-06 07:46:33 -030028#endif
29
Alifer Moraesa0a29482020-03-06 07:46:33 -030030/* ENET Config */
31/* ENET1 */
32#if defined(CONFIG_CMD_NET)
Alifer Moraesa0a29482020-03-06 07:46:33 -030033#define CONFIG_FEC_MXC_PHYADDR 0
34#define FEC_QUIRK_ENET_MAC
Alifer Moraesa0a29482020-03-06 07:46:33 -030035#endif
36
37#define CONFIG_MFG_ENV_SETTINGS \
38 "initrd_addr=0x43800000\0" \
39 "initrd_high=0xffffffff\0" \
40
41/* Initial environment variables */
42#define CONFIG_EXTRA_ENV_SETTINGS \
43 CONFIG_MFG_ENV_SETTINGS \
44 "script=boot.scr\0" \
45 "image=Image\0" \
46 "console=ttymxc0,115200\0" \
47 "fdt_addr=0x43000000\0" \
48 "fdt_high=0xffffffffffffffff\0" \
49 "boot_fdt=try\0" \
50 "fdt_file=imx8mq-phanbell.dtb\0" \
51 "initrd_addr=0x43800000\0" \
52 "initrd_high=0xffffffffffffffff\0" \
53 "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
Tom Rinib113bca2021-12-11 14:55:52 -050054 "mmcpart=1\0" \
Alifer Moraesa0a29482020-03-06 07:46:33 -030055 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
56 "mmcautodetect=yes\0" \
57 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
58 "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
59 "bootscript=echo Running bootscript from mmc ...; " \
60 "source\0" \
61 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
62 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
63 "mmcboot=echo Booting from mmc ...; " \
64 "run mmcargs; " \
65 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
66 "if run loadfdt; then " \
67 "booti ${loadaddr} - ${fdt_addr}; " \
68 "else " \
69 "echo WARN: Cannot load the DT; " \
70 "fi; " \
71 "else " \
72 "echo wait for boot; " \
73 "fi;\0" \
74 "netargs=setenv bootargs console=${console} " \
75 "root=/dev/nfs " \
76 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
77 "netboot=echo Booting from net ...; " \
78 "run netargs; " \
79 "if test ${ip_dyn} = yes; then " \
80 "setenv get_cmd dhcp; " \
81 "else " \
82 "setenv get_cmd tftp; " \
83 "fi; " \
84 "${get_cmd} ${loadaddr} ${image}; " \
85 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
86 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
87 "booti ${loadaddr} - ${fdt_addr}; " \
88 "else " \
89 "echo WARN: Cannot load the DT; " \
90 "fi; " \
91 "else " \
92 "booti; " \
93 "fi;\0"
94
Alifer Moraesa0a29482020-03-06 07:46:33 -030095/* Link Definitions */
Alifer Moraesa0a29482020-03-06 07:46:33 -030096
97#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
98#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
99#define CONFIG_SYS_INIT_SP_OFFSET \
100 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
101#define CONFIG_SYS_INIT_SP_ADDR \
102 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
103
Alifer Moraesa0a29482020-03-06 07:46:33 -0300104#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
105
Alifer Moraesa0a29482020-03-06 07:46:33 -0300106#define CONFIG_SYS_SDRAM_BASE 0x40000000
107#define PHYS_SDRAM 0x40000000
108#define PHYS_SDRAM_SIZE 0x40000000 /* 1GB DDR */
109
Alifer Moraesa0a29482020-03-06 07:46:33 -0300110#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
111
112/* Monitor Command Prompt */
Alifer Moraesa0a29482020-03-06 07:46:33 -0300113#define CONFIG_SYS_CBSIZE 1024
114#define CONFIG_SYS_MAXARGS 64
115#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
116#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
117 sizeof(CONFIG_SYS_PROMPT) + 16)
118
Alifer Moraesa0a29482020-03-06 07:46:33 -0300119#define CONFIG_SYS_FSL_USDHC_NUM 2
120#define CONFIG_SYS_FSL_ESDHC_ADDR 0
121
Alifer Moraesa0a29482020-03-06 07:46:33 -0300122#endif