Siva Durga Prasad Paladugu | fce69e2 | 2019-02-04 16:18:29 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * dts file for Xilinx Versal Mini Configuration |
| 4 | * |
| 5 | * (C) Copyright 2019, Xilinx, Inc. |
| 6 | * |
| 7 | * Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> |
| 8 | */ |
| 9 | |
| 10 | /dts-v1/; |
| 11 | |
| 12 | / { |
| 13 | model = "Versal MINI"; |
| 14 | compatible = "xlnx,versal"; |
| 15 | #address-cells = <2>; |
| 16 | #size-cells = <2>; |
| 17 | |
| 18 | aliases { |
| 19 | serial0 = &dcc; |
| 20 | }; |
| 21 | |
| 22 | chosen { |
| 23 | stdout-path = "serial0:115200n8"; |
| 24 | }; |
| 25 | |
| 26 | memory@0 { |
| 27 | device_type = "memory"; |
| 28 | reg = <0x0 0xfffc0000 0x0 0x40000>, <0x0 0x0 0x0 0x80000000>; |
| 29 | }; |
| 30 | |
| 31 | dcc: dcc { |
| 32 | compatible = "arm,dcc"; |
| 33 | status = "okay"; |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 34 | bootph-all; |
Siva Durga Prasad Paladugu | fce69e2 | 2019-02-04 16:18:29 +0530 | [diff] [blame] | 35 | }; |
| 36 | }; |