Kumar Gala | 2683c53 | 2011-04-13 08:37:44 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2009-2011 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or |
| 5 | * modify it under the terms of the GNU General Public License as |
| 6 | * published by the Free Software Foundation; either version 2 of |
| 7 | * the License, or (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program; if not, write to the Free Software |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 17 | * MA 02111-1307 USA |
| 18 | */ |
| 19 | |
| 20 | #ifndef __FM_H__ |
| 21 | #define __FM_H__ |
| 22 | |
| 23 | #include <common.h> |
| 24 | #include <fm_eth.h> |
| 25 | #include <asm/fsl_enet.h> |
| 26 | #include <asm/fsl_fman.h> |
| 27 | |
| 28 | /* Port ID */ |
| 29 | #define OH_PORT_ID_BASE 0x01 |
| 30 | #define MAX_NUM_OH_PORT 7 |
| 31 | #define RX_PORT_1G_BASE 0x08 |
| 32 | #define MAX_NUM_RX_PORT_1G CONFIG_SYS_NUM_FM1_DTSEC |
| 33 | #define RX_PORT_10G_BASE 0x10 |
| 34 | #define TX_PORT_1G_BASE 0x28 |
| 35 | #define MAX_NUM_TX_PORT_1G CONFIG_SYS_NUM_FM1_DTSEC |
| 36 | #define TX_PORT_10G_BASE 0x30 |
| 37 | |
| 38 | struct fm_muram { |
| 39 | u32 base; |
| 40 | u32 top; |
| 41 | u32 size; |
| 42 | u32 alloc; |
| 43 | }; |
| 44 | #define FM_MURAM_RES_SIZE 0x01000 |
| 45 | |
| 46 | /* Rx/Tx buffer descriptor */ |
| 47 | struct fm_port_bd { |
| 48 | u16 status; |
| 49 | u16 len; |
| 50 | u32 res0; |
| 51 | u16 res1; |
| 52 | u16 buf_ptr_hi; |
| 53 | u32 buf_ptr_lo; |
| 54 | }; |
| 55 | |
| 56 | /* Common BD flags */ |
| 57 | #define BD_LAST 0x0800 |
| 58 | |
| 59 | /* Rx BD status flags */ |
| 60 | #define RxBD_EMPTY 0x8000 |
| 61 | #define RxBD_LAST BD_LAST |
| 62 | #define RxBD_FIRST 0x0400 |
| 63 | #define RxBD_PHYS_ERR 0x0008 |
| 64 | #define RxBD_SIZE_ERR 0x0004 |
| 65 | #define RxBD_ERROR (RxBD_PHYS_ERR | RxBD_SIZE_ERR) |
| 66 | |
| 67 | /* Tx BD status flags */ |
| 68 | #define TxBD_READY 0x8000 |
| 69 | #define TxBD_LAST BD_LAST |
| 70 | |
| 71 | /* Rx/Tx queue descriptor */ |
| 72 | struct fm_port_qd { |
| 73 | u16 gen; |
| 74 | u16 bd_ring_base_hi; |
| 75 | u32 bd_ring_base_lo; |
| 76 | u16 bd_ring_size; |
| 77 | u16 offset_in; |
| 78 | u16 offset_out; |
| 79 | u16 res0; |
| 80 | u32 res1[0x4]; |
| 81 | }; |
| 82 | |
| 83 | /* IM global parameter RAM */ |
| 84 | struct fm_port_global_pram { |
| 85 | u32 mode; /* independent mode register */ |
| 86 | u32 rxqd_ptr; /* Rx queue descriptor pointer */ |
| 87 | u32 txqd_ptr; /* Tx queue descriptor pointer */ |
| 88 | u16 mrblr; /* max Rx buffer length */ |
| 89 | u16 rxqd_bsy_cnt; /* RxQD busy counter, should be cleared */ |
| 90 | u32 res0[0x4]; |
| 91 | struct fm_port_qd rxqd; /* Rx queue descriptor */ |
| 92 | struct fm_port_qd txqd; /* Tx queue descriptor */ |
| 93 | u32 res1[0x28]; |
| 94 | }; |
| 95 | |
| 96 | #define FM_PRAM_SIZE sizeof(struct fm_port_global_pram) |
| 97 | #define FM_PRAM_ALIGN 256 |
| 98 | #define PRAM_MODE_GLOBAL 0x20000000 |
| 99 | #define PRAM_MODE_GRACEFUL_STOP 0x00800000 |
| 100 | |
| 101 | #if defined(CONFIG_P1017) || defined(CONFIG_P1023) |
| 102 | #define FM_FREE_POOL_SIZE 0x2000 /* 8K bytes */ |
| 103 | #else |
| 104 | #define FM_FREE_POOL_SIZE 0x20000 /* 128K bytes */ |
| 105 | #endif |
| 106 | #define FM_FREE_POOL_ALIGN 256 |
| 107 | |
| 108 | u32 fm_muram_alloc(int fm_idx, u32 size, u32 align); |
| 109 | u32 fm_muram_base(int fm_idx); |
| 110 | int fm_init_common(int index, struct ccsr_fman *reg); |
| 111 | int fm_eth_initialize(struct ccsr_fman *reg, struct fm_eth_info *info); |
| 112 | phy_interface_t fman_port_enet_if(enum fm_port port); |
Kumar Gala | 5536d92 | 2011-09-14 12:01:35 -0500 | [diff] [blame] | 113 | void fman_disable_port(enum fm_port port); |
Kumar Gala | 2683c53 | 2011-04-13 08:37:44 -0500 | [diff] [blame] | 114 | |
| 115 | struct fsl_enet_mac { |
| 116 | void *base; /* MAC controller registers base address */ |
| 117 | void *phyregs; |
| 118 | int max_rx_len; |
| 119 | void (*init_mac)(struct fsl_enet_mac *mac); |
| 120 | void (*enable_mac)(struct fsl_enet_mac *mac); |
| 121 | void (*disable_mac)(struct fsl_enet_mac *mac); |
| 122 | void (*set_mac_addr)(struct fsl_enet_mac *mac, u8 *mac_addr); |
| 123 | void (*set_if_mode)(struct fsl_enet_mac *mac, phy_interface_t type, |
| 124 | int speed); |
| 125 | }; |
| 126 | |
| 127 | /* Fman ethernet private struct */ |
| 128 | struct fm_eth { |
| 129 | int fm_index; /* Fman index */ |
| 130 | u32 num; /* 0..n-1 for give type */ |
| 131 | struct fm_bmi_tx_port *tx_port; |
| 132 | struct fm_bmi_rx_port *rx_port; |
| 133 | enum fm_eth_type type; /* 1G or 10G ethernet */ |
| 134 | phy_interface_t enet_if; |
| 135 | struct fsl_enet_mac *mac; /* MAC controller */ |
| 136 | struct mii_dev *bus; |
| 137 | struct phy_device *phydev; |
| 138 | int phyaddr; |
| 139 | struct eth_device *dev; |
| 140 | int max_rx_len; |
| 141 | struct fm_port_global_pram *rx_pram; /* Rx parameter table */ |
| 142 | struct fm_port_global_pram *tx_pram; /* Tx parameter table */ |
| 143 | void *rx_bd_ring; /* Rx BD ring base */ |
| 144 | void *cur_rxbd; /* current Rx BD */ |
| 145 | void *rx_buf; /* Rx buffer base */ |
| 146 | void *tx_bd_ring; /* Tx BD ring base */ |
| 147 | void *cur_txbd; /* current Tx BD */ |
| 148 | }; |
| 149 | |
| 150 | #define RX_BD_RING_SIZE 8 |
| 151 | #define TX_BD_RING_SIZE 8 |
| 152 | #define MAX_RXBUF_LOG2 11 |
| 153 | #define MAX_RXBUF_LEN (1 << MAX_RXBUF_LOG2) |
| 154 | |
| 155 | #endif /* __FM_H__ */ |