Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / b8666dd4c3a322a340f1457b4f4c2bab5a36a2b8 / . / configs / stm32f746-disco_spl_defconfig
blob: 0368ece6390f8d2f6fdeac03e88ab7ac424fb962 [file] [log] [blame]
Vikas Manocha1b51c932016-02-11 15:47:20 -0800[diff] [blame]1CONFIG_ARM=y
Trevor Woerner2bcc1ed2020-05-06 08:02:42 -0400[diff] [blame]2CONFIG_ARCH_STM32=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x08008000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x100000
Patrice Chotarda5ad4b82018-11-26 13:42:32 +0100[diff] [blame]5CONFIG_SYS_MALLOC_F_LEN=0xE00
Patrice Chotard815719a2022-04-27 13:53:56 +0200[diff] [blame]6CONFIG_SPL_GPIO=y
7CONFIG_SPL_LIBCOMMON_SUPPORT=y
8CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]9CONFIG_NR_DRAM_BANKS=1
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]10CONFIG_ENV_SIZE=0x2000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco"
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]12CONFIG_SPL_TEXT_BASE=0x8000000
Patrice Chotard815719a2022-04-27 13:53:56 +0200[diff] [blame]13CONFIG_SPL_SERIAL=y
14CONFIG_SPL_DRIVERS_MISC=y
Vikas Manocha1b51c932016-02-11 15:47:20 -0800[diff] [blame]15CONFIG_STM32F7=y
16CONFIG_TARGET_STM32F746_DISCO=y
Patrice Chotard815719a2022-04-27 13:53:56 +0200[diff] [blame]17CONFIG_SPL=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]18CONFIG_SYS_LOAD_ADDR=0x8008000
Tom Rini2e340532022-05-23 13:56:21 -0400[diff] [blame]19CONFIG_BUILD_TARGET="u-boot-with-spl.bin"
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]20CONFIG_DISTRO_DEFAULTS=y
Tom Rini4ddbade2022-05-25 12:16:03 -0400[diff] [blame]21CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
22CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]23CONFIG_BOOTDELAY=3
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]24CONFIG_AUTOBOOT_KEYED=y
25CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
26CONFIG_AUTOBOOT_STOP_STR=" "
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]27CONFIG_USE_BOOTARGS=y
28CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
Lokesh Vutlafbad3702016-10-08 14:41:44 -0400[diff] [blame]29# CONFIG_DISPLAY_CPUINFO is not set
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]30CONFIG_BOARD_LATE_INIT=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]31CONFIG_SPL_PAD_TO=0x8000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]32CONFIG_SPL_NO_BSS_LIMIT=y
Patrice Chotard815719a2022-04-27 13:53:56 +0200[diff] [blame]33CONFIG_SPL_BOARD_INIT=y
34CONFIG_SPL_SYS_MALLOC_SIMPLE=y
35CONFIG_SPL_MTD_SUPPORT=y
36CONFIG_SPL_XIP_SUPPORT=y
Tom Rini2c9d2b52022-05-27 22:06:52 -0400[diff] [blame]37CONFIG_SYS_SPL_ARGS_ADDR=0x81c0000
Patrice Chotard815719a2022-04-27 13:53:56 +0200[diff] [blame]38CONFIG_SPL_DM_RESET=y
Vikas Manocha1b51c932016-02-11 15:47:20 -0800[diff] [blame]39CONFIG_SYS_PROMPT="U-Boot > "
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]40CONFIG_SYS_PBSIZE=1050
Patrice Chotardf2d7dce2017-12-12 10:15:00 +0100[diff] [blame]41CONFIG_CMD_GPT=y
42# CONFIG_RANDOM_UUID is not set
43CONFIG_CMD_MMC=y
Vikas Manocha1b51c932016-02-11 15:47:20 -0800[diff] [blame]44# CONFIG_CMD_SETEXPR is not set
Michael Kurz812962b2017-01-22 16:04:27 +0100[diff] [blame]45CONFIG_CMD_SNTP=y
46CONFIG_CMD_DNS=y
47CONFIG_CMD_LINK_LOCAL=y
yannick fertre4d371bd2018-03-02 15:59:29 +0100[diff] [blame]48CONFIG_CMD_BMP=y
Patrice Chotarddd67dcd02018-08-03 11:46:15 +0200[diff] [blame]49CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]50CONFIG_CMD_TIMER=y
Patrice Chotard1bc56c52019-02-21 10:12:08 +0100[diff] [blame]51# CONFIG_ISO_PARTITION is not set
Michael Kurz812962b2017-01-22 16:04:27 +0100[diff] [blame]52CONFIG_OF_CONTROL=y
Patrice Chotard815719a2022-04-27 13:53:56 +0200[diff] [blame]53CONFIG_SPL_OF_CONTROL=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]54CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Michael Kurz812962b2017-01-22 16:04:27 +0100[diff] [blame]55CONFIG_NET_RANDOM_ETHADDR=y
56CONFIG_NETCONSOLE=y
Patrice Chotard815719a2022-04-27 13:53:56 +0200[diff] [blame]57CONFIG_SPL_DM=y
58CONFIG_SPL_DM_SEQ_ALIAS=y
59CONFIG_SPL_OF_TRANSLATE=y
60CONFIG_SPL_CLK=y
Patrice Chotardf2d7dce2017-12-12 10:15:00 +0100[diff] [blame]61CONFIG_ARM_PL180_MMCI=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]62CONFIG_MTD=y
Miquel Raynala903be42019-10-03 19:50:04 +0200[diff] [blame]63CONFIG_DM_MTD=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]64CONFIG_MTD_NOR_FLASH=y
Patrick Delaunay754ff3b2021-10-04 11:05:52 +0200[diff] [blame]65CONFIG_STM32_FLASH=y
Tom Rinid38112c2022-07-23 13:05:04 -0400[diff] [blame]66CONFIG_SYS_MAX_FLASH_SECT=8
Michael Kurz337ff2a2017-01-22 16:04:30 +0100[diff] [blame]67CONFIG_DM_SPI_FLASH=y
Patrice Chotarded7fce32019-02-22 15:04:43 +0100[diff] [blame]68CONFIG_SPI_FLASH_MACRONIX=y
Michael Kurz337ff2a2017-01-22 16:04:30 +0100[diff] [blame]69CONFIG_SPI_FLASH_STMICRO=y
Tom Rini5d154192020-04-24 15:35:53 -0400[diff] [blame]70CONFIG_PHY_SMSC=y
Michael Kurz812962b2017-01-22 16:04:27 +0100[diff] [blame]71CONFIG_DM_ETH=y
72CONFIG_ETH_DESIGNWARE=y
Tom Rini7ac21a32022-06-15 12:03:43 -0400[diff] [blame]73CONFIG_DW_ALTDESCRIPTOR=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]74CONFIG_MII=y
Tom Rini79f4eea2017-05-01 11:41:11 -0400[diff] [blame]75# CONFIG_PINCTRL_FULL is not set
Patrice Chotard815719a2022-04-27 13:53:56 +0200[diff] [blame]76CONFIG_SPL_PINCTRL=y
77CONFIG_SPL_RAM=y
78CONFIG_SPECIFY_CONSOLE_INDEX=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]79CONFIG_SPI=y
Michael Kurz337ff2a2017-01-22 16:04:30 +0100[diff] [blame]80CONFIG_DM_SPI=y
81CONFIG_STM32_QSPI=y
Patrice Chotard815719a2022-04-27 13:53:56 +0200[diff] [blame]82CONFIG_SPL_TIMER=y
yannick fertre4d371bd2018-03-02 15:59:29 +0100[diff] [blame]83CONFIG_DM_VIDEO=y
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]84CONFIG_BACKLIGHT_GPIO=y
yannick fertre4d371bd2018-03-02 15:59:29 +0100[diff] [blame]85CONFIG_VIDEO_STM32=y
86CONFIG_VIDEO_STM32_MAX_XRES=480
87CONFIG_VIDEO_STM32_MAX_YRES=640
Simon Glass2d7a7942020-08-11 11:23:35 -0600[diff] [blame]88CONFIG_SPLASH_SCREEN=y
89CONFIG_SPLASH_SCREEN_ALIGN=y
Patrick Delaunayc47fe772020-09-28 11:30:15 +0200[diff] [blame]90CONFIG_VIDEO_BMP_RLE8=y
Patrick Delaunayb1f17632020-09-28 11:30:16 +0200[diff] [blame]91CONFIG_BMP_16BPP=y
92CONFIG_BMP_24BPP=y
93CONFIG_BMP_32BPP=y
Michael Kurz812962b2017-01-22 16:04:27 +0100[diff] [blame]94CONFIG_OF_LIBFDT_OVERLAY=y