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git01.mediatek.com / filogic / uboot / b7c56ef864d1d91790df8a5f9fccff294a27e07a / . / arch / arm / dts / s5pc110-pinctrl.dtsi
blob: 2e9d552daaf5fe088b51e6aafc4f00d4a624e40c [file] [log] [blame]
Simon Glass3e44c402014-10-20 19:48:34 -0600[diff] [blame]1/*
2 * U-Boot additions to enable a generic Exynos GPIO driver
3 *
4 * Copyright (c) 2014 Google, Inc
Simon Glass28a60322015-04-13 11:19:07 -0600[diff] [blame]5 *
6 * SPDX-License-Identifier: GPL-2.0+
Simon Glass3e44c402014-10-20 19:48:34 -0600[diff] [blame]7 */
8
9/ {
10 pinctrl@e0200000 {
11 #address-cells = <1>;
12 #size-cells = <0>;
13 gpa0: gpa0 {
14 gpio-controller;
15 #gpio-cells = <2>;
16 };
17
18 gpa1: gpa1 {
19 gpio-controller;
20 #gpio-cells = <2>;
21 };
22
23 gpb: gpb {
24 gpio-controller;
25 #gpio-cells = <2>;
26 };
27
28 gpc0: gpc0 {
29 gpio-controller;
30 #gpio-cells = <2>;
31 };
32
33 gpc1: gpc1 {
34 gpio-controller;
35 #gpio-cells = <2>;
36 };
37
38 gpd0: gpd0 {
39 gpio-controller;
40 #gpio-cells = <2>;
41 };
42
43 gpd1: gpd1 {
44 gpio-controller;
45 #gpio-cells = <2>;
46 };
47
48 gpe0: gpe0 {
49 gpio-controller;
50 #gpio-cells = <2>;
51 };
52
53 gpe1: gpe1 {
54 gpio-controller;
55 #gpio-cells = <2>;
56 };
57
58 gpf0: gpf0 {
59 gpio-controller;
60 #gpio-cells = <2>;
61 };
62
63 gpf1: gpf1 {
64 gpio-controller;
65 #gpio-cells = <2>;
66 };
67
68 gpf2: gpf2 {
69 gpio-controller;
70 #gpio-cells = <2>;
71 };
72
73 gpf3: gpf3 {
74 gpio-controller;
75 #gpio-cells = <2>;
76 };
77
78 gpg0: gpg0 {
79 gpio-controller;
80 #gpio-cells = <2>;
81 };
82
83 gpg1: gpg1 {
84 gpio-controller;
85 #gpio-cells = <2>;
86 };
87
88 gpg2: gpg2 {
89 gpio-controller;
90 #gpio-cells = <2>;
91 };
92
93 gpg3: gpg3 {
94 gpio-controller;
95 #gpio-cells = <2>;
96 };
97
98 gpi: gpi {
99 gpio-controller;
100 #gpio-cells = <2>;
101 };
102
103 gpj0: gpj0 {
104 gpio-controller;
105 #gpio-cells = <2>;
106 };
107
108 gpj1: gpj1 {
109 gpio-controller;
110 #gpio-cells = <2>;
111 };
112
113 gpj2: gpj2 {
114 gpio-controller;
115 #gpio-cells = <2>;
116 };
117
118 gpj3: gpj3 {
119 gpio-controller;
120 #gpio-cells = <2>;
121 };
122
123 gpj4: gpj4 {
124 gpio-controller;
125 #gpio-cells = <2>;
126 };
127
128 gpmp01: gpmp01 {
129 gpio-controller;
130 #gpio-cells = <2>;
131 };
132
133 gpmp02: gpmp02 {
134 gpio-controller;
135 #gpio-cells = <2>;
136 };
137
138 gpmp03: gpmp03 {
139 gpio-controller;
140 #gpio-cells = <2>;
141 };
142
143 gpmp04: gpmp04 {
144 gpio-controller;
145 #gpio-cells = <2>;
146 };
147
148 gpmp05: gpmp05 {
149 gpio-controller;
150 #gpio-cells = <2>;
151 };
152
153 gpmp06: gpmp06 {
154 gpio-controller;
155 #gpio-cells = <2>;
156 };
157
158 gpmp07: gpmp07 {
159 gpio-controller;
160 #gpio-cells = <2>;
161 };
162
163 gpmp10: gpmp10 {
164 gpio-controller;
165 #gpio-cells = <2>;
166 };
167
168 gpmp11: gpmp11 {
169 gpio-controller;
170 #gpio-cells = <2>;
171 };
172
173 gpmp12: gpmp12 {
174 gpio-controller;
175 #gpio-cells = <2>;
176 };
177
178 gpmp13: gpmp13 {
179 gpio-controller;
180 #gpio-cells = <2>;
181 };
182
183 gpmp14: gpmp14 {
184 gpio-controller;
185 #gpio-cells = <2>;
186 };
187
188 gpmp15: gpmp15 {
189 gpio-controller;
190 #gpio-cells = <2>;
191 };
192
193 gpmp16: gpmp16 {
194 gpio-controller;
195 #gpio-cells = <2>;
196 };
197
198 gpmp17: gpmp17 {
199 gpio-controller;
200 #gpio-cells = <2>;
201 };
202
203 gpmp18: gpmp18 {
204 gpio-controller;
205 #gpio-cells = <2>;
206 };
207
208 gpmp20: gpmp20 {
209 gpio-controller;
210 #gpio-cells = <2>;
211 };
212
213 gpmp21: gpmp21 {
214 gpio-controller;
215 #gpio-cells = <2>;
216 };
217
218 gpmp22: gpmp22 {
219 gpio-controller;
220 #gpio-cells = <2>;
221 };
222
223 gpmp23: gpmp23 {
224 gpio-controller;
225 #gpio-cells = <2>;
226 };
227
228 gpmp24: gpmp24 {
229 gpio-controller;
230 #gpio-cells = <2>;
231 };
232
233 gpmp25: gpmp25 {
234 gpio-controller;
235 #gpio-cells = <2>;
236 };
237
238 gpmp26: gpmp26 {
239 gpio-controller;
240 #gpio-cells = <2>;
241 };
242
243 gpmp27: gpmp27 {
244 gpio-controller;
245 #gpio-cells = <2>;
246 };
247
248 gpmp28: gpmp28 {
249 gpio-controller;
250 #gpio-cells = <2>;
251 };
252
253 gph0: gph0 {
254 reg = <0xc00>;
255 gpio-controller;
256 #gpio-cells = <2>;
257 };
258
259 gph1: gph1 {
260 gpio-controller;
261 #gpio-cells = <2>;
262 };
263
264 gph2: gph2 {
265 gpio-controller;
266 #gpio-cells = <2>;
267 };
268
269 gph3: gph3 {
270 gpio-controller;
271 #gpio-cells = <2>;
272 };
273
274 };
275};