Daniel Gorsulowski | 6e02da5 | 2010-01-25 10:50:41 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2010 |
| 3 | * Daniel Gorsulowski <daniel.gorsulowski@esd.eu> |
| 4 | * esd electronic system design gmbh <www.esd.eu> |
| 5 | * |
| 6 | * (C) Copyright 2007-2008 |
| 7 | * Stelian Pop <stelian.pop@leadtechdesign.com> |
| 8 | * Lead Tech Design <www.leadtechdesign.com> |
| 9 | * |
| 10 | * Configuation settings for the esd OTC570 board. |
| 11 | * |
| 12 | * See file CREDITS for list of people who contributed to this |
| 13 | * project. |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or |
| 16 | * modify it under the terms of the GNU General Public License as |
| 17 | * published by the Free Software Foundation; either version 2 of |
| 18 | * the License, or (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License |
| 26 | * along with this program; if not, write to the Free Software |
| 27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 28 | * MA 02111-1307 USA |
| 29 | */ |
| 30 | |
| 31 | #ifndef __CONFIG_H |
| 32 | #define __CONFIG_H |
| 33 | |
| 34 | /* Common stuff */ |
| 35 | #define CONFIG_OTC570 1 /* Board is esd OTC570 */ |
| 36 | #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ |
| 37 | #define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */ |
| 38 | #define CONFIG_SYS_HZ 1000 /* decrementer freq */ |
| 39 | #define CONFIG_DISPLAY_BOARDINFO 1 |
| 40 | #define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */ |
| 41 | #define CONFIG_PREBOOT /* enable preboot variable */ |
| 42 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 43 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 44 | #define CONFIG_INITRD_TAG 1 |
| 45 | #define CONFIG_SERIAL_TAG 1 |
| 46 | #define CONFIG_REVISION_TAG 1 |
| 47 | #undef CONFIG_USE_IRQ /* don't need IRQ/FIQ stuff */ |
| 48 | |
| 49 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 50 | #define CONFIG_SKIP_RELOCATE_UBOOT |
| 51 | #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ |
| 52 | |
| 53 | #define CONFIG_ARCH_CPU_INIT |
| 54 | |
| 55 | /* |
| 56 | * Hardware drivers |
| 57 | */ |
| 58 | |
| 59 | /* Console output */ |
| 60 | #define CONFIG_ATMEL_USART 1 |
| 61 | #undef CONFIG_USART0 |
| 62 | #undef CONFIG_USART1 |
| 63 | #undef CONFIG_USART2 |
| 64 | #define CONFIG_USART3 1 /* USART 3 is DBGU */ |
| 65 | |
| 66 | #define CONFIG_BOOTDELAY 3 |
| 67 | #define CONFIG_ZERO_BOOTDELAY_CHECK 1 |
| 68 | |
| 69 | /* LCD */ |
| 70 | #define CONFIG_LCD 1 |
| 71 | #define LCD_BPP LCD_COLOR8 |
| 72 | |
| 73 | #undef CONFIG_SPLASH_SCREEN |
| 74 | |
| 75 | #ifndef CONFIG_SPLASH_SCREEN |
| 76 | #define CONFIG_LCD_LOGO 1 |
| 77 | #define CONFIG_LCD_INFO 1 |
| 78 | #undef CONFIG_LCD_INFO_BELOW_LOGO |
| 79 | #endif /* CONFIG_SPLASH_SCREEN */ |
| 80 | |
| 81 | #undef LCD_TEST_PATTERN |
| 82 | #define CONFIG_SYS_WHITE_ON_BLACK 1 |
| 83 | #define CONFIG_ATMEL_LCD 1 |
| 84 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 |
| 85 | #define CONFIG_OTC570_LCD_BASE 0x23E00000 /* LCD is in SDRAM */ |
| 86 | #define CONFIG_CMD_BMP 1 |
| 87 | |
| 88 | /* RTC and I2C stuff */ |
| 89 | #define CONFIG_RTC_DS1338 1 |
| 90 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 |
| 91 | #undef CONFIG_HARD_I2C |
| 92 | #define CONFIG_SOFT_I2C 1 |
| 93 | #define CONFIG_SYS_I2C_SPEED 100000 |
| 94 | #define CONFIG_SYS_I2C_SLAVE 0x7F |
| 95 | |
| 96 | #ifdef CONFIG_SOFT_I2C |
| 97 | #define CONFIG_I2C_CMD_TREE 1 |
| 98 | #define CONFIG_I2C_MULTI_BUS 1 |
| 99 | /* Enable peripheral clock and configure data and clock pins for pio */ |
| 100 | #define I2C_INIT { \ |
| 101 | at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOB | \ |
| 102 | 1 << AT91SAM9263_ID_PIOCDE); \ |
| 103 | at91_set_gpio_output(AT91_PIN_PB4, 0); \ |
| 104 | at91_set_gpio_output(AT91_PIN_PB5, 0); \ |
| 105 | } |
| 106 | /* Configure data pin as output */ |
| 107 | #define I2C_ACTIVE at91_set_gpio_output(AT91_PIN_PB4, 0) |
| 108 | /* Configure data pin as input */ |
| 109 | #define I2C_TRISTATE at91_set_gpio_input(AT91_PIN_PB4, 0) |
| 110 | /* Read data pin */ |
| 111 | #define I2C_READ at91_get_gpio_value(AT91_PIN_PB4) |
| 112 | /* Set data pin */ |
| 113 | #define I2C_SDA(bit) at91_set_gpio_value(AT91_PIN_PB4, bit) |
| 114 | /* Set clock pin */ |
| 115 | #define I2C_SCL(bit) at91_set_gpio_value(AT91_PIN_PB5, bit) |
| 116 | #define I2C_DELAY udelay(2) /* 1/4 I2C clock duration */ |
| 117 | #endif /* CONFIG_SOFT_I2C */ |
| 118 | |
| 119 | #define CONFIG_BOOTDELAY 3 |
| 120 | #define CONFIG_ZERO_BOOTDELAY_CHECK 1 |
| 121 | |
| 122 | /* |
| 123 | * BOOTP options |
| 124 | */ |
| 125 | #define CONFIG_BOOTP_BOOTFILESIZE 1 |
| 126 | #define CONFIG_BOOTP_BOOTPATH 1 |
| 127 | #define CONFIG_BOOTP_GATEWAY 1 |
| 128 | #define CONFIG_BOOTP_HOSTNAME 1 |
| 129 | |
| 130 | /* |
| 131 | * Command line configuration. |
| 132 | */ |
| 133 | #include <config_cmd_default.h> |
| 134 | #undef CONFIG_CMD_AUTOSCRIPT |
| 135 | #undef CONFIG_CMD_FPGA |
| 136 | #undef CONFIG_CMD_LOADS |
| 137 | #undef CONFIG_CMD_IMLS |
| 138 | |
| 139 | #define CONFIG_CMD_PING 1 |
| 140 | #define CONFIG_CMD_DHCP 1 |
| 141 | #define CONFIG_CMD_NAND 1 |
| 142 | #define CONFIG_CMD_USB 1 |
| 143 | #define CONFIG_CMD_I2C 1 |
| 144 | #define CONFIG_CMD_DATE 1 |
| 145 | |
| 146 | /* LED */ |
| 147 | #define CONFIG_AT91_LED 1 |
| 148 | |
| 149 | /* SDRAM */ |
| 150 | #define CONFIG_NR_DRAM_BANKS 1 |
| 151 | #define PHYS_SDRAM 0x20000000 |
| 152 | |
| 153 | /* DataFlash */ |
| 154 | #define CONFIG_ATMEL_DATAFLASH_SPI |
| 155 | #define CONFIG_HAS_DATAFLASH 1 |
| 156 | #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ) |
| 157 | #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 |
| 158 | #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ |
| 159 | #define AT91_SPI_CLK 15000000 |
| 160 | #define DATAFLASH_TCSS (0x1a << 16) |
| 161 | #define DATAFLASH_TCHS (0x1 << 24) |
| 162 | |
| 163 | /* NOR flash is not populated, disable it */ |
| 164 | #define CONFIG_SYS_NO_FLASH 1 |
| 165 | |
| 166 | /* NAND flash */ |
| 167 | #ifdef CONFIG_CMD_NAND |
| 168 | #define CONFIG_NAND_ATMEL |
| 169 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 170 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
| 171 | #define CONFIG_SYS_NAND_DBW_8 1 |
| 172 | /* our ALE is AD21 */ |
| 173 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 174 | /* our CLE is AD22 */ |
| 175 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
| 176 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 |
| 177 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 |
| 178 | #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ |
| 179 | #endif |
| 180 | |
| 181 | /* Ethernet */ |
| 182 | #define CONFIG_MACB 1 |
| 183 | #define CONFIG_RMII 1 |
| 184 | #define CONFIG_NET_MULTI 1 |
| 185 | #define CONFIG_NET_RETRY_COUNT 20 |
| 186 | #undef CONFIG_RESET_PHY_R |
| 187 | |
| 188 | /* USB */ |
| 189 | #define CONFIG_USB_ATMEL |
| 190 | #define CONFIG_USB_OHCI_NEW 1 |
| 191 | #define CONFIG_DOS_PARTITION 1 |
| 192 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
| 193 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00a00000 |
| 194 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263" |
| 195 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
| 196 | #define CONFIG_USB_STORAGE 1 |
| 197 | #define CONFIG_CMD_FAT 1 |
| 198 | |
| 199 | #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
| 200 | |
| 201 | #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM |
| 202 | #define CONFIG_SYS_MEMTEST_END 0x23e00000 |
| 203 | |
| 204 | #define CONFIG_SYS_USE_DATAFLASH 1 |
| 205 | #undef CONFIG_SYS_USE_NANDFLASH |
| 206 | |
| 207 | /* CAN */ |
| 208 | #define CONFIG_AT91_CAN 1 |
| 209 | |
| 210 | /* hw-controller addresses */ |
| 211 | #define CONFIG_ET1100_BASE 0x70000000 |
| 212 | |
| 213 | /* bootstrap + u-boot + env in dataflash on CS0 */ |
| 214 | #define CONFIG_ENV_IS_IN_DATAFLASH 1 |
| 215 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ |
| 216 | 0x8400) |
| 217 | #define CONFIG_ENV_OFFSET 0x4200 |
| 218 | #define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + \ |
| 219 | CONFIG_ENV_OFFSET) |
| 220 | #define CONFIG_ENV_SIZE 0x4200 |
| 221 | |
| 222 | #define CONFIG_BAUDRATE 115200 |
| 223 | #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } |
| 224 | |
| 225 | #define CONFIG_SYS_PROMPT "=> " |
| 226 | #define CONFIG_SYS_CBSIZE 256 |
| 227 | #define CONFIG_SYS_MAXARGS 16 |
| 228 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 229 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 230 | #define CONFIG_SYS_LONGHELP 1 |
| 231 | #define CONFIG_CMDLINE_EDITING 1 |
| 232 | |
| 233 | /* |
| 234 | * Size of malloc() pool |
| 235 | */ |
| 236 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + \ |
| 237 | 128*1024, 0x1000) |
| 238 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ |
| 239 | |
| 240 | #define CONFIG_STACKSIZE (32 * 1024) /* regular stack */ |
| 241 | |
| 242 | #ifdef CONFIG_USE_IRQ |
| 243 | #error CONFIG_USE_IRQ not supported |
| 244 | #endif |
| 245 | |
| 246 | #endif |