maxims@google.com | daea6d4 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 1 | menu "Watchdog Timer Support" |
Ye Li | 62862b6 | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 2 | |
Shreenidhi Shedi | 0787c7c | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 3 | config WATCHDOG |
| 4 | bool "Enable U-Boot watchdog reset" |
Christophe Leroy | 9a5760e | 2020-02-26 16:17:52 +0000 | [diff] [blame] | 5 | depends on !HW_WATCHDOG |
Stefan Roese | cce2472 | 2022-08-18 13:22:46 +0200 | [diff] [blame] | 6 | select CYCLIC |
Shreenidhi Shedi | 0787c7c | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 7 | help |
| 8 | This option enables U-Boot watchdog support where U-Boot is using |
| 9 | watchdog_reset function to service watchdog device in U-Boot. Enable |
| 10 | this option if you want to service enabled watchdog by U-Boot. Disable |
| 11 | this option if you want U-Boot to start watchdog but never service it. |
| 12 | |
Pali Rohár | f698a77 | 2021-03-09 14:26:56 +0100 | [diff] [blame] | 13 | config WATCHDOG_AUTOSTART |
| 14 | bool "Automatically start watchdog timer" |
| 15 | depends on WDT |
Heinrich Schuchardt | 150528f | 2021-11-05 19:34:31 +0100 | [diff] [blame] | 16 | default n if ARCH_SUNXI |
Pali Rohár | f698a77 | 2021-03-09 14:26:56 +0100 | [diff] [blame] | 17 | default y |
| 18 | help |
| 19 | Automatically start watchdog timer and start servicing it during |
| 20 | init phase. Enabled by default. Disable this option if you want |
| 21 | to compile U-Boot with CONFIG_WDT support but do not want to |
| 22 | activate watchdog, like when CONFIG_WDT option is disabled. You |
| 23 | would be able to start watchdog manually by 'wdt' command. Useful |
| 24 | when you want to have support for 'wdt' command but do not want |
| 25 | to have watchdog enabled by default. |
| 26 | |
Heiko Schocher | f409f1a | 2019-09-30 09:33:43 +0200 | [diff] [blame] | 27 | config WATCHDOG_TIMEOUT_MSECS |
| 28 | int "Watchdog timeout in msec" |
Tom Rini | eac76b8 | 2021-09-09 07:54:50 -0400 | [diff] [blame] | 29 | default 128000 if ARCH_MX31 || ARCH_MX5 || ARCH_MX6 |
Heiko Schocher | f409f1a | 2019-09-30 09:33:43 +0200 | [diff] [blame] | 30 | default 128000 if ARCH_MX7 || ARCH_VF610 |
| 31 | default 30000 if ARCH_SOCFPGA |
Samuel Holland | 65c982b | 2021-08-22 13:53:27 -0500 | [diff] [blame] | 32 | default 16000 if ARCH_SUNXI |
Tom Rini | 0ab49a1 | 2023-01-10 11:19:44 -0500 | [diff] [blame] | 33 | default 5376 if ULP_WATCHDOG |
ETIENNE DUBLE | 73a6e70 | 2023-01-25 10:57:28 +0100 | [diff] [blame] | 34 | default 15000 if ARCH_BCM283X |
Heiko Schocher | f409f1a | 2019-09-30 09:33:43 +0200 | [diff] [blame] | 35 | default 60000 |
| 36 | help |
| 37 | Watchdog timeout in msec |
| 38 | |
Paolo Pisati | 6213c55 | 2017-02-10 17:28:05 +0100 | [diff] [blame] | 39 | config HW_WATCHDOG |
| 40 | bool |
| 41 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 42 | config IMX_WATCHDOG |
| 43 | bool "Enable Watchdog Timer support for IMX and LSCH2 of NXP" |
Marek Vasut | f7fc5c1 | 2019-06-09 03:46:22 +0200 | [diff] [blame] | 44 | select HW_WATCHDOG if !WDT |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 45 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 46 | Select this to enable the IMX and LSCH2 of Layerscape watchdog |
| 47 | driver. |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 48 | |
Michael Walle | b9c72d0 | 2020-09-24 10:09:15 +0200 | [diff] [blame] | 49 | config WATCHDOG_RESET_DISABLE |
| 50 | bool "Disable reset watchdog" |
| 51 | depends on IMX_WATCHDOG |
| 52 | help |
| 53 | Disable reset watchdog, which can let WATCHDOG_RESET invalid, so |
| 54 | that the watchdog will not be fed in u-boot. |
| 55 | |
Tom Rini | 4a3e798 | 2017-05-12 22:33:24 -0400 | [diff] [blame] | 56 | config OMAP_WATCHDOG |
| 57 | bool "TI OMAP watchdog driver" |
| 58 | depends on ARCH_OMAP2PLUS |
| 59 | select HW_WATCHDOG |
Tom Rini | 4a3e798 | 2017-05-12 22:33:24 -0400 | [diff] [blame] | 60 | help |
| 61 | Say Y here to enable the OMAP3+ watchdog driver. |
Felipe Balbi | 24252da | 2017-07-05 20:33:20 +0300 | [diff] [blame] | 62 | |
Ye Li | 62862b6 | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 63 | config ULP_WATCHDOG |
| 64 | bool "i.MX7ULP watchdog" |
| 65 | help |
| 66 | Say Y here to enable i.MX7ULP watchdog driver. |
| 67 | |
Marek Vasut | 40919d9 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 68 | config DESIGNWARE_WATCHDOG |
| 69 | bool "Designware watchdog timer support" |
Tom Rini | b5eb2fe | 2022-06-15 12:03:46 -0400 | [diff] [blame] | 70 | depends on WDT |
| 71 | default y if ROCKCHIP_RK3399 |
Marek Vasut | 40919d9 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 72 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 73 | Enable this to support Designware Watchdog Timer IP, present e.g. |
| 74 | on Altera SoCFPGA SoCs. |
Marek Vasut | 40919d9 | 2019-06-27 00:26:34 +0200 | [diff] [blame] | 75 | |
maxims@google.com | daea6d4 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 76 | config WDT |
| 77 | bool "Enable driver model for watchdog timer drivers" |
| 78 | depends on DM |
Stefan Roese | 502acb0 | 2019-04-11 15:58:44 +0200 | [diff] [blame] | 79 | imply WATCHDOG |
Stefan Roese | cce2472 | 2022-08-18 13:22:46 +0200 | [diff] [blame] | 80 | select CYCLIC |
maxims@google.com | daea6d4 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 81 | help |
| 82 | Enable driver model for watchdog timer. At the moment the API |
| 83 | is very simple and only supports four operations: |
Patrice Chotard | 0a06024 | 2019-04-25 12:57:28 +0200 | [diff] [blame] | 84 | start, stop, reset and expire_now (expire immediately). |
maxims@google.com | daea6d4 | 2017-04-17 12:00:21 -0700 | [diff] [blame] | 85 | What exactly happens when the timer expires is up to a particular |
| 86 | device/driver. |
| 87 | |
Mark Kettenis | 7e8c6dd | 2022-01-12 19:55:15 +0100 | [diff] [blame] | 88 | config WDT_APPLE |
| 89 | bool "Apple watchdog timer support" |
| 90 | depends on WDT |
| 91 | default y if ARCH_APPLE |
| 92 | help |
| 93 | Enable support for the watchdog timer on Apple SoCs. |
| 94 | The watchdog will perform a full SoC reset resulting in a |
| 95 | reboot of the entire system. |
| 96 | |
Marek Behún | a86b97d | 2018-04-24 17:21:30 +0200 | [diff] [blame] | 97 | config WDT_ARMADA_37XX |
| 98 | bool "Marvell Armada 37xx watchdog timer support" |
| 99 | depends on WDT && ARMADA_3700 |
| 100 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 101 | Enable this to support Watchdog Timer on Marvell Armada 37xx SoC. |
| 102 | There are 4 possible clocks which can be used on these SoCs. This |
| 103 | driver uses the second clock (ID 1), assuming that so will also |
| 104 | Linux's driver. |
Marek Behún | a86b97d | 2018-04-24 17:21:30 +0200 | [diff] [blame] | 105 | |
maxims@google.com | df35df2 | 2017-04-17 12:00:22 -0700 | [diff] [blame] | 106 | config WDT_ASPEED |
| 107 | bool "Aspeed ast2400/ast2500 watchdog timer support" |
| 108 | depends on WDT |
| 109 | default y if ARCH_ASPEED |
| 110 | help |
| 111 | Select this to enable watchdog timer for Aspeed ast2500/ast2400 devices. |
| 112 | The watchdog timer is stopped when initialized. It performs reset, either |
| 113 | full SoC reset or CPU or just some peripherals, based on the flags. |
| 114 | It currently does not support Boot Flash Addressing Mode Detection or |
| 115 | Second Boot. |
| 116 | |
Chia-Wei, Wang | 67ef587 | 2020-12-14 13:54:25 +0800 | [diff] [blame] | 117 | config WDT_AST2600 |
| 118 | bool "Aspeed AST2600 watchdog timer support" |
| 119 | depends on WDT |
| 120 | default y if ASPEED_AST2600 |
| 121 | help |
| 122 | Select this to enable watchdog timer for Aspeed ast2500/ast2400 devices. |
| 123 | The watchdog timer is stopped when initialized. It performs reset, either |
| 124 | full SoC reset or CPU or just some peripherals, based on the flags. |
| 125 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 126 | config WDT_AT91 |
| 127 | bool "AT91 watchdog timer support" |
| 128 | depends on WDT |
| 129 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 130 | Select this to enable Microchip watchdog timer, which can be found on |
| 131 | some AT91 devices. |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 132 | |
Álvaro Fernández Rojas | d8759a5 | 2017-05-16 18:29:09 +0200 | [diff] [blame] | 133 | config WDT_BCM6345 |
| 134 | bool "BCM6345 watchdog timer support" |
William Zhang | df0b5bb | 2022-08-22 11:31:43 -0700 | [diff] [blame] | 135 | depends on WDT && (ARCH_BMIPS || BCM6856 || \ |
William Zhang | 3892182 | 2022-08-22 11:49:08 -0700 | [diff] [blame] | 136 | BCM6858 || BCM63158 || BCM6855) |
Álvaro Fernández Rojas | d8759a5 | 2017-05-16 18:29:09 +0200 | [diff] [blame] | 137 | help |
| 138 | Select this to enable watchdog timer for BCM6345 SoCs. |
| 139 | The watchdog timer is stopped when initialized. |
| 140 | It performs full SoC reset. |
| 141 | |
Chris Packham | 69a430f | 2021-03-05 16:32:58 +1300 | [diff] [blame] | 142 | config WDT_BOOKE |
| 143 | bool "PowerPC Book-E watchdog driver" |
| 144 | depends on WDT && MPC85xx |
| 145 | help |
| 146 | Watchdog driver for PowerPC Book-E chips, such as the Freescale |
| 147 | MPC85xx SOCs and the IBM PowerPC 440. |
| 148 | |
Shreenidhi Shedi | 0787c7c | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 149 | config WDT_CDNS |
| 150 | bool "Cadence watchdog timer support" |
| 151 | depends on WDT |
| 152 | imply WATCHDOG |
| 153 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 154 | Select this to enable Cadence watchdog timer, which can be found on some |
| 155 | Xilinx Microzed Platform. |
Shreenidhi Shedi | 0787c7c | 2018-02-21 16:50:20 +0100 | [diff] [blame] | 156 | |
Jason Li | dd2b30b | 2020-01-30 12:34:57 -0800 | [diff] [blame] | 157 | config WDT_CORTINA |
| 158 | bool "Cortina Access CAxxxx watchdog timer support" |
| 159 | depends on WDT |
| 160 | help |
| 161 | Cortina Access CAxxxx watchdog timer support. |
| 162 | This driver support all CPU ISAs supported by Cortina |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 163 | Access CAxxxx SoCs. |
Jason Li | dd2b30b | 2020-01-30 12:34:57 -0800 | [diff] [blame] | 164 | |
Rasmus Villemoes | 0866760 | 2021-08-19 11:57:04 +0200 | [diff] [blame] | 165 | config WDT_GPIO |
| 166 | bool "External gpio watchdog support" |
| 167 | depends on WDT |
| 168 | depends on DM_GPIO |
| 169 | help |
| 170 | Support for external watchdog fed by toggling a gpio. See |
| 171 | doc/device-tree-bindings/watchdog/gpio-wdt.txt for |
| 172 | information on how to describe the watchdog in device tree. |
| 173 | |
Pali Rohár | b93e8ea | 2022-05-02 18:41:07 +0200 | [diff] [blame] | 174 | config WDT_MAX6370 |
| 175 | bool "MAX6370 watchdog timer support" |
| 176 | depends on WDT |
| 177 | select DM_GPIO |
| 178 | help |
| 179 | Select this to enable max6370 watchdog timer. |
| 180 | |
Philippe Boos | 35de0c5 | 2022-06-13 16:00:56 +0200 | [diff] [blame] | 181 | config WDT_MESON_GXBB |
| 182 | bool "Amlogic watchdog timer support" |
| 183 | depends on WDT |
| 184 | help |
| 185 | Select this to enable Meson watchdog timer, |
| 186 | which can be found on some Amlogic platforms. |
| 187 | |
Christophe Leroy | 1919fce | 2023-04-03 10:27:39 +0200 | [diff] [blame] | 188 | config WDT_MPC8xxx |
| 189 | bool "MPC8xxx watchdog timer support" |
Christophe Leroy | 39d3795 | 2023-04-03 10:39:59 +0200 | [diff] [blame] | 190 | depends on WDT && (MPC8xx || MPC83xx) |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 191 | help |
Christophe Leroy | 1919fce | 2023-04-03 10:27:39 +0200 | [diff] [blame] | 192 | Select this to enable mpc8xxx watchdog timer |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 193 | |
Christophe Leroy | 0fe1a20 | 2023-04-03 10:27:39 +0200 | [diff] [blame] | 194 | config WDT_MPC8xxx_BME |
| 195 | bool "Enable MPC8xx Bus Monitoring" |
| 196 | depends on WDT_MPC8xxx && MPC8xx |
| 197 | help |
| 198 | Select this to enable mpc8xx Bus Monitor. |
| 199 | |
| 200 | config WDT_MPC8xxx_BMT |
| 201 | int "MPC8xx Bus Monitor Timing" if WDT_MPC8xxx_BME |
| 202 | range 0 255 |
| 203 | default 255 |
| 204 | depends on WDT_MPC8xxx |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 205 | help |
Christophe Leroy | 0fe1a20 | 2023-04-03 10:27:39 +0200 | [diff] [blame] | 206 | Bus monitor timing. Defines the timeout period, in 8 system clock |
| 207 | resolution, for the bus monitor. |
| 208 | |
| 209 | Maximum timeout is 2,040 clocks (255 x 8). |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 210 | |
developer | 33a3bc9 | 2020-11-12 16:36:28 +0800 | [diff] [blame] | 211 | config WDT_MT7620 |
| 212 | bool "MediaTek MT7620 watchdog timer support" |
| 213 | depends on WDT && SOC_MT7620 |
| 214 | help |
| 215 | Select this to enable watchdog timer on MediaTek MT7620 and earlier |
| 216 | SoC chips. |
| 217 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 218 | config WDT_MT7621 |
| 219 | bool "MediaTek MT7621 watchdog timer support" |
developer | cf569c0 | 2022-05-20 11:23:19 +0800 | [diff] [blame] | 220 | depends on WDT && (SOC_MT7621 || SOC_MT7628) |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 221 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 222 | Select this to enable Ralink / Mediatek watchdog timer, |
| 223 | which can be found on some MediaTek chips. |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 224 | |
developer | 93053be | 2018-11-15 10:07:57 +0800 | [diff] [blame] | 225 | config WDT_MTK |
| 226 | bool "MediaTek watchdog timer support" |
| 227 | depends on WDT && ARCH_MEDIATEK |
| 228 | help |
| 229 | Select this to enable watchdog timer for MediaTek SoCs. |
| 230 | The watchdog timer is stopped when initialized. |
| 231 | It performs full SoC reset. |
| 232 | |
Jim Liu | fc166b0 | 2022-04-01 17:59:39 +0800 | [diff] [blame] | 233 | config WDT_NPCM |
| 234 | bool "Nuvoton watchdog timer support" |
| 235 | depends on WDT && ARCH_NPCM |
| 236 | help |
| 237 | This enables Nuvoton npcm7xx/npcm8xx watchdog timer driver, |
| 238 | The watchdog timer is stopped when initialized. |
| 239 | It performs full SoC reset. |
| 240 | |
Suneel Garapati | 7072b17 | 2019-10-21 16:09:36 -0700 | [diff] [blame] | 241 | config WDT_OCTEONTX |
Stefan Roese | af3b210 | 2022-05-11 09:08:47 +0200 | [diff] [blame] | 242 | bool "Octeon core watchdog support" |
| 243 | depends on WDT && (ARCH_OCTEON || ARCH_OCTEONTX || ARCH_OCTEONTX2) |
Suneel Garapati | 7072b17 | 2019-10-21 16:09:36 -0700 | [diff] [blame] | 244 | default y |
| 245 | imply WATCHDOG |
| 246 | help |
Stefan Roese | af3b210 | 2022-05-11 09:08:47 +0200 | [diff] [blame] | 247 | This enables the Octeon watchdog driver, which can be found on |
| 248 | various Octeon parts such as Octeon II/III and OcteonTX/TX2. |
Suneel Garapati | 7072b17 | 2019-10-21 16:09:36 -0700 | [diff] [blame] | 249 | |
Suniel Mahesh | 1c783ab | 2019-07-31 21:54:06 +0530 | [diff] [blame] | 250 | config WDT_OMAP3 |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 251 | bool "TI OMAP watchdog timer support" |
| 252 | depends on WDT && ARCH_OMAP2PLUS |
| 253 | default y if AM33XX |
| 254 | help |
Suniel Mahesh | 1c783ab | 2019-07-31 21:54:06 +0530 | [diff] [blame] | 255 | This enables OMAP3+ watchdog timer driver, which can be |
| 256 | found on some TI chipsets and inline with driver model. |
| 257 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 258 | config WDT_ORION |
| 259 | bool "Orion watchdog timer support" |
Shreenidhi Shedi | 335fb5b | 2018-07-15 02:05:41 +0530 | [diff] [blame] | 260 | depends on WDT |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 261 | select CLK |
Shreenidhi Shedi | 335fb5b | 2018-07-15 02:05:41 +0530 | [diff] [blame] | 262 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 263 | Select this to enable Orion watchdog timer, which can be found on some |
| 264 | Marvell Armada chips. |
Shreenidhi Shedi | 335fb5b | 2018-07-15 02:05:41 +0530 | [diff] [blame] | 265 | |
Jan Kiszka | ddf21d5 | 2020-06-23 13:15:08 +0200 | [diff] [blame] | 266 | config WDT_K3_RTI |
| 267 | bool "Texas Instruments K3 RTI watchdog" |
| 268 | depends on WDT && ARCH_K3 |
| 269 | help |
| 270 | Say Y here if you want to include support for the K3 watchdog |
| 271 | timer (RTI module) available in the K3 generation of processors. |
| 272 | |
Jan Kiszka | d35cdfb | 2021-09-18 08:17:55 +0200 | [diff] [blame] | 273 | if WDT_K3_RTI |
| 274 | |
| 275 | config WDT_K3_RTI_LOAD_FW |
| 276 | bool "Load watchdog firmware" |
| 277 | depends on REMOTEPROC |
| 278 | help |
| 279 | Automatically load the specified firmware image into the MCU R5F |
| 280 | core 0. On the AM65x, this firmware is supposed to handle the expiry |
| 281 | of the watchdog timer, typically by resetting the system. |
| 282 | |
| 283 | config WDT_K3_RTI_FW_FILE |
| 284 | string "Watchdog firmware image file" |
| 285 | default "k3-rti-wdt.fw" |
| 286 | depends on WDT_K3_RTI_LOAD_FW |
| 287 | help |
| 288 | Firmware image to be embedded into U-Boot and loaded on watchdog |
| 289 | start. |
| 290 | |
| 291 | endif |
| 292 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 293 | config WDT_SANDBOX |
| 294 | bool "Enable Watchdog Timer support for Sandbox" |
| 295 | depends on SANDBOX && WDT |
Xiaoliang Yang | 4161dc2 | 2018-10-18 17:14:19 +0800 | [diff] [blame] | 296 | help |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 297 | Enable Watchdog Timer support in Sandbox. This is a dummy device that |
| 298 | can be probed and supports all of the methods of WDT, but does not |
| 299 | really do anything. |
Xiaoliang Yang | 4161dc2 | 2018-10-18 17:14:19 +0800 | [diff] [blame] | 300 | |
Rasmus Villemoes | ae400f3 | 2022-09-27 11:54:04 +0200 | [diff] [blame] | 301 | config WDT_ALARM_SANDBOX |
| 302 | bool "Enable SIGALRM-based Watchdog Timer support for Sandbox" |
| 303 | depends on SANDBOX && WDT |
| 304 | help |
| 305 | Enable support for a SIGALRM-based watchdog timer in Sandbox. This is |
| 306 | a watchdog device based on the host OS' alarm() function, which will |
| 307 | kill the sandbox with SIGALRM unless properly maintained. |
| 308 | |
Zhao Qiang | fb816fa | 2020-07-10 16:55:18 +0800 | [diff] [blame] | 309 | config WDT_SBSA |
| 310 | bool "SBSA watchdog timer support" |
| 311 | depends on WDT |
| 312 | help |
| 313 | Select this to enable SBSA watchdog timer. |
| 314 | This driver can operate ARM SBSA Generic Watchdog as a single stage. |
| 315 | In the single stage mode, when the timeout is reached, your system |
| 316 | will be reset by WS1. The first signal (WS0) is ignored. |
| 317 | |
Michael Walle | fa84201 | 2021-11-15 23:45:43 +0100 | [diff] [blame] | 318 | config WDT_SL28CPLD |
| 319 | bool "sl28cpld watchdog timer support" |
| 320 | depends on WDT && SL28CPLD |
| 321 | help |
| 322 | Enable support for the watchdog timer in the Kontron sl28cpld |
| 323 | management controller. |
| 324 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 325 | config WDT_SP805 |
| 326 | bool "SP805 watchdog timer support" |
Prasanthi Chellakumar | 0509c4e | 2018-10-09 11:46:40 -0700 | [diff] [blame] | 327 | depends on WDT |
| 328 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 329 | Select this to enable SP805 watchdog timer, which can be found on some |
| 330 | nxp layerscape chips. |
Stefan Roese | 8456969 | 2018-10-04 13:39:07 +0200 | [diff] [blame] | 331 | |
Patrice Chotard | 473b244 | 2019-04-30 17:26:22 +0200 | [diff] [blame] | 332 | config WDT_STM32MP |
| 333 | bool "IWDG watchdog driver for STM32 MP's family" |
| 334 | depends on WDT |
| 335 | imply WATCHDOG |
| 336 | help |
| 337 | Enable the STM32 watchdog (IWDG) driver. Enable support to |
| 338 | configure STM32's on-SoC watchdog. |
| 339 | |
Samuel Holland | 65c982b | 2021-08-22 13:53:27 -0500 | [diff] [blame] | 340 | config WDT_SUNXI |
| 341 | bool "Allwinner sunxi watchdog timer support" |
| 342 | depends on WDT && ARCH_SUNXI |
| 343 | default y |
| 344 | help |
| 345 | Enable support for the watchdog timer in Allwinner sunxi SoCs. |
| 346 | |
ETIENNE DUBLE | 73a6e70 | 2023-01-25 10:57:28 +0100 | [diff] [blame] | 347 | config WDT_BCM2835 |
| 348 | bool "Broadcom 2835 watchdog timer support" |
| 349 | depends on WDT && ARCH_BCM283X |
| 350 | default y |
| 351 | help |
| 352 | Enable support for the watchdog timer in Broadcom 283X SoCs such |
| 353 | as Raspberry Pi boards. |
| 354 | |
Patrice Chotard | 4a0ae73 | 2019-04-30 17:26:20 +0200 | [diff] [blame] | 355 | config XILINX_TB_WATCHDOG |
| 356 | bool "Xilinx Axi watchdog timer support" |
| 357 | depends on WDT |
| 358 | imply WATCHDOG |
Christophe Leroy | 4015930 | 2018-11-21 08:51:45 +0000 | [diff] [blame] | 359 | help |
Michal Simek | 5288b9b | 2020-03-11 12:26:53 +0100 | [diff] [blame] | 360 | Select this to enable Xilinx Axi watchdog timer, which can be found on some |
| 361 | Xilinx Microblaze Platforms. |
Christophe Leroy | 4015930 | 2018-11-21 08:51:45 +0000 | [diff] [blame] | 362 | |
Ashok Reddy Soma | f4aecf4 | 2020-03-11 03:06:04 -0600 | [diff] [blame] | 363 | config WDT_XILINX |
| 364 | bool "Xilinx window watchdog timer support" |
| 365 | depends on WDT && ARCH_VERSAL |
| 366 | select REGMAP |
| 367 | imply WATCHDOG |
| 368 | help |
| 369 | Select this to enable Xilinx window watchdog timer, which can be found on |
| 370 | Xilinx Versal Platforms. |
| 371 | |
Andy Shevchenko | d13a8a3 | 2019-06-21 13:28:08 +0300 | [diff] [blame] | 372 | config WDT_TANGIER |
| 373 | bool "Intel Tangier watchdog timer support" |
| 374 | depends on WDT && INTEL_MID |
| 375 | help |
| 376 | This enables support for watchdog controller available on |
| 377 | Intel Tangier SoC. If you're using a board with Intel Tangier |
| 378 | SoC, say Y here. |
| 379 | |
Lionel Debieve | 47e022c | 2023-04-14 15:49:15 +0200 | [diff] [blame] | 380 | config WDT_ARM_SMC |
| 381 | bool "ARM SMC watchdog timer support" |
| 382 | depends on WDT && ARM_SMCCC |
| 383 | imply WATCHDOG |
| 384 | help |
| 385 | Select this to enable Arm SMC watchdog timer. This watchdog will manage |
| 386 | a watchdog based on ARM SMCCC communication. |
| 387 | |
Marek Vasut | 55ec91b | 2019-06-09 03:46:21 +0200 | [diff] [blame] | 388 | config SPL_WDT |
| 389 | bool "Enable driver model for watchdog timer drivers in SPL" |
| 390 | depends on SPL_DM |
| 391 | help |
| 392 | Enable driver model for watchdog timer in SPL. |
| 393 | This is similar to CONFIG_WDT in U-Boot. |
| 394 | |
Sergei Antonov | a0d9860 | 2023-04-12 14:01:58 +0300 | [diff] [blame] | 395 | config WDT_FTWDT010 |
| 396 | bool "Faraday Technology ftwdt010 watchdog timer support" |
| 397 | depends on WDT |
| 398 | imply WATCHDOG |
| 399 | help |
| 400 | Faraday Technology ftwdt010 watchdog is an architecture independent |
| 401 | watchdog. It is usually used in SoC chip design. |
Ye Li | 62862b6 | 2017-02-22 16:21:48 +0800 | [diff] [blame] | 402 | endmenu |