Tom Rini | 8b0c8a1 | 2018-05-06 18:27:01 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2018, STMicroelectronics - All Rights Reserved |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 4 | */ |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 5 | |
| 6 | #define LOG_CATEGORY LOGC_BOARD |
| 7 | |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 8 | #include <common.h> |
| 9 | #include <adc.h> |
Patrick Delaunay | 500401f | 2019-06-21 15:26:40 +0200 | [diff] [blame] | 10 | #include <bootm.h> |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 11 | #include <clk.h> |
Patrick Delaunay | 266bf10 | 2019-07-30 19:16:44 +0200 | [diff] [blame] | 12 | #include <config.h> |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 13 | #include <dm.h> |
Sughosh Ganu | e166b5e | 2022-10-21 18:15:58 +0530 | [diff] [blame] | 14 | #include <efi_loader.h> |
Simon Glass | db22961 | 2019-08-01 09:46:42 -0600 | [diff] [blame] | 15 | #include <env.h> |
Simon Glass | 9d1f619 | 2019-08-02 09:44:25 -0600 | [diff] [blame] | 16 | #include <env_internal.h> |
Patrick Delaunay | 028fddd | 2021-11-15 16:32:23 +0100 | [diff] [blame] | 17 | #include <fdt_simplefb.h> |
Simon Glass | 2dc9c34 | 2020-05-10 11:40:01 -0600 | [diff] [blame] | 18 | #include <fdt_support.h> |
Patrick Delaunay | 58bc0cd | 2019-03-29 15:42:23 +0100 | [diff] [blame] | 19 | #include <g_dnl.h> |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 20 | #include <generic-phy.h> |
Simon Glass | f11478f | 2019-12-28 10:45:07 -0700 | [diff] [blame] | 21 | #include <hang.h> |
Patrick Delaunay | 7f3384d | 2019-03-29 15:42:24 +0100 | [diff] [blame] | 22 | #include <i2c.h> |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 23 | #include <init.h> |
Patrick Delaunay | 92dc102 | 2019-02-12 11:44:41 +0100 | [diff] [blame] | 24 | #include <led.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 25 | #include <log.h> |
Simon Glass | 9bc1564 | 2020-02-03 07:36:16 -0700 | [diff] [blame] | 26 | #include <malloc.h> |
Patrick Delaunay | 92dc102 | 2019-02-12 11:44:41 +0100 | [diff] [blame] | 27 | #include <misc.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 28 | #include <net.h> |
Patrick Delaunay | bff66f9 | 2019-08-01 11:29:03 +0200 | [diff] [blame] | 29 | #include <netdev.h> |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 30 | #include <phy.h> |
Patrick Delaunay | c17d725 | 2019-08-02 15:07:20 +0200 | [diff] [blame] | 31 | #include <remoteproc.h> |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 32 | #include <reset.h> |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 33 | #include <syscon.h> |
Patrick Delaunay | 7f3384d | 2019-03-29 15:42:24 +0100 | [diff] [blame] | 34 | #include <usb.h> |
Patrick Delaunay | ae0931d0 | 2019-07-30 19:16:39 +0200 | [diff] [blame] | 35 | #include <watchdog.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 36 | #include <asm/global_data.h> |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 37 | #include <asm/io.h> |
Patrick Delaunay | f2a7b87 | 2019-02-27 17:01:18 +0100 | [diff] [blame] | 38 | #include <asm/gpio.h> |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 39 | #include <asm/arch/stm32.h> |
Patrice Chotard | dad97bf | 2019-05-02 18:36:01 +0200 | [diff] [blame] | 40 | #include <asm/arch/sys_proto.h> |
Simon Glass | 0034d96 | 2021-08-07 07:24:01 -0600 | [diff] [blame] | 41 | #include <dm/ofnode.h> |
Patrick Delaunay | de98cbf | 2019-07-02 13:26:07 +0200 | [diff] [blame] | 42 | #include <jffs2/load_kernel.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 43 | #include <linux/bitops.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 44 | #include <linux/delay.h> |
Simon Glass | d66c5f7 | 2020-02-03 07:36:15 -0700 | [diff] [blame] | 45 | #include <linux/err.h> |
Patrick Delaunay | 181298e | 2020-04-22 14:29:16 +0200 | [diff] [blame] | 46 | #include <linux/iopoll.h> |
Simon Glass | bdd5f81 | 2023-09-14 18:21:46 -0600 | [diff] [blame] | 47 | #include <linux/printk.h> |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 48 | #include <power/regulator.h> |
Patrick Delaunay | 7f3384d | 2019-03-29 15:42:24 +0100 | [diff] [blame] | 49 | #include <usb/dwc2_udc.h> |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 50 | |
Patrick Delaunay | fcb6b0b | 2020-06-29 10:34:06 +0200 | [diff] [blame] | 51 | #include "../../st/common/stusb160x.h" |
| 52 | |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 53 | /* SYSCFG registers */ |
| 54 | #define SYSCFG_BOOTR 0x00 |
| 55 | #define SYSCFG_PMCSETR 0x04 |
| 56 | #define SYSCFG_IOCTRLSETR 0x18 |
| 57 | #define SYSCFG_ICNR 0x1C |
| 58 | #define SYSCFG_CMPCR 0x20 |
| 59 | #define SYSCFG_CMPENSETR 0x24 |
| 60 | #define SYSCFG_PMCCLRR 0x44 |
| 61 | |
| 62 | #define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0) |
| 63 | #define SYSCFG_BOOTR_BOOTPD_SHIFT 4 |
| 64 | |
| 65 | #define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0) |
| 66 | #define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1) |
| 67 | #define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2) |
| 68 | #define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3) |
| 69 | #define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4) |
| 70 | |
| 71 | #define SYSCFG_CMPCR_SW_CTRL BIT(1) |
| 72 | #define SYSCFG_CMPCR_READY BIT(8) |
| 73 | |
| 74 | #define SYSCFG_CMPENSETR_MPU_EN BIT(0) |
| 75 | |
| 76 | #define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16) |
| 77 | #define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17) |
| 78 | |
| 79 | #define SYSCFG_PMCSETR_ETH_SELMII BIT(20) |
| 80 | |
| 81 | #define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21) |
Christophe Roullier | 69ac3f5 | 2019-05-17 15:08:43 +0200 | [diff] [blame] | 82 | #define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0 |
| 83 | #define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21) |
| 84 | #define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23) |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 85 | |
Patrice Chotard | cded32f | 2019-04-30 18:09:38 +0200 | [diff] [blame] | 86 | #define USB_LOW_THRESHOLD_UV 200000 |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 87 | #define USB_WARNING_LOW_THRESHOLD_UV 660000 |
| 88 | #define USB_START_LOW_THRESHOLD_UV 1230000 |
Patrice Chotard | cded32f | 2019-04-30 18:09:38 +0200 | [diff] [blame] | 89 | #define USB_START_HIGH_THRESHOLD_UV 2150000 |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 90 | |
Simon Glass | b819621 | 2023-02-05 15:39:42 -0700 | [diff] [blame] | 91 | #if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) |
Sughosh Ganu | e166b5e | 2022-10-21 18:15:58 +0530 | [diff] [blame] | 92 | struct efi_fw_image fw_images[1]; |
| 93 | |
| 94 | struct efi_capsule_update_info update_info = { |
Masahisa Kojima | 5d2438b | 2023-06-07 14:41:51 +0900 | [diff] [blame] | 95 | .num_images = ARRAY_SIZE(fw_images), |
Sughosh Ganu | e166b5e | 2022-10-21 18:15:58 +0530 | [diff] [blame] | 96 | .images = fw_images, |
| 97 | }; |
| 98 | |
Sughosh Ganu | e166b5e | 2022-10-21 18:15:58 +0530 | [diff] [blame] | 99 | #endif /* EFI_HAVE_CAPSULE_SUPPORT */ |
| 100 | |
Patrick Delaunay | f2f25c3 | 2020-05-25 12:19:46 +0200 | [diff] [blame] | 101 | int board_early_init_f(void) |
| 102 | { |
| 103 | /* nothing to do, only used in SPL */ |
| 104 | return 0; |
| 105 | } |
| 106 | |
Patrick Delaunay | 92dc102 | 2019-02-12 11:44:41 +0100 | [diff] [blame] | 107 | int checkboard(void) |
| 108 | { |
| 109 | int ret; |
| 110 | char *mode; |
| 111 | u32 otp; |
| 112 | struct udevice *dev; |
| 113 | const char *fdt_compat; |
| 114 | int fdt_compat_len; |
| 115 | |
Patrick Delaunay | ba4b8b0 | 2021-07-26 11:21:34 +0200 | [diff] [blame] | 116 | if (IS_ENABLED(CONFIG_TFABOOT)) { |
Patrick Delaunay | 4c6fcbc | 2024-01-15 15:05:57 +0100 | [diff] [blame] | 117 | if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE)) |
Patrick Delaunay | ba4b8b0 | 2021-07-26 11:21:34 +0200 | [diff] [blame] | 118 | mode = "trusted - stm32image"; |
| 119 | else |
| 120 | mode = "trusted"; |
| 121 | } else { |
Patrick Delaunay | 92dc102 | 2019-02-12 11:44:41 +0100 | [diff] [blame] | 122 | mode = "basic"; |
Patrick Delaunay | ba4b8b0 | 2021-07-26 11:21:34 +0200 | [diff] [blame] | 123 | } |
Patrick Delaunay | 92dc102 | 2019-02-12 11:44:41 +0100 | [diff] [blame] | 124 | |
Patrick Delaunay | 4e506b0 | 2022-05-19 09:07:29 +0200 | [diff] [blame] | 125 | fdt_compat = ofnode_get_property(ofnode_root(), "compatible", |
| 126 | &fdt_compat_len); |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 127 | |
| 128 | log_info("Board: stm32mp1 in %s mode (%s)\n", mode, |
| 129 | fdt_compat && fdt_compat_len ? fdt_compat : ""); |
Patrick Delaunay | 92dc102 | 2019-02-12 11:44:41 +0100 | [diff] [blame] | 130 | |
Patrick Delaunay | 52163d9 | 2020-03-24 09:05:00 +0100 | [diff] [blame] | 131 | /* display the STMicroelectronics board identification */ |
Simon Glass | d87b83e | 2023-02-05 15:36:43 -0700 | [diff] [blame] | 132 | if (IS_ENABLED(CONFIG_CMD_STBOARD)) { |
Patrick Delaunay | 0885c23 | 2020-02-12 19:37:42 +0100 | [diff] [blame] | 133 | ret = uclass_get_device_by_driver(UCLASS_MISC, |
Simon Glass | 65130cd | 2020-12-28 20:34:56 -0700 | [diff] [blame] | 134 | DM_DRIVER_GET(stm32mp_bsec), |
Patrick Delaunay | 0885c23 | 2020-02-12 19:37:42 +0100 | [diff] [blame] | 135 | &dev); |
| 136 | if (!ret) |
| 137 | ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD), |
| 138 | &otp, sizeof(otp)); |
| 139 | if (ret > 0 && otp) |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 140 | log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n", |
| 141 | otp >> 16, |
| 142 | (otp >> 12) & 0xF, |
| 143 | (otp >> 4) & 0xF, |
| 144 | ((otp >> 8) & 0xF) - 1 + 'A', |
| 145 | otp & 0xF); |
Patrick Delaunay | 92dc102 | 2019-02-12 11:44:41 +0100 | [diff] [blame] | 146 | } |
| 147 | |
| 148 | return 0; |
| 149 | } |
| 150 | |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 151 | static void board_key_check(void) |
| 152 | { |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 153 | ofnode node; |
| 154 | struct gpio_desc gpio; |
| 155 | enum forced_boot_mode boot_mode = BOOT_NORMAL; |
| 156 | |
Patrick Delaunay | f660485 | 2020-07-31 16:31:42 +0200 | [diff] [blame] | 157 | if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG)) |
| 158 | return; |
| 159 | |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 160 | node = ofnode_path("/config"); |
| 161 | if (!ofnode_valid(node)) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 162 | log_debug("no /config node?\n"); |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 163 | return; |
| 164 | } |
Patrick Delaunay | f660485 | 2020-07-31 16:31:42 +0200 | [diff] [blame] | 165 | if (IS_ENABLED(CONFIG_FASTBOOT)) { |
| 166 | if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0, |
| 167 | &gpio, GPIOD_IS_IN)) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 168 | log_debug("could not find a /config/st,fastboot-gpios\n"); |
Patrick Delaunay | f660485 | 2020-07-31 16:31:42 +0200 | [diff] [blame] | 169 | } else { |
Patrick Delaunay | 466d3af | 2021-07-09 09:53:37 +0200 | [diff] [blame] | 170 | udelay(20); |
Patrick Delaunay | f660485 | 2020-07-31 16:31:42 +0200 | [diff] [blame] | 171 | if (dm_gpio_get_value(&gpio)) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 172 | log_notice("Fastboot key pressed, "); |
Patrick Delaunay | f660485 | 2020-07-31 16:31:42 +0200 | [diff] [blame] | 173 | boot_mode = BOOT_FASTBOOT; |
| 174 | } |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 175 | |
Patrick Delaunay | f660485 | 2020-07-31 16:31:42 +0200 | [diff] [blame] | 176 | dm_gpio_free(NULL, &gpio); |
| 177 | } |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 178 | } |
Patrick Delaunay | f660485 | 2020-07-31 16:31:42 +0200 | [diff] [blame] | 179 | if (IS_ENABLED(CONFIG_CMD_STM32PROG)) { |
| 180 | if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0, |
| 181 | &gpio, GPIOD_IS_IN)) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 182 | log_debug("could not find a /config/st,stm32prog-gpios\n"); |
Patrick Delaunay | f660485 | 2020-07-31 16:31:42 +0200 | [diff] [blame] | 183 | } else { |
Patrick Delaunay | 466d3af | 2021-07-09 09:53:37 +0200 | [diff] [blame] | 184 | udelay(20); |
Patrick Delaunay | f660485 | 2020-07-31 16:31:42 +0200 | [diff] [blame] | 185 | if (dm_gpio_get_value(&gpio)) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 186 | log_notice("STM32Programmer key pressed, "); |
Patrick Delaunay | f660485 | 2020-07-31 16:31:42 +0200 | [diff] [blame] | 187 | boot_mode = BOOT_STM32PROG; |
| 188 | } |
| 189 | dm_gpio_free(NULL, &gpio); |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 190 | } |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 191 | } |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 192 | if (boot_mode != BOOT_NORMAL) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 193 | log_notice("entering download mode...\n"); |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 194 | clrsetbits_le32(TAMP_BOOT_CONTEXT, |
| 195 | TAMP_BOOT_FORCED_MASK, |
| 196 | boot_mode); |
| 197 | } |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 198 | } |
| 199 | |
Patrick Delaunay | 58bc0cd | 2019-03-29 15:42:23 +0100 | [diff] [blame] | 200 | int g_dnl_board_usb_cable_connected(void) |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 201 | { |
Patrick Delaunay | 58bc0cd | 2019-03-29 15:42:23 +0100 | [diff] [blame] | 202 | struct udevice *dwc2_udc_otg; |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 203 | int ret; |
| 204 | |
Patrick Delaunay | a1d5f20 | 2020-07-31 16:31:43 +0200 | [diff] [blame] | 205 | if (!IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG)) |
| 206 | return -ENODEV; |
| 207 | |
Patrice Chotard | aef7c18 | 2022-04-22 09:39:18 +0200 | [diff] [blame] | 208 | /* |
| 209 | * In case of USB boot device is detected, consider USB cable is |
| 210 | * connected |
| 211 | */ |
| 212 | if ((get_bootmode() & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_USB) |
| 213 | return true; |
| 214 | |
Patrick Delaunay | fcb6b0b | 2020-06-29 10:34:06 +0200 | [diff] [blame] | 215 | /* if typec stusb160x is present, means DK1 or DK2 board */ |
| 216 | ret = stusb160x_cable_connected(); |
| 217 | if (ret >= 0) |
| 218 | return ret; |
Patrick Delaunay | 7f3384d | 2019-03-29 15:42:24 +0100 | [diff] [blame] | 219 | |
Patrick Delaunay | 58bc0cd | 2019-03-29 15:42:23 +0100 | [diff] [blame] | 220 | ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC, |
Simon Glass | 65130cd | 2020-12-28 20:34:56 -0700 | [diff] [blame] | 221 | DM_DRIVER_GET(dwc2_udc_otg), |
Patrick Delaunay | 58bc0cd | 2019-03-29 15:42:23 +0100 | [diff] [blame] | 222 | &dwc2_udc_otg); |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 223 | if (ret) { |
| 224 | log_debug("dwc2_udc_otg init failed\n"); |
| 225 | return ret; |
| 226 | } |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 227 | |
Patrick Delaunay | 58bc0cd | 2019-03-29 15:42:23 +0100 | [diff] [blame] | 228 | return dwc2_udc_B_session_valid(dwc2_udc_otg); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 229 | } |
Patrick Delaunay | 0aafce6 | 2019-09-13 15:24:17 +0200 | [diff] [blame] | 230 | |
Patrick Delaunay | a1d5f20 | 2020-07-31 16:31:43 +0200 | [diff] [blame] | 231 | #ifdef CONFIG_USB_GADGET_DOWNLOAD |
Patrick Delaunay | 0aafce6 | 2019-09-13 15:24:17 +0200 | [diff] [blame] | 232 | #define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11 |
| 233 | #define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb |
| 234 | |
| 235 | int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) |
| 236 | { |
Patrick Delaunay | a1d5f20 | 2020-07-31 16:31:43 +0200 | [diff] [blame] | 237 | if (IS_ENABLED(CONFIG_DFU_OVER_USB) && |
| 238 | !strcmp(name, "usb_dnl_dfu")) |
Patrick Delaunay | 0aafce6 | 2019-09-13 15:24:17 +0200 | [diff] [blame] | 239 | put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct); |
Patrick Delaunay | a1d5f20 | 2020-07-31 16:31:43 +0200 | [diff] [blame] | 240 | else if (IS_ENABLED(CONFIG_FASTBOOT) && |
| 241 | !strcmp(name, "usb_dnl_fastboot")) |
Patrick Delaunay | 0aafce6 | 2019-09-13 15:24:17 +0200 | [diff] [blame] | 242 | put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM, |
| 243 | &dev->idProduct); |
| 244 | else |
| 245 | put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct); |
| 246 | |
| 247 | return 0; |
| 248 | } |
Patrick Delaunay | a1d5f20 | 2020-07-31 16:31:43 +0200 | [diff] [blame] | 249 | #endif /* CONFIG_USB_GADGET_DOWNLOAD */ |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 250 | |
| 251 | static int get_led(struct udevice **dev, char *led_string) |
| 252 | { |
Simon Glass | 0034d96 | 2021-08-07 07:24:01 -0600 | [diff] [blame] | 253 | const char *led_name; |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 254 | int ret; |
| 255 | |
Simon Glass | 0034d96 | 2021-08-07 07:24:01 -0600 | [diff] [blame] | 256 | led_name = ofnode_conf_read_str(led_string); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 257 | if (!led_name) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 258 | log_debug("could not find %s config string\n", led_string); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 259 | return -ENOENT; |
| 260 | } |
| 261 | ret = led_get_by_label(led_name, dev); |
| 262 | if (ret) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 263 | log_debug("get=%d\n", ret); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 264 | return ret; |
| 265 | } |
| 266 | |
| 267 | return 0; |
| 268 | } |
| 269 | |
| 270 | static int setup_led(enum led_state_t cmd) |
| 271 | { |
| 272 | struct udevice *dev; |
| 273 | int ret; |
| 274 | |
Patrick Delaunay | 8ae05cf | 2020-04-22 14:29:12 +0200 | [diff] [blame] | 275 | if (!CONFIG_IS_ENABLED(LED)) |
| 276 | return 0; |
| 277 | |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 278 | ret = get_led(&dev, "u-boot,boot-led"); |
| 279 | if (ret) |
| 280 | return ret; |
| 281 | |
| 282 | ret = led_set_state(dev, cmd); |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 283 | return ret; |
| 284 | } |
Patrick Delaunay | ae0931d0 | 2019-07-30 19:16:39 +0200 | [diff] [blame] | 285 | |
| 286 | static void __maybe_unused led_error_blink(u32 nb_blink) |
| 287 | { |
Patrick Delaunay | ae0931d0 | 2019-07-30 19:16:39 +0200 | [diff] [blame] | 288 | int ret; |
| 289 | struct udevice *led; |
| 290 | u32 i; |
Patrick Delaunay | ae0931d0 | 2019-07-30 19:16:39 +0200 | [diff] [blame] | 291 | |
| 292 | if (!nb_blink) |
| 293 | return; |
| 294 | |
Patrick Delaunay | 8ae05cf | 2020-04-22 14:29:12 +0200 | [diff] [blame] | 295 | if (CONFIG_IS_ENABLED(LED)) { |
| 296 | ret = get_led(&led, "u-boot,error-led"); |
| 297 | if (!ret) { |
| 298 | /* make u-boot,error-led blinking */ |
| 299 | /* if U32_MAX and 125ms interval, for 17.02 years */ |
| 300 | for (i = 0; i < 2 * nb_blink; i++) { |
| 301 | led_set_state(led, LEDST_TOGGLE); |
| 302 | mdelay(125); |
Stefan Roese | 80877fa | 2022-09-02 14:10:46 +0200 | [diff] [blame] | 303 | schedule(); |
Patrick Delaunay | 8ae05cf | 2020-04-22 14:29:12 +0200 | [diff] [blame] | 304 | } |
| 305 | led_set_state(led, LEDST_ON); |
Patrick Delaunay | ae0931d0 | 2019-07-30 19:16:39 +0200 | [diff] [blame] | 306 | } |
| 307 | } |
Patrick Delaunay | ae0931d0 | 2019-07-30 19:16:39 +0200 | [diff] [blame] | 308 | |
| 309 | /* infinite: the boot process must be stopped */ |
| 310 | if (nb_blink == U32_MAX) |
| 311 | hang(); |
| 312 | } |
Patrice Chotard | 204079b | 2018-08-10 17:12:14 +0200 | [diff] [blame] | 313 | |
Patrice Chotard | 7dfa797 | 2020-10-16 09:28:59 +0200 | [diff] [blame] | 314 | static int adc_measurement(ofnode node, int adc_count, int *min_uV, int *max_uV) |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 315 | { |
| 316 | struct ofnode_phandle_args adc_args; |
| 317 | struct udevice *adc; |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 318 | unsigned int raw; |
Patrice Chotard | 7dfa797 | 2020-10-16 09:28:59 +0200 | [diff] [blame] | 319 | int ret, uV; |
| 320 | int i; |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 321 | |
| 322 | for (i = 0; i < adc_count; i++) { |
| 323 | if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd", |
| 324 | "#io-channel-cells", 0, i, |
| 325 | &adc_args)) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 326 | log_debug("can't find /config/st,adc_usb_pd\n"); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 327 | return 0; |
| 328 | } |
| 329 | |
| 330 | ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node, |
| 331 | &adc); |
| 332 | |
| 333 | if (ret) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 334 | log_err("Can't get adc device(%d)\n", ret); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 335 | return ret; |
| 336 | } |
| 337 | |
| 338 | ret = adc_channel_single_shot(adc->name, adc_args.args[0], |
| 339 | &raw); |
| 340 | if (ret) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 341 | log_err("single shot failed for %s[%d]!\n", |
| 342 | adc->name, adc_args.args[0]); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 343 | return ret; |
| 344 | } |
| 345 | /* Convert to uV */ |
| 346 | if (!adc_raw_to_uV(adc, raw, &uV)) { |
Patrice Chotard | 7dfa797 | 2020-10-16 09:28:59 +0200 | [diff] [blame] | 347 | if (uV > *max_uV) |
| 348 | *max_uV = uV; |
| 349 | if (uV < *min_uV) |
| 350 | *min_uV = uV; |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 351 | log_debug("%s[%02d] = %u, %d uV\n", |
| 352 | adc->name, adc_args.args[0], raw, uV); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 353 | } else { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 354 | log_err("Can't get uV value for %s[%d]\n", |
| 355 | adc->name, adc_args.args[0]); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 356 | } |
| 357 | } |
| 358 | |
Patrice Chotard | 7dfa797 | 2020-10-16 09:28:59 +0200 | [diff] [blame] | 359 | return 0; |
| 360 | } |
| 361 | |
| 362 | static int board_check_usb_power(void) |
| 363 | { |
| 364 | ofnode node; |
| 365 | int max_uV = 0; |
| 366 | int min_uV = USB_START_HIGH_THRESHOLD_UV; |
| 367 | int adc_count, ret; |
| 368 | u32 nb_blink; |
| 369 | u8 i; |
| 370 | |
Patrick Delaunay | f1c4665 | 2021-04-06 09:57:54 +0200 | [diff] [blame] | 371 | if (!IS_ENABLED(CONFIG_ADC)) |
| 372 | return -ENODEV; |
| 373 | |
Patrice Chotard | 7dfa797 | 2020-10-16 09:28:59 +0200 | [diff] [blame] | 374 | node = ofnode_path("/config"); |
| 375 | if (!ofnode_valid(node)) { |
| 376 | log_debug("no /config node?\n"); |
| 377 | return -ENOENT; |
| 378 | } |
| 379 | |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 380 | /* |
Patrice Chotard | 7dfa797 | 2020-10-16 09:28:59 +0200 | [diff] [blame] | 381 | * Retrieve the ADC channels devices and get measurement |
| 382 | * for each of them |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 383 | */ |
Patrice Chotard | 7dfa797 | 2020-10-16 09:28:59 +0200 | [diff] [blame] | 384 | adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd", |
| 385 | "#io-channel-cells", 0); |
| 386 | if (adc_count < 0) { |
| 387 | if (adc_count == -ENOENT) |
| 388 | return 0; |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 389 | |
Patrice Chotard | 7dfa797 | 2020-10-16 09:28:59 +0200 | [diff] [blame] | 390 | log_err("Can't find adc channel (%d)\n", adc_count); |
| 391 | |
| 392 | return adc_count; |
| 393 | } |
Patrice Chotard | cded32f | 2019-04-30 18:09:38 +0200 | [diff] [blame] | 394 | |
Patrice Chotard | 7dfa797 | 2020-10-16 09:28:59 +0200 | [diff] [blame] | 395 | /* perform maximum of 2 ADC measurements to detect power supply current */ |
| 396 | for (i = 0; i < 2; i++) { |
Patrick Delaunay | f1c4665 | 2021-04-06 09:57:54 +0200 | [diff] [blame] | 397 | ret = adc_measurement(node, adc_count, &min_uV, &max_uV); |
Patrice Chotard | 7dfa797 | 2020-10-16 09:28:59 +0200 | [diff] [blame] | 398 | if (ret) |
| 399 | return ret; |
| 400 | |
| 401 | /* |
| 402 | * If highest value is inside 1.23 Volts and 2.10 Volts, that means |
| 403 | * board is plugged on an USB-C 3A power supply and boot process can |
| 404 | * continue. |
| 405 | */ |
| 406 | if (max_uV > USB_START_LOW_THRESHOLD_UV && |
| 407 | max_uV <= USB_START_HIGH_THRESHOLD_UV && |
| 408 | min_uV <= USB_LOW_THRESHOLD_UV) |
| 409 | return 0; |
| 410 | |
| 411 | if (i == 0) { |
| 412 | log_err("Previous ADC measurements was not the one expected, retry in 20ms\n"); |
| 413 | mdelay(20); /* equal to max tPDDebounce duration (min 10ms - max 20ms) */ |
| 414 | } |
| 415 | } |
| 416 | |
| 417 | log_notice("****************************************************\n"); |
Patrice Chotard | cded32f | 2019-04-30 18:09:38 +0200 | [diff] [blame] | 418 | /* |
| 419 | * If highest and lowest value are either both below |
| 420 | * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that |
| 421 | * means USB TYPE-C is in unattached mode, this is an issue, make |
| 422 | * u-boot,error-led blinking and stop boot process. |
| 423 | */ |
| 424 | if ((max_uV > USB_LOW_THRESHOLD_UV && |
| 425 | min_uV > USB_LOW_THRESHOLD_UV) || |
| 426 | (max_uV <= USB_LOW_THRESHOLD_UV && |
| 427 | min_uV <= USB_LOW_THRESHOLD_UV)) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 428 | log_notice("* ERROR USB TYPE-C connection in unattached mode *\n"); |
| 429 | log_notice("* Check that USB TYPE-C cable is correctly plugged *\n"); |
Patrice Chotard | cded32f | 2019-04-30 18:09:38 +0200 | [diff] [blame] | 430 | /* with 125ms interval, led will blink for 17.02 years ....*/ |
| 431 | nb_blink = U32_MAX; |
| 432 | } |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 433 | |
Patrice Chotard | cded32f | 2019-04-30 18:09:38 +0200 | [diff] [blame] | 434 | if (max_uV > USB_LOW_THRESHOLD_UV && |
| 435 | max_uV <= USB_WARNING_LOW_THRESHOLD_UV && |
| 436 | min_uV <= USB_LOW_THRESHOLD_UV) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 437 | log_notice("* WARNING 500mA power supply detected *\n"); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 438 | nb_blink = 2; |
Patrice Chotard | cded32f | 2019-04-30 18:09:38 +0200 | [diff] [blame] | 439 | } |
| 440 | |
| 441 | if (max_uV > USB_WARNING_LOW_THRESHOLD_UV && |
| 442 | max_uV <= USB_START_LOW_THRESHOLD_UV && |
| 443 | min_uV <= USB_LOW_THRESHOLD_UV) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 444 | log_notice("* WARNING 1.5A power supply detected *\n"); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 445 | nb_blink = 3; |
| 446 | } |
| 447 | |
Patrice Chotard | cded32f | 2019-04-30 18:09:38 +0200 | [diff] [blame] | 448 | /* |
| 449 | * If highest value is above 2.15 Volts that means that the USB TypeC |
| 450 | * supplies more than 3 Amp, this is not compliant with TypeC specification |
| 451 | */ |
| 452 | if (max_uV > USB_START_HIGH_THRESHOLD_UV) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 453 | log_notice("* USB TYPE-C charger not compliant with *\n"); |
| 454 | log_notice("* specification *\n"); |
| 455 | log_notice("****************************************************\n\n"); |
Patrice Chotard | cded32f | 2019-04-30 18:09:38 +0200 | [diff] [blame] | 456 | /* with 125ms interval, led will blink for 17.02 years ....*/ |
| 457 | nb_blink = U32_MAX; |
| 458 | } else { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 459 | log_notice("* Current too low, use a 3A power supply! *\n"); |
| 460 | log_notice("****************************************************\n\n"); |
Patrice Chotard | cded32f | 2019-04-30 18:09:38 +0200 | [diff] [blame] | 461 | } |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 462 | |
Patrick Delaunay | ae0931d0 | 2019-07-30 19:16:39 +0200 | [diff] [blame] | 463 | led_error_blink(nb_blink); |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 464 | |
| 465 | return 0; |
| 466 | } |
| 467 | |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 468 | static void sysconf_init(void) |
| 469 | { |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 470 | u8 *syscfg; |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 471 | struct udevice *pwr_dev; |
| 472 | struct udevice *pwr_reg; |
| 473 | struct udevice *dev; |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 474 | u32 otp = 0; |
Patrick Delaunay | 181298e | 2020-04-22 14:29:16 +0200 | [diff] [blame] | 475 | int ret; |
| 476 | u32 bootr, val; |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 477 | |
| 478 | syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG); |
| 479 | |
| 480 | /* interconnect update : select master using the port 1 */ |
| 481 | /* LTDC = AXI_M9 */ |
| 482 | /* GPU = AXI_M8 */ |
| 483 | /* today information is hardcoded in U-Boot */ |
| 484 | writel(BIT(9), syscfg + SYSCFG_ICNR); |
| 485 | |
| 486 | /* disable Pull-Down for boot pin connected to VDD */ |
| 487 | bootr = readl(syscfg + SYSCFG_BOOTR); |
| 488 | bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT); |
| 489 | bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT; |
| 490 | writel(bootr, syscfg + SYSCFG_BOOTR); |
| 491 | |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 492 | /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI |
| 493 | * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection. |
| 494 | * The customer will have to disable this for low frequencies |
| 495 | * or if AFMUX is selected but the function not used, typically for |
| 496 | * TRACE. Otherwise, impact on power consumption. |
| 497 | * |
| 498 | * WARNING: |
| 499 | * enabling High Speed mode while VDD>2.7V |
| 500 | * with the OTP product_below_2v5 (OTP 18, BIT 13) |
| 501 | * erroneously set to 1 can damage the IC! |
| 502 | * => U-Boot set the register only if VDD < 2.7V (in DT) |
| 503 | * but this value need to be consistent with board design |
| 504 | */ |
Patrick Delaunay | 6b2baa0 | 2019-07-30 19:16:42 +0200 | [diff] [blame] | 505 | ret = uclass_get_device_by_driver(UCLASS_PMIC, |
Simon Glass | 65130cd | 2020-12-28 20:34:56 -0700 | [diff] [blame] | 506 | DM_DRIVER_GET(stm32mp_pwr_pmic), |
Patrick Delaunay | 6b2baa0 | 2019-07-30 19:16:42 +0200 | [diff] [blame] | 507 | &pwr_dev); |
Patrick Delaunay | 7c10482 | 2022-06-20 12:36:10 +0200 | [diff] [blame] | 508 | if (!ret) { |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 509 | ret = uclass_get_device_by_driver(UCLASS_MISC, |
Simon Glass | 65130cd | 2020-12-28 20:34:56 -0700 | [diff] [blame] | 510 | DM_DRIVER_GET(stm32mp_bsec), |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 511 | &dev); |
| 512 | if (ret) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 513 | log_err("Can't find stm32mp_bsec driver\n"); |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 514 | return; |
| 515 | } |
| 516 | |
| 517 | ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4); |
Patrick Delaunay | ceb82e3 | 2019-08-02 13:08:06 +0200 | [diff] [blame] | 518 | if (ret > 0) |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 519 | otp = otp & BIT(13); |
| 520 | |
Patrick Delaunay | 6b2baa0 | 2019-07-30 19:16:42 +0200 | [diff] [blame] | 521 | /* get VDD = vdd-supply */ |
| 522 | ret = device_get_supply_regulator(pwr_dev, "vdd-supply", |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 523 | &pwr_reg); |
| 524 | |
| 525 | /* check if VDD is Low Voltage */ |
| 526 | if (!ret) { |
| 527 | if (regulator_get_value(pwr_reg) < 2700000) { |
| 528 | writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE | |
| 529 | SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI | |
| 530 | SYSCFG_IOCTRLSETR_HSLVEN_ETH | |
| 531 | SYSCFG_IOCTRLSETR_HSLVEN_SDMMC | |
| 532 | SYSCFG_IOCTRLSETR_HSLVEN_SPI, |
| 533 | syscfg + SYSCFG_IOCTRLSETR); |
| 534 | |
| 535 | if (!otp) |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 536 | log_err("product_below_2v5=0: HSLVEN protected by HW\n"); |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 537 | } else { |
| 538 | if (otp) |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 539 | log_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n"); |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 540 | } |
| 541 | } else { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 542 | log_debug("VDD unknown"); |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 543 | } |
| 544 | } |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 545 | |
| 546 | /* activate automatic I/O compensation |
| 547 | * warning: need to ensure CSI enabled and ready in clock driver |
| 548 | */ |
| 549 | writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR); |
| 550 | |
Patrick Delaunay | 181298e | 2020-04-22 14:29:16 +0200 | [diff] [blame] | 551 | /* poll until ready (1s timeout) */ |
| 552 | ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val, |
| 553 | val & SYSCFG_CMPCR_READY, |
| 554 | 1000000); |
| 555 | if (ret) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 556 | log_err("SYSCFG: I/O compensation failed, timeout.\n"); |
Patrick Delaunay | 181298e | 2020-04-22 14:29:16 +0200 | [diff] [blame] | 557 | led_error_blink(10); |
| 558 | } |
| 559 | |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 560 | clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL); |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 561 | } |
| 562 | |
Patrick Delaunay | 37c4b55 | 2022-05-20 18:24:49 +0200 | [diff] [blame] | 563 | static int board_stm32mp15x_dk2_init(void) |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 564 | { |
| 565 | ofnode node; |
| 566 | struct gpio_desc hdmi, audio; |
| 567 | int ret = 0; |
| 568 | |
Patrick Delaunay | 37c4b55 | 2022-05-20 18:24:49 +0200 | [diff] [blame] | 569 | /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */ |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 570 | node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39"); |
| 571 | if (!ofnode_valid(node)) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 572 | log_debug("no hdmi-transmitter@39 ?\n"); |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 573 | return -ENOENT; |
| 574 | } |
| 575 | |
| 576 | if (gpio_request_by_name_nodev(node, "reset-gpios", 0, |
| 577 | &hdmi, GPIOD_IS_OUT)) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 578 | log_debug("could not find reset-gpios\n"); |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 579 | return -ENOENT; |
| 580 | } |
| 581 | |
| 582 | node = ofnode_path("/soc/i2c@40012000/cs42l51@4a"); |
| 583 | if (!ofnode_valid(node)) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 584 | log_debug("no cs42l51@4a ?\n"); |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 585 | return -ENOENT; |
| 586 | } |
| 587 | |
| 588 | if (gpio_request_by_name_nodev(node, "reset-gpios", 0, |
| 589 | &audio, GPIOD_IS_OUT)) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 590 | log_debug("could not find reset-gpios\n"); |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 591 | return -ENOENT; |
| 592 | } |
| 593 | |
| 594 | /* before power up, insure that HDMI and AUDIO IC is under reset */ |
| 595 | ret = dm_gpio_set_value(&hdmi, 1); |
| 596 | if (ret) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 597 | log_err("can't set_value for hdmi_nrst gpio"); |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 598 | goto error; |
| 599 | } |
| 600 | ret = dm_gpio_set_value(&audio, 1); |
| 601 | if (ret) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 602 | log_err("can't set_value for audio_nrst gpio"); |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 603 | goto error; |
| 604 | } |
| 605 | |
| 606 | /* power-up audio IC */ |
| 607 | regulator_autoset_by_name("v1v8_audio", NULL); |
| 608 | |
| 609 | /* power-up HDMI IC */ |
| 610 | regulator_autoset_by_name("v1v2_hdmi", NULL); |
| 611 | regulator_autoset_by_name("v3v3_hdmi", NULL); |
| 612 | |
| 613 | error: |
| 614 | return ret; |
| 615 | } |
| 616 | |
Patrick Delaunay | 37c4b55 | 2022-05-20 18:24:49 +0200 | [diff] [blame] | 617 | static bool board_is_stm32mp15x_dk2(void) |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 618 | { |
Patrick Delaunay | 4c6fcbc | 2024-01-15 15:05:57 +0100 | [diff] [blame] | 619 | if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) && |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 620 | of_machine_is_compatible("st,stm32mp157c-dk2")) |
| 621 | return true; |
| 622 | |
| 623 | return false; |
| 624 | } |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 625 | |
Patrick Delaunay | 37c4b55 | 2022-05-20 18:24:49 +0200 | [diff] [blame] | 626 | static bool board_is_stm32mp15x_ev1(void) |
Patrick Delaunay | 486ae96 | 2020-04-22 14:29:13 +0200 | [diff] [blame] | 627 | { |
Patrick Delaunay | 4c6fcbc | 2024-01-15 15:05:57 +0100 | [diff] [blame] | 628 | if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) && |
Patrick Delaunay | 486ae96 | 2020-04-22 14:29:13 +0200 | [diff] [blame] | 629 | (of_machine_is_compatible("st,stm32mp157a-ev1") || |
| 630 | of_machine_is_compatible("st,stm32mp157c-ev1") || |
| 631 | of_machine_is_compatible("st,stm32mp157d-ev1") || |
| 632 | of_machine_is_compatible("st,stm32mp157f-ev1"))) |
| 633 | return true; |
| 634 | |
| 635 | return false; |
| 636 | } |
| 637 | |
| 638 | /* touchscreen driver: only used for pincontrol configuration */ |
| 639 | static const struct udevice_id goodix_ids[] = { |
| 640 | { .compatible = "goodix,gt9147", }, |
| 641 | { } |
| 642 | }; |
| 643 | |
| 644 | U_BOOT_DRIVER(goodix) = { |
| 645 | .name = "goodix", |
| 646 | .id = UCLASS_NOP, |
| 647 | .of_match = goodix_ids, |
| 648 | }; |
| 649 | |
Patrick Delaunay | 37c4b55 | 2022-05-20 18:24:49 +0200 | [diff] [blame] | 650 | static void board_stm32mp15x_ev1_init(void) |
Patrick Delaunay | 486ae96 | 2020-04-22 14:29:13 +0200 | [diff] [blame] | 651 | { |
| 652 | struct udevice *dev; |
| 653 | |
| 654 | /* configure IRQ line on EV1 for touchscreen before LCD reset */ |
Simon Glass | 65130cd | 2020-12-28 20:34:56 -0700 | [diff] [blame] | 655 | uclass_get_device_by_driver(UCLASS_NOP, DM_DRIVER_GET(goodix), &dev); |
Patrick Delaunay | 486ae96 | 2020-04-22 14:29:13 +0200 | [diff] [blame] | 656 | } |
| 657 | |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 658 | /* board dependent setup after realloc */ |
| 659 | int board_init(void) |
| 660 | { |
Patrick Delaunay | 008d3c3 | 2019-02-27 17:01:20 +0100 | [diff] [blame] | 661 | board_key_check(); |
| 662 | |
Patrick Delaunay | 37c4b55 | 2022-05-20 18:24:49 +0200 | [diff] [blame] | 663 | if (board_is_stm32mp15x_ev1()) |
| 664 | board_stm32mp15x_ev1_init(); |
Patrick Delaunay | 486ae96 | 2020-04-22 14:29:13 +0200 | [diff] [blame] | 665 | |
Patrick Delaunay | 37c4b55 | 2022-05-20 18:24:49 +0200 | [diff] [blame] | 666 | if (board_is_stm32mp15x_dk2()) |
| 667 | board_stm32mp15x_dk2_init(); |
Patrick Delaunay | 9f76fdf | 2019-07-30 19:16:38 +0200 | [diff] [blame] | 668 | |
Patrick Delaunay | 7c10482 | 2022-06-20 12:36:10 +0200 | [diff] [blame] | 669 | regulators_enable_boot_on(_DEBUG); |
Patrick Delaunay | 6519e44 | 2019-07-05 17:20:09 +0200 | [diff] [blame] | 670 | |
Patrick Delaunay | 72a5762 | 2021-10-11 09:52:50 +0200 | [diff] [blame] | 671 | /* |
| 672 | * sysconf initialisation done only when U-Boot is running in secure |
| 673 | * done in TF-A for TFABOOT. |
| 674 | */ |
| 675 | if (IS_ENABLED(CONFIG_ARMV7_NONSEC)) |
Patrick Delaunay | 4b2bfd6 | 2020-07-31 16:31:45 +0200 | [diff] [blame] | 676 | sysconf_init(); |
Patrick Delaunay | 4ace1d1 | 2019-02-27 17:01:24 +0100 | [diff] [blame] | 677 | |
Patrick Delaunay | 8ae05cf | 2020-04-22 14:29:12 +0200 | [diff] [blame] | 678 | setup_led(LEDST_ON); |
| 679 | |
Simon Glass | b819621 | 2023-02-05 15:39:42 -0700 | [diff] [blame] | 680 | #if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT) |
Sughosh Ganu | e166b5e | 2022-10-21 18:15:58 +0530 | [diff] [blame] | 681 | efi_guid_t image_type_guid = STM32MP_FIP_IMAGE_GUID; |
| 682 | |
| 683 | guidcpy(&fw_images[0].image_type_id, &image_type_guid); |
| 684 | fw_images[0].fw_name = u"STM32MP-FIP"; |
| 685 | fw_images[0].image_index = 1; |
| 686 | #endif |
Patrick Delaunay | 8eb3b1e | 2018-03-12 10:46:18 +0100 | [diff] [blame] | 687 | return 0; |
| 688 | } |
Patrick Delaunay | d70e3f8 | 2019-02-27 17:01:11 +0100 | [diff] [blame] | 689 | |
| 690 | int board_late_init(void) |
| 691 | { |
Patrick Delaunay | d70e3f8 | 2019-02-27 17:01:11 +0100 | [diff] [blame] | 692 | const void *fdt_compat; |
| 693 | int fdt_compat_len; |
Patrick Delaunay | e8566ec | 2019-07-30 19:16:37 +0200 | [diff] [blame] | 694 | int ret; |
| 695 | u32 otp; |
| 696 | struct udevice *dev; |
| 697 | char buf[10]; |
Patrick Delaunay | f118e4a | 2020-07-31 16:31:48 +0200 | [diff] [blame] | 698 | char dtb_name[256]; |
| 699 | int buf_len; |
Patrick Delaunay | d70e3f8 | 2019-02-27 17:01:11 +0100 | [diff] [blame] | 700 | |
Patrick Delaunay | f118e4a | 2020-07-31 16:31:48 +0200 | [diff] [blame] | 701 | if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) { |
Patrick Delaunay | 4e506b0 | 2022-05-19 09:07:29 +0200 | [diff] [blame] | 702 | fdt_compat = ofnode_get_property(ofnode_root(), "compatible", |
| 703 | &fdt_compat_len); |
Patrick Delaunay | f118e4a | 2020-07-31 16:31:48 +0200 | [diff] [blame] | 704 | if (fdt_compat && fdt_compat_len) { |
| 705 | if (strncmp(fdt_compat, "st,", 3) != 0) { |
| 706 | env_set("board_name", fdt_compat); |
| 707 | } else { |
| 708 | env_set("board_name", fdt_compat + 3); |
Patrick Delaunay | 4533a2c | 2020-04-22 14:29:14 +0200 | [diff] [blame] | 709 | |
Patrick Delaunay | f118e4a | 2020-07-31 16:31:48 +0200 | [diff] [blame] | 710 | buf_len = sizeof(dtb_name); |
| 711 | strncpy(dtb_name, fdt_compat + 3, buf_len); |
| 712 | buf_len -= strlen(fdt_compat + 3); |
| 713 | strncat(dtb_name, ".dtb", buf_len); |
| 714 | env_set("fdtfile", dtb_name); |
| 715 | } |
Patrick Delaunay | 4533a2c | 2020-04-22 14:29:14 +0200 | [diff] [blame] | 716 | } |
Patrick Delaunay | f118e4a | 2020-07-31 16:31:48 +0200 | [diff] [blame] | 717 | ret = uclass_get_device_by_driver(UCLASS_MISC, |
Simon Glass | 65130cd | 2020-12-28 20:34:56 -0700 | [diff] [blame] | 718 | DM_DRIVER_GET(stm32mp_bsec), |
Patrick Delaunay | f118e4a | 2020-07-31 16:31:48 +0200 | [diff] [blame] | 719 | &dev); |
Patrick Delaunay | e8566ec | 2019-07-30 19:16:37 +0200 | [diff] [blame] | 720 | |
Patrick Delaunay | f118e4a | 2020-07-31 16:31:48 +0200 | [diff] [blame] | 721 | if (!ret) |
| 722 | ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD), |
| 723 | &otp, sizeof(otp)); |
| 724 | if (ret > 0 && otp) { |
| 725 | snprintf(buf, sizeof(buf), "0x%04x", otp >> 16); |
| 726 | env_set("board_id", buf); |
Patrick Delaunay | e8566ec | 2019-07-30 19:16:37 +0200 | [diff] [blame] | 727 | |
Patrick Delaunay | f118e4a | 2020-07-31 16:31:48 +0200 | [diff] [blame] | 728 | snprintf(buf, sizeof(buf), "0x%04x", |
| 729 | ((otp >> 8) & 0xF) - 1 + 0xA); |
| 730 | env_set("board_rev", buf); |
| 731 | } |
Patrick Delaunay | e8566ec | 2019-07-30 19:16:37 +0200 | [diff] [blame] | 732 | } |
Patrick Delaunay | d70e3f8 | 2019-02-27 17:01:11 +0100 | [diff] [blame] | 733 | |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 734 | /* for DK1/DK2 boards */ |
| 735 | board_check_usb_power(); |
| 736 | |
Patrick Delaunay | d70e3f8 | 2019-02-27 17:01:11 +0100 | [diff] [blame] | 737 | return 0; |
| 738 | } |
Patrice Chotard | 879cde5 | 2019-02-12 16:50:40 +0100 | [diff] [blame] | 739 | |
| 740 | void board_quiesce_devices(void) |
| 741 | { |
| 742 | setup_led(LEDST_OFF); |
| 743 | } |
Patrice Chotard | 41443cf | 2019-05-02 18:07:14 +0200 | [diff] [blame] | 744 | |
Patrick Delaunay | bff66f9 | 2019-08-01 11:29:03 +0200 | [diff] [blame] | 745 | /* eth init function : weak called in eqos driver */ |
| 746 | int board_interface_eth_init(struct udevice *dev, |
| 747 | phy_interface_t interface_type) |
Christophe Roullier | 69ac3f5 | 2019-05-17 15:08:43 +0200 | [diff] [blame] | 748 | { |
| 749 | u8 *syscfg; |
| 750 | u32 value; |
Patrick Delaunay | bff66f9 | 2019-08-01 11:29:03 +0200 | [diff] [blame] | 751 | bool eth_clk_sel_reg = false; |
| 752 | bool eth_ref_clk_sel_reg = false; |
| 753 | |
| 754 | /* Gigabit Ethernet 125MHz clock selection. */ |
Patrick Delaunay | 00cf4a8 | 2021-06-04 18:25:55 +0200 | [diff] [blame] | 755 | eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel"); |
Patrick Delaunay | bff66f9 | 2019-08-01 11:29:03 +0200 | [diff] [blame] | 756 | |
| 757 | /* Ethernet 50Mhz RMII clock selection */ |
| 758 | eth_ref_clk_sel_reg = |
Patrick Delaunay | 00cf4a8 | 2021-06-04 18:25:55 +0200 | [diff] [blame] | 759 | dev_read_bool(dev, "st,eth-ref-clk-sel"); |
Christophe Roullier | 69ac3f5 | 2019-05-17 15:08:43 +0200 | [diff] [blame] | 760 | |
| 761 | syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG); |
| 762 | |
| 763 | if (!syscfg) |
| 764 | return -ENODEV; |
| 765 | |
| 766 | switch (interface_type) { |
| 767 | case PHY_INTERFACE_MODE_MII: |
| 768 | value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII | |
| 769 | SYSCFG_PMCSETR_ETH_REF_CLK_SEL; |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 770 | log_debug("PHY_INTERFACE_MODE_MII\n"); |
Christophe Roullier | 69ac3f5 | 2019-05-17 15:08:43 +0200 | [diff] [blame] | 771 | break; |
| 772 | case PHY_INTERFACE_MODE_GMII: |
| 773 | if (eth_clk_sel_reg) |
| 774 | value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII | |
| 775 | SYSCFG_PMCSETR_ETH_CLK_SEL; |
| 776 | else |
| 777 | value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII; |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 778 | log_debug("PHY_INTERFACE_MODE_GMII\n"); |
Christophe Roullier | 69ac3f5 | 2019-05-17 15:08:43 +0200 | [diff] [blame] | 779 | break; |
| 780 | case PHY_INTERFACE_MODE_RMII: |
| 781 | if (eth_ref_clk_sel_reg) |
| 782 | value = SYSCFG_PMCSETR_ETH_SEL_RMII | |
| 783 | SYSCFG_PMCSETR_ETH_REF_CLK_SEL; |
| 784 | else |
| 785 | value = SYSCFG_PMCSETR_ETH_SEL_RMII; |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 786 | log_debug("PHY_INTERFACE_MODE_RMII\n"); |
Christophe Roullier | 69ac3f5 | 2019-05-17 15:08:43 +0200 | [diff] [blame] | 787 | break; |
| 788 | case PHY_INTERFACE_MODE_RGMII: |
| 789 | case PHY_INTERFACE_MODE_RGMII_ID: |
| 790 | case PHY_INTERFACE_MODE_RGMII_RXID: |
| 791 | case PHY_INTERFACE_MODE_RGMII_TXID: |
| 792 | if (eth_clk_sel_reg) |
| 793 | value = SYSCFG_PMCSETR_ETH_SEL_RGMII | |
| 794 | SYSCFG_PMCSETR_ETH_CLK_SEL; |
| 795 | else |
| 796 | value = SYSCFG_PMCSETR_ETH_SEL_RGMII; |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 797 | log_debug("PHY_INTERFACE_MODE_RGMII\n"); |
Christophe Roullier | 69ac3f5 | 2019-05-17 15:08:43 +0200 | [diff] [blame] | 798 | break; |
| 799 | default: |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 800 | log_debug("Do not manage %d interface\n", |
| 801 | interface_type); |
Christophe Roullier | 69ac3f5 | 2019-05-17 15:08:43 +0200 | [diff] [blame] | 802 | /* Do not manage others interfaces */ |
| 803 | return -EINVAL; |
| 804 | } |
| 805 | |
| 806 | /* clear and set ETH configuration bits */ |
| 807 | writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII | |
| 808 | SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL, |
| 809 | syscfg + SYSCFG_PMCCLRR); |
| 810 | writel(value, syscfg + SYSCFG_PMCSETR); |
| 811 | |
| 812 | return 0; |
| 813 | } |
| 814 | |
Patrice Chotard | 3432037 | 2019-05-02 18:28:05 +0200 | [diff] [blame] | 815 | enum env_location env_get_location(enum env_operation op, int prio) |
| 816 | { |
| 817 | u32 bootmode = get_bootmode(); |
| 818 | |
| 819 | if (prio) |
| 820 | return ENVL_UNKNOWN; |
| 821 | |
| 822 | switch (bootmode & TAMP_BOOT_DEVICE_MASK) { |
Patrick Delaunay | 455b065 | 2020-06-15 11:18:22 +0200 | [diff] [blame] | 823 | case BOOT_FLASH_SD: |
| 824 | case BOOT_FLASH_EMMC: |
Patrick Delaunay | 821a9ba | 2020-07-31 16:31:49 +0200 | [diff] [blame] | 825 | if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC)) |
| 826 | return ENVL_MMC; |
| 827 | else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4)) |
| 828 | return ENVL_EXT4; |
| 829 | else |
| 830 | return ENVL_NOWHERE; |
| 831 | |
Patrice Chotard | 3432037 | 2019-05-02 18:28:05 +0200 | [diff] [blame] | 832 | case BOOT_FLASH_NAND: |
Patrick Delaunay | b5a7ca2 | 2020-03-18 09:22:52 +0100 | [diff] [blame] | 833 | case BOOT_FLASH_SPINAND: |
Simon Glass | bd3ebf6 | 2023-02-05 15:39:48 -0700 | [diff] [blame] | 834 | if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI)) |
Patrick Delaunay | 821a9ba | 2020-07-31 16:31:49 +0200 | [diff] [blame] | 835 | return ENVL_UBI; |
| 836 | else |
| 837 | return ENVL_NOWHERE; |
| 838 | |
Patrice Chotard | 2c461ec | 2019-05-09 14:25:36 +0200 | [diff] [blame] | 839 | case BOOT_FLASH_NOR: |
Patrick Delaunay | 821a9ba | 2020-07-31 16:31:49 +0200 | [diff] [blame] | 840 | if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH)) |
| 841 | return ENVL_SPI_FLASH; |
| 842 | else |
| 843 | return ENVL_NOWHERE; |
| 844 | |
Patrice Chotard | 3432037 | 2019-05-02 18:28:05 +0200 | [diff] [blame] | 845 | default: |
| 846 | return ENVL_NOWHERE; |
| 847 | } |
| 848 | } |
| 849 | |
Patrice Chotard | dad97bf | 2019-05-02 18:36:01 +0200 | [diff] [blame] | 850 | const char *env_ext4_get_intf(void) |
| 851 | { |
| 852 | u32 bootmode = get_bootmode(); |
| 853 | |
| 854 | switch (bootmode & TAMP_BOOT_DEVICE_MASK) { |
| 855 | case BOOT_FLASH_SD: |
| 856 | case BOOT_FLASH_EMMC: |
| 857 | return "mmc"; |
| 858 | default: |
| 859 | return ""; |
| 860 | } |
| 861 | } |
| 862 | |
Patrick Delaunay | 5c2f6d7 | 2021-07-06 17:19:45 +0200 | [diff] [blame] | 863 | int mmc_get_boot(void) |
| 864 | { |
| 865 | struct udevice *dev; |
| 866 | u32 boot_mode = get_bootmode(); |
| 867 | unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1; |
| 868 | char cmd[20]; |
| 869 | const u32 sdmmc_addr[] = { |
| 870 | STM32_SDMMC1_BASE, |
| 871 | STM32_SDMMC2_BASE, |
| 872 | STM32_SDMMC3_BASE |
| 873 | }; |
| 874 | |
Rasmus Villemoes | 6d83f3c | 2023-03-24 08:55:19 +0100 | [diff] [blame] | 875 | if (instance >= ARRAY_SIZE(sdmmc_addr)) |
Patrick Delaunay | 5c2f6d7 | 2021-07-06 17:19:45 +0200 | [diff] [blame] | 876 | return 0; |
| 877 | |
| 878 | /* search associated sdmmc node in devicetree */ |
| 879 | snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]); |
| 880 | if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) { |
| 881 | log_err("mmc%d = %s not found in device tree!\n", instance, cmd); |
| 882 | return 0; |
| 883 | } |
| 884 | |
| 885 | return dev_seq(dev); |
| 886 | }; |
| 887 | |
Patrice Chotard | dad97bf | 2019-05-02 18:36:01 +0200 | [diff] [blame] | 888 | const char *env_ext4_get_dev_part(void) |
| 889 | { |
Manuel Reis | be9d3e2 | 2020-11-25 10:16:20 +0000 | [diff] [blame] | 890 | static char *const env_dev_part = |
| 891 | #ifdef CONFIG_ENV_EXT4_DEVICE_AND_PART |
| 892 | CONFIG_ENV_EXT4_DEVICE_AND_PART; |
| 893 | #else |
| 894 | ""; |
| 895 | #endif |
Patrice Chotard | dad97bf | 2019-05-02 18:36:01 +0200 | [diff] [blame] | 896 | static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"}; |
Manuel Reis | be9d3e2 | 2020-11-25 10:16:20 +0000 | [diff] [blame] | 897 | |
| 898 | if (strlen(env_dev_part) > 0) |
| 899 | return env_dev_part; |
| 900 | |
Patrick Delaunay | 5c2f6d7 | 2021-07-06 17:19:45 +0200 | [diff] [blame] | 901 | return dev_part[mmc_get_boot()]; |
Patrice Chotard | dad97bf | 2019-05-02 18:36:01 +0200 | [diff] [blame] | 902 | } |
Manuel Reis | be9d3e2 | 2020-11-25 10:16:20 +0000 | [diff] [blame] | 903 | |
Patrick Delaunay | 455b065 | 2020-06-15 11:18:22 +0200 | [diff] [blame] | 904 | int mmc_get_env_dev(void) |
| 905 | { |
Patrick Delaunay | 520e299 | 2022-01-11 16:37:21 +0100 | [diff] [blame] | 906 | const int mmc_env_dev = CONFIG_IS_ENABLED(ENV_IS_IN_MMC, (CONFIG_SYS_MMC_ENV_DEV), (-1)); |
| 907 | |
| 908 | if (mmc_env_dev >= 0) |
| 909 | return mmc_env_dev; |
Patrick Delaunay | b6bc853 | 2021-03-01 13:17:56 +0100 | [diff] [blame] | 910 | |
Patrick Delaunay | b6bc853 | 2021-03-01 13:17:56 +0100 | [diff] [blame] | 911 | /* use boot instance to select the correct mmc device identifier */ |
Patrick Delaunay | 5c2f6d7 | 2021-07-06 17:19:45 +0200 | [diff] [blame] | 912 | return mmc_get_boot(); |
Patrick Delaunay | 455b065 | 2020-06-15 11:18:22 +0200 | [diff] [blame] | 913 | } |
Patrick Delaunay | 455b065 | 2020-06-15 11:18:22 +0200 | [diff] [blame] | 914 | |
Patrick Delaunay | de98cbf | 2019-07-02 13:26:07 +0200 | [diff] [blame] | 915 | #if defined(CONFIG_OF_BOARD_SETUP) |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 916 | int ft_board_setup(void *blob, struct bd_info *bd) |
Patrick Delaunay | de98cbf | 2019-07-02 13:26:07 +0200 | [diff] [blame] | 917 | { |
Patrick Delaunay | 67e95d5 | 2023-06-08 17:16:44 +0200 | [diff] [blame] | 918 | fdt_copy_fixed_partitions(blob); |
Patrick Delaunay | de98cbf | 2019-07-02 13:26:07 +0200 | [diff] [blame] | 919 | |
Simon Glass | 703f5bd | 2023-02-05 15:39:57 -0700 | [diff] [blame] | 920 | if (IS_ENABLED(CONFIG_FDT_SIMPLEFB)) |
Patrick Delaunay | 028fddd | 2021-11-15 16:32:23 +0100 | [diff] [blame] | 921 | fdt_simplefb_enable_and_mem_rsv(blob); |
| 922 | |
Patrick Delaunay | de98cbf | 2019-07-02 13:26:07 +0200 | [diff] [blame] | 923 | return 0; |
| 924 | } |
| 925 | #endif |
Patrick Delaunay | c17d725 | 2019-08-02 15:07:20 +0200 | [diff] [blame] | 926 | |
| 927 | static void board_copro_image_process(ulong fw_image, size_t fw_size) |
| 928 | { |
| 929 | int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */ |
| 930 | |
| 931 | if (!rproc_is_initialized()) |
| 932 | if (rproc_init()) { |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 933 | log_err("Remote Processor %d initialization failed\n", |
| 934 | id); |
Patrick Delaunay | c17d725 | 2019-08-02 15:07:20 +0200 | [diff] [blame] | 935 | return; |
| 936 | } |
| 937 | |
| 938 | ret = rproc_load(id, fw_image, fw_size); |
Patrick Delaunay | f7b2a84 | 2020-11-06 19:01:59 +0100 | [diff] [blame] | 939 | log_err("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n", |
| 940 | id, fw_image, fw_size, ret ? " Failed!" : " Success!"); |
Patrick Delaunay | c17d725 | 2019-08-02 15:07:20 +0200 | [diff] [blame] | 941 | |
Fabien Dessenne | ad6cc94 | 2019-10-30 14:38:32 +0100 | [diff] [blame] | 942 | if (!ret) |
Patrick Delaunay | c17d725 | 2019-08-02 15:07:20 +0200 | [diff] [blame] | 943 | rproc_start(id); |
Patrick Delaunay | c17d725 | 2019-08-02 15:07:20 +0200 | [diff] [blame] | 944 | } |
| 945 | |
| 946 | U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process); |
Sughosh Ganu | 73abe8e | 2022-10-21 18:16:00 +0530 | [diff] [blame] | 947 | |
| 948 | #if defined(CONFIG_FWU_MULTI_BANK_UPDATE) |
| 949 | |
| 950 | #include <fwu.h> |
| 951 | |
| 952 | /** |
| 953 | * fwu_plat_get_bootidx() - Get the value of the boot index |
| 954 | * @boot_idx: Boot index value |
| 955 | * |
| 956 | * Get the value of the bank(partition) from which the platform |
| 957 | * has booted. This value is passed to U-Boot from the earlier |
| 958 | * stage bootloader which loads and boots all the relevant |
| 959 | * firmware images |
| 960 | * |
| 961 | */ |
| 962 | void fwu_plat_get_bootidx(uint *boot_idx) |
| 963 | { |
| 964 | *boot_idx = (readl(TAMP_FWU_BOOT_INFO_REG) >> |
| 965 | TAMP_FWU_BOOT_IDX_OFFSET) & TAMP_FWU_BOOT_IDX_MASK; |
| 966 | } |
| 967 | #endif /* CONFIG_FWU_MULTI_BANK_UPDATE */ |