blob: a17c314daeb84f14a8cda942c378124111496044 [file] [log] [blame]
Tom Rini8b0c8a12018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +01004 */
Patrick Delaunayf7b2a842020-11-06 19:01:59 +01005
6#define LOG_CATEGORY LOGC_BOARD
7
Patrice Chotard879cde52019-02-12 16:50:40 +01008#include <common.h>
9#include <adc.h>
Patrick Delaunay500401f2019-06-21 15:26:40 +020010#include <bootm.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020011#include <clk.h>
Patrick Delaunay266bf102019-07-30 19:16:44 +020012#include <config.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020013#include <dm.h>
Sughosh Ganue166b5e2022-10-21 18:15:58 +053014#include <efi_loader.h>
Simon Glassdb229612019-08-01 09:46:42 -060015#include <env.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060016#include <env_internal.h>
Patrick Delaunay028fddd2021-11-15 16:32:23 +010017#include <fdt_simplefb.h>
Simon Glass2dc9c342020-05-10 11:40:01 -060018#include <fdt_support.h>
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +010019#include <g_dnl.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020020#include <generic-phy.h>
Simon Glassf11478f2019-12-28 10:45:07 -070021#include <hang.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010022#include <i2c.h>
Simon Glassa7b51302019-11-14 12:57:46 -070023#include <init.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010024#include <led.h>
Simon Glass0f2af882020-05-10 11:40:05 -060025#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -070026#include <malloc.h>
Patrick Delaunay92dc1022019-02-12 11:44:41 +010027#include <misc.h>
Simon Glass274e0b02020-05-10 11:39:56 -060028#include <net.h>
Patrick Delaunaybff66f92019-08-01 11:29:03 +020029#include <netdev.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020030#include <phy.h>
Patrick Delaunayc17d7252019-08-02 15:07:20 +020031#include <remoteproc.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020032#include <reset.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010033#include <syscon.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010034#include <usb.h>
Patrick Delaunayae0931d02019-07-30 19:16:39 +020035#include <watchdog.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060036#include <asm/global_data.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020037#include <asm/io.h>
Patrick Delaunayf2a7b872019-02-27 17:01:18 +010038#include <asm/gpio.h>
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010039#include <asm/arch/stm32.h>
Patrice Chotarddad97bf2019-05-02 18:36:01 +020040#include <asm/arch/sys_proto.h>
Simon Glass0034d962021-08-07 07:24:01 -060041#include <dm/ofnode.h>
Patrick Delaunayde98cbf2019-07-02 13:26:07 +020042#include <jffs2/load_kernel.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060043#include <linux/bitops.h>
Simon Glassdbd79542020-05-10 11:40:11 -060044#include <linux/delay.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070045#include <linux/err.h>
Patrick Delaunay181298e2020-04-22 14:29:16 +020046#include <linux/iopoll.h>
Simon Glassbdd5f812023-09-14 18:21:46 -060047#include <linux/printk.h>
Patrice Chotard204079b2018-08-10 17:12:14 +020048#include <power/regulator.h>
Patrick Delaunay7f3384d2019-03-29 15:42:24 +010049#include <usb/dwc2_udc.h>
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +010050
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +020051#include "../../st/common/stusb160x.h"
52
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010053/* SYSCFG registers */
54#define SYSCFG_BOOTR 0x00
55#define SYSCFG_PMCSETR 0x04
56#define SYSCFG_IOCTRLSETR 0x18
57#define SYSCFG_ICNR 0x1C
58#define SYSCFG_CMPCR 0x20
59#define SYSCFG_CMPENSETR 0x24
60#define SYSCFG_PMCCLRR 0x44
61
62#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
63#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
64
65#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
66#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
67#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
68#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
69#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
70
71#define SYSCFG_CMPCR_SW_CTRL BIT(1)
72#define SYSCFG_CMPCR_READY BIT(8)
73
74#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
75
76#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
77#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
78
79#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
80
81#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
Christophe Roullier69ac3f52019-05-17 15:08:43 +020082#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII 0
83#define SYSCFG_PMCSETR_ETH_SEL_RGMII BIT(21)
84#define SYSCFG_PMCSETR_ETH_SEL_RMII BIT(23)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +010085
Patrice Chotardcded32f2019-04-30 18:09:38 +020086#define USB_LOW_THRESHOLD_UV 200000
Patrice Chotard879cde52019-02-12 16:50:40 +010087#define USB_WARNING_LOW_THRESHOLD_UV 660000
88#define USB_START_LOW_THRESHOLD_UV 1230000
Patrice Chotardcded32f2019-04-30 18:09:38 +020089#define USB_START_HIGH_THRESHOLD_UV 2150000
Patrice Chotard879cde52019-02-12 16:50:40 +010090
Simon Glassb8196212023-02-05 15:39:42 -070091#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
Sughosh Ganue166b5e2022-10-21 18:15:58 +053092struct efi_fw_image fw_images[1];
93
94struct efi_capsule_update_info update_info = {
Masahisa Kojima5d2438b2023-06-07 14:41:51 +090095 .num_images = ARRAY_SIZE(fw_images),
Sughosh Ganue166b5e2022-10-21 18:15:58 +053096 .images = fw_images,
97};
98
Sughosh Ganue166b5e2022-10-21 18:15:58 +053099#endif /* EFI_HAVE_CAPSULE_SUPPORT */
100
Patrick Delaunayf2f25c32020-05-25 12:19:46 +0200101int board_early_init_f(void)
102{
103 /* nothing to do, only used in SPL */
104 return 0;
105}
106
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100107int checkboard(void)
108{
109 int ret;
110 char *mode;
111 u32 otp;
112 struct udevice *dev;
113 const char *fdt_compat;
114 int fdt_compat_len;
115
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200116 if (IS_ENABLED(CONFIG_TFABOOT)) {
Patrick Delaunay4c6fcbc2024-01-15 15:05:57 +0100117 if (IS_ENABLED(CONFIG_STM32MP15X_STM32IMAGE))
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200118 mode = "trusted - stm32image";
119 else
120 mode = "trusted";
121 } else {
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100122 mode = "basic";
Patrick Delaunayba4b8b02021-07-26 11:21:34 +0200123 }
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100124
Patrick Delaunay4e506b02022-05-19 09:07:29 +0200125 fdt_compat = ofnode_get_property(ofnode_root(), "compatible",
126 &fdt_compat_len);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100127
128 log_info("Board: stm32mp1 in %s mode (%s)\n", mode,
129 fdt_compat && fdt_compat_len ? fdt_compat : "");
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100130
Patrick Delaunay52163d92020-03-24 09:05:00 +0100131 /* display the STMicroelectronics board identification */
Simon Glassd87b83e2023-02-05 15:36:43 -0700132 if (IS_ENABLED(CONFIG_CMD_STBOARD)) {
Patrick Delaunay0885c232020-02-12 19:37:42 +0100133 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700134 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay0885c232020-02-12 19:37:42 +0100135 &dev);
136 if (!ret)
137 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
138 &otp, sizeof(otp));
139 if (ret > 0 && otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100140 log_info("Board: MB%04x Var%d.%d Rev.%c-%02d\n",
141 otp >> 16,
142 (otp >> 12) & 0xF,
143 (otp >> 4) & 0xF,
144 ((otp >> 8) & 0xF) - 1 + 'A',
145 otp & 0xF);
Patrick Delaunay92dc1022019-02-12 11:44:41 +0100146 }
147
148 return 0;
149}
150
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100151static void board_key_check(void)
152{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100153 ofnode node;
154 struct gpio_desc gpio;
155 enum forced_boot_mode boot_mode = BOOT_NORMAL;
156
Patrick Delaunayf6604852020-07-31 16:31:42 +0200157 if (!IS_ENABLED(CONFIG_FASTBOOT) && !IS_ENABLED(CONFIG_CMD_STM32PROG))
158 return;
159
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100160 node = ofnode_path("/config");
161 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100162 log_debug("no /config node?\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100163 return;
164 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200165 if (IS_ENABLED(CONFIG_FASTBOOT)) {
166 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
167 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100168 log_debug("could not find a /config/st,fastboot-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200169 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200170 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200171 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100172 log_notice("Fastboot key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200173 boot_mode = BOOT_FASTBOOT;
174 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100175
Patrick Delaunayf6604852020-07-31 16:31:42 +0200176 dm_gpio_free(NULL, &gpio);
177 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100178 }
Patrick Delaunayf6604852020-07-31 16:31:42 +0200179 if (IS_ENABLED(CONFIG_CMD_STM32PROG)) {
180 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
181 &gpio, GPIOD_IS_IN)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100182 log_debug("could not find a /config/st,stm32prog-gpios\n");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200183 } else {
Patrick Delaunay466d3af2021-07-09 09:53:37 +0200184 udelay(20);
Patrick Delaunayf6604852020-07-31 16:31:42 +0200185 if (dm_gpio_get_value(&gpio)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100186 log_notice("STM32Programmer key pressed, ");
Patrick Delaunayf6604852020-07-31 16:31:42 +0200187 boot_mode = BOOT_STM32PROG;
188 }
189 dm_gpio_free(NULL, &gpio);
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100190 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100191 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100192 if (boot_mode != BOOT_NORMAL) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100193 log_notice("entering download mode...\n");
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100194 clrsetbits_le32(TAMP_BOOT_CONTEXT,
195 TAMP_BOOT_FORCED_MASK,
196 boot_mode);
197 }
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100198}
199
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100200int g_dnl_board_usb_cable_connected(void)
Patrice Chotard204079b2018-08-10 17:12:14 +0200201{
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100202 struct udevice *dwc2_udc_otg;
Patrice Chotard204079b2018-08-10 17:12:14 +0200203 int ret;
204
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200205 if (!IS_ENABLED(CONFIG_USB_GADGET_DWC2_OTG))
206 return -ENODEV;
207
Patrice Chotardaef7c182022-04-22 09:39:18 +0200208 /*
209 * In case of USB boot device is detected, consider USB cable is
210 * connected
211 */
212 if ((get_bootmode() & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_USB)
213 return true;
214
Patrick Delaunayfcb6b0b2020-06-29 10:34:06 +0200215 /* if typec stusb160x is present, means DK1 or DK2 board */
216 ret = stusb160x_cable_connected();
217 if (ret >= 0)
218 return ret;
Patrick Delaunay7f3384d2019-03-29 15:42:24 +0100219
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100220 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700221 DM_DRIVER_GET(dwc2_udc_otg),
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100222 &dwc2_udc_otg);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100223 if (ret) {
224 log_debug("dwc2_udc_otg init failed\n");
225 return ret;
226 }
Patrice Chotard204079b2018-08-10 17:12:14 +0200227
Patrick Delaunay58bc0cd2019-03-29 15:42:23 +0100228 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard879cde52019-02-12 16:50:40 +0100229}
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200230
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200231#ifdef CONFIG_USB_GADGET_DOWNLOAD
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200232#define STM32MP1_G_DNL_DFU_PRODUCT_NUM 0xdf11
233#define STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM 0x0afb
234
235int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name)
236{
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200237 if (IS_ENABLED(CONFIG_DFU_OVER_USB) &&
238 !strcmp(name, "usb_dnl_dfu"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200239 put_unaligned(STM32MP1_G_DNL_DFU_PRODUCT_NUM, &dev->idProduct);
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200240 else if (IS_ENABLED(CONFIG_FASTBOOT) &&
241 !strcmp(name, "usb_dnl_fastboot"))
Patrick Delaunay0aafce62019-09-13 15:24:17 +0200242 put_unaligned(STM32MP1_G_DNL_FASTBOOT_PRODUCT_NUM,
243 &dev->idProduct);
244 else
245 put_unaligned(CONFIG_USB_GADGET_PRODUCT_NUM, &dev->idProduct);
246
247 return 0;
248}
Patrick Delaunaya1d5f202020-07-31 16:31:43 +0200249#endif /* CONFIG_USB_GADGET_DOWNLOAD */
Patrice Chotard879cde52019-02-12 16:50:40 +0100250
251static int get_led(struct udevice **dev, char *led_string)
252{
Simon Glass0034d962021-08-07 07:24:01 -0600253 const char *led_name;
Patrice Chotard879cde52019-02-12 16:50:40 +0100254 int ret;
255
Simon Glass0034d962021-08-07 07:24:01 -0600256 led_name = ofnode_conf_read_str(led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100257 if (!led_name) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100258 log_debug("could not find %s config string\n", led_string);
Patrice Chotard879cde52019-02-12 16:50:40 +0100259 return -ENOENT;
260 }
261 ret = led_get_by_label(led_name, dev);
262 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100263 log_debug("get=%d\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100264 return ret;
265 }
266
267 return 0;
268}
269
270static int setup_led(enum led_state_t cmd)
271{
272 struct udevice *dev;
273 int ret;
274
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200275 if (!CONFIG_IS_ENABLED(LED))
276 return 0;
277
Patrice Chotard879cde52019-02-12 16:50:40 +0100278 ret = get_led(&dev, "u-boot,boot-led");
279 if (ret)
280 return ret;
281
282 ret = led_set_state(dev, cmd);
Patrice Chotard204079b2018-08-10 17:12:14 +0200283 return ret;
284}
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200285
286static void __maybe_unused led_error_blink(u32 nb_blink)
287{
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200288 int ret;
289 struct udevice *led;
290 u32 i;
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200291
292 if (!nb_blink)
293 return;
294
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200295 if (CONFIG_IS_ENABLED(LED)) {
296 ret = get_led(&led, "u-boot,error-led");
297 if (!ret) {
298 /* make u-boot,error-led blinking */
299 /* if U32_MAX and 125ms interval, for 17.02 years */
300 for (i = 0; i < 2 * nb_blink; i++) {
301 led_set_state(led, LEDST_TOGGLE);
302 mdelay(125);
Stefan Roese80877fa2022-09-02 14:10:46 +0200303 schedule();
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200304 }
305 led_set_state(led, LEDST_ON);
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200306 }
307 }
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200308
309 /* infinite: the boot process must be stopped */
310 if (nb_blink == U32_MAX)
311 hang();
312}
Patrice Chotard204079b2018-08-10 17:12:14 +0200313
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200314static int adc_measurement(ofnode node, int adc_count, int *min_uV, int *max_uV)
Patrice Chotard879cde52019-02-12 16:50:40 +0100315{
316 struct ofnode_phandle_args adc_args;
317 struct udevice *adc;
Patrice Chotard879cde52019-02-12 16:50:40 +0100318 unsigned int raw;
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200319 int ret, uV;
320 int i;
Patrice Chotard879cde52019-02-12 16:50:40 +0100321
322 for (i = 0; i < adc_count; i++) {
323 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
324 "#io-channel-cells", 0, i,
325 &adc_args)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100326 log_debug("can't find /config/st,adc_usb_pd\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100327 return 0;
328 }
329
330 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
331 &adc);
332
333 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100334 log_err("Can't get adc device(%d)\n", ret);
Patrice Chotard879cde52019-02-12 16:50:40 +0100335 return ret;
336 }
337
338 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
339 &raw);
340 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100341 log_err("single shot failed for %s[%d]!\n",
342 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100343 return ret;
344 }
345 /* Convert to uV */
346 if (!adc_raw_to_uV(adc, raw, &uV)) {
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200347 if (uV > *max_uV)
348 *max_uV = uV;
349 if (uV < *min_uV)
350 *min_uV = uV;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100351 log_debug("%s[%02d] = %u, %d uV\n",
352 adc->name, adc_args.args[0], raw, uV);
Patrice Chotard879cde52019-02-12 16:50:40 +0100353 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100354 log_err("Can't get uV value for %s[%d]\n",
355 adc->name, adc_args.args[0]);
Patrice Chotard879cde52019-02-12 16:50:40 +0100356 }
357 }
358
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200359 return 0;
360}
361
362static int board_check_usb_power(void)
363{
364 ofnode node;
365 int max_uV = 0;
366 int min_uV = USB_START_HIGH_THRESHOLD_UV;
367 int adc_count, ret;
368 u32 nb_blink;
369 u8 i;
370
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200371 if (!IS_ENABLED(CONFIG_ADC))
372 return -ENODEV;
373
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200374 node = ofnode_path("/config");
375 if (!ofnode_valid(node)) {
376 log_debug("no /config node?\n");
377 return -ENOENT;
378 }
379
Patrice Chotard879cde52019-02-12 16:50:40 +0100380 /*
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200381 * Retrieve the ADC channels devices and get measurement
382 * for each of them
Patrice Chotard879cde52019-02-12 16:50:40 +0100383 */
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200384 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
385 "#io-channel-cells", 0);
386 if (adc_count < 0) {
387 if (adc_count == -ENOENT)
388 return 0;
Patrice Chotard879cde52019-02-12 16:50:40 +0100389
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200390 log_err("Can't find adc channel (%d)\n", adc_count);
391
392 return adc_count;
393 }
Patrice Chotardcded32f2019-04-30 18:09:38 +0200394
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200395 /* perform maximum of 2 ADC measurements to detect power supply current */
396 for (i = 0; i < 2; i++) {
Patrick Delaunayf1c46652021-04-06 09:57:54 +0200397 ret = adc_measurement(node, adc_count, &min_uV, &max_uV);
Patrice Chotard7dfa7972020-10-16 09:28:59 +0200398 if (ret)
399 return ret;
400
401 /*
402 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
403 * board is plugged on an USB-C 3A power supply and boot process can
404 * continue.
405 */
406 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
407 max_uV <= USB_START_HIGH_THRESHOLD_UV &&
408 min_uV <= USB_LOW_THRESHOLD_UV)
409 return 0;
410
411 if (i == 0) {
412 log_err("Previous ADC measurements was not the one expected, retry in 20ms\n");
413 mdelay(20); /* equal to max tPDDebounce duration (min 10ms - max 20ms) */
414 }
415 }
416
417 log_notice("****************************************************\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200418 /*
419 * If highest and lowest value are either both below
420 * USB_LOW_THRESHOLD_UV or both above USB_LOW_THRESHOLD_UV, that
421 * means USB TYPE-C is in unattached mode, this is an issue, make
422 * u-boot,error-led blinking and stop boot process.
423 */
424 if ((max_uV > USB_LOW_THRESHOLD_UV &&
425 min_uV > USB_LOW_THRESHOLD_UV) ||
426 (max_uV <= USB_LOW_THRESHOLD_UV &&
427 min_uV <= USB_LOW_THRESHOLD_UV)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100428 log_notice("* ERROR USB TYPE-C connection in unattached mode *\n");
429 log_notice("* Check that USB TYPE-C cable is correctly plugged *\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200430 /* with 125ms interval, led will blink for 17.02 years ....*/
431 nb_blink = U32_MAX;
432 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100433
Patrice Chotardcded32f2019-04-30 18:09:38 +0200434 if (max_uV > USB_LOW_THRESHOLD_UV &&
435 max_uV <= USB_WARNING_LOW_THRESHOLD_UV &&
436 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100437 log_notice("* WARNING 500mA power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100438 nb_blink = 2;
Patrice Chotardcded32f2019-04-30 18:09:38 +0200439 }
440
441 if (max_uV > USB_WARNING_LOW_THRESHOLD_UV &&
442 max_uV <= USB_START_LOW_THRESHOLD_UV &&
443 min_uV <= USB_LOW_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100444 log_notice("* WARNING 1.5A power supply detected *\n");
Patrice Chotard879cde52019-02-12 16:50:40 +0100445 nb_blink = 3;
446 }
447
Patrice Chotardcded32f2019-04-30 18:09:38 +0200448 /*
449 * If highest value is above 2.15 Volts that means that the USB TypeC
450 * supplies more than 3 Amp, this is not compliant with TypeC specification
451 */
452 if (max_uV > USB_START_HIGH_THRESHOLD_UV) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100453 log_notice("* USB TYPE-C charger not compliant with *\n");
454 log_notice("* specification *\n");
455 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200456 /* with 125ms interval, led will blink for 17.02 years ....*/
457 nb_blink = U32_MAX;
458 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100459 log_notice("* Current too low, use a 3A power supply! *\n");
460 log_notice("****************************************************\n\n");
Patrice Chotardcded32f2019-04-30 18:09:38 +0200461 }
Patrice Chotard879cde52019-02-12 16:50:40 +0100462
Patrick Delaunayae0931d02019-07-30 19:16:39 +0200463 led_error_blink(nb_blink);
Patrice Chotard879cde52019-02-12 16:50:40 +0100464
465 return 0;
466}
467
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100468static void sysconf_init(void)
469{
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100470 u8 *syscfg;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100471 struct udevice *pwr_dev;
472 struct udevice *pwr_reg;
473 struct udevice *dev;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100474 u32 otp = 0;
Patrick Delaunay181298e2020-04-22 14:29:16 +0200475 int ret;
476 u32 bootr, val;
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100477
478 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
479
480 /* interconnect update : select master using the port 1 */
481 /* LTDC = AXI_M9 */
482 /* GPU = AXI_M8 */
483 /* today information is hardcoded in U-Boot */
484 writel(BIT(9), syscfg + SYSCFG_ICNR);
485
486 /* disable Pull-Down for boot pin connected to VDD */
487 bootr = readl(syscfg + SYSCFG_BOOTR);
488 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
489 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
490 writel(bootr, syscfg + SYSCFG_BOOTR);
491
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100492 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
493 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
494 * The customer will have to disable this for low frequencies
495 * or if AFMUX is selected but the function not used, typically for
496 * TRACE. Otherwise, impact on power consumption.
497 *
498 * WARNING:
499 * enabling High Speed mode while VDD>2.7V
500 * with the OTP product_below_2v5 (OTP 18, BIT 13)
501 * erroneously set to 1 can damage the IC!
502 * => U-Boot set the register only if VDD < 2.7V (in DT)
503 * but this value need to be consistent with board design
504 */
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200505 ret = uclass_get_device_by_driver(UCLASS_PMIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700506 DM_DRIVER_GET(stm32mp_pwr_pmic),
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200507 &pwr_dev);
Patrick Delaunay7c104822022-06-20 12:36:10 +0200508 if (!ret) {
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100509 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700510 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100511 &dev);
512 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100513 log_err("Can't find stm32mp_bsec driver\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100514 return;
515 }
516
517 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
Patrick Delaunayceb82e32019-08-02 13:08:06 +0200518 if (ret > 0)
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100519 otp = otp & BIT(13);
520
Patrick Delaunay6b2baa02019-07-30 19:16:42 +0200521 /* get VDD = vdd-supply */
522 ret = device_get_supply_regulator(pwr_dev, "vdd-supply",
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100523 &pwr_reg);
524
525 /* check if VDD is Low Voltage */
526 if (!ret) {
527 if (regulator_get_value(pwr_reg) < 2700000) {
528 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
529 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
530 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
531 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
532 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
533 syscfg + SYSCFG_IOCTRLSETR);
534
535 if (!otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100536 log_err("product_below_2v5=0: HSLVEN protected by HW\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100537 } else {
538 if (otp)
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100539 log_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100540 }
541 } else {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100542 log_debug("VDD unknown");
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100543 }
544 }
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100545
546 /* activate automatic I/O compensation
547 * warning: need to ensure CSI enabled and ready in clock driver
548 */
549 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
550
Patrick Delaunay181298e2020-04-22 14:29:16 +0200551 /* poll until ready (1s timeout) */
552 ret = readl_poll_timeout(syscfg + SYSCFG_CMPCR, val,
553 val & SYSCFG_CMPCR_READY,
554 1000000);
555 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100556 log_err("SYSCFG: I/O compensation failed, timeout.\n");
Patrick Delaunay181298e2020-04-22 14:29:16 +0200557 led_error_blink(10);
558 }
559
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100560 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100561}
562
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200563static int board_stm32mp15x_dk2_init(void)
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200564{
565 ofnode node;
566 struct gpio_desc hdmi, audio;
567 int ret = 0;
568
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200569 /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200570 node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
571 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100572 log_debug("no hdmi-transmitter@39 ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200573 return -ENOENT;
574 }
575
576 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
577 &hdmi, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100578 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200579 return -ENOENT;
580 }
581
582 node = ofnode_path("/soc/i2c@40012000/cs42l51@4a");
583 if (!ofnode_valid(node)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100584 log_debug("no cs42l51@4a ?\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200585 return -ENOENT;
586 }
587
588 if (gpio_request_by_name_nodev(node, "reset-gpios", 0,
589 &audio, GPIOD_IS_OUT)) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100590 log_debug("could not find reset-gpios\n");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200591 return -ENOENT;
592 }
593
594 /* before power up, insure that HDMI and AUDIO IC is under reset */
595 ret = dm_gpio_set_value(&hdmi, 1);
596 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100597 log_err("can't set_value for hdmi_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200598 goto error;
599 }
600 ret = dm_gpio_set_value(&audio, 1);
601 if (ret) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100602 log_err("can't set_value for audio_nrst gpio");
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200603 goto error;
604 }
605
606 /* power-up audio IC */
607 regulator_autoset_by_name("v1v8_audio", NULL);
608
609 /* power-up HDMI IC */
610 regulator_autoset_by_name("v1v2_hdmi", NULL);
611 regulator_autoset_by_name("v3v3_hdmi", NULL);
612
613error:
614 return ret;
615}
616
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200617static bool board_is_stm32mp15x_dk2(void)
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200618{
Patrick Delaunay4c6fcbc2024-01-15 15:05:57 +0100619 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) &&
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200620 of_machine_is_compatible("st,stm32mp157c-dk2"))
621 return true;
622
623 return false;
624}
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200625
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200626static bool board_is_stm32mp15x_ev1(void)
Patrick Delaunay486ae962020-04-22 14:29:13 +0200627{
Patrick Delaunay4c6fcbc2024-01-15 15:05:57 +0100628 if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15X) &&
Patrick Delaunay486ae962020-04-22 14:29:13 +0200629 (of_machine_is_compatible("st,stm32mp157a-ev1") ||
630 of_machine_is_compatible("st,stm32mp157c-ev1") ||
631 of_machine_is_compatible("st,stm32mp157d-ev1") ||
632 of_machine_is_compatible("st,stm32mp157f-ev1")))
633 return true;
634
635 return false;
636}
637
638/* touchscreen driver: only used for pincontrol configuration */
639static const struct udevice_id goodix_ids[] = {
640 { .compatible = "goodix,gt9147", },
641 { }
642};
643
644U_BOOT_DRIVER(goodix) = {
645 .name = "goodix",
646 .id = UCLASS_NOP,
647 .of_match = goodix_ids,
648};
649
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200650static void board_stm32mp15x_ev1_init(void)
Patrick Delaunay486ae962020-04-22 14:29:13 +0200651{
652 struct udevice *dev;
653
654 /* configure IRQ line on EV1 for touchscreen before LCD reset */
Simon Glass65130cd2020-12-28 20:34:56 -0700655 uclass_get_device_by_driver(UCLASS_NOP, DM_DRIVER_GET(goodix), &dev);
Patrick Delaunay486ae962020-04-22 14:29:13 +0200656}
657
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100658/* board dependent setup after realloc */
659int board_init(void)
660{
Patrick Delaunay008d3c32019-02-27 17:01:20 +0100661 board_key_check();
662
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200663 if (board_is_stm32mp15x_ev1())
664 board_stm32mp15x_ev1_init();
Patrick Delaunay486ae962020-04-22 14:29:13 +0200665
Patrick Delaunay37c4b552022-05-20 18:24:49 +0200666 if (board_is_stm32mp15x_dk2())
667 board_stm32mp15x_dk2_init();
Patrick Delaunay9f76fdf2019-07-30 19:16:38 +0200668
Patrick Delaunay7c104822022-06-20 12:36:10 +0200669 regulators_enable_boot_on(_DEBUG);
Patrick Delaunay6519e442019-07-05 17:20:09 +0200670
Patrick Delaunay72a57622021-10-11 09:52:50 +0200671 /*
672 * sysconf initialisation done only when U-Boot is running in secure
673 * done in TF-A for TFABOOT.
674 */
675 if (IS_ENABLED(CONFIG_ARMV7_NONSEC))
Patrick Delaunay4b2bfd62020-07-31 16:31:45 +0200676 sysconf_init();
Patrick Delaunay4ace1d12019-02-27 17:01:24 +0100677
Patrick Delaunay8ae05cf2020-04-22 14:29:12 +0200678 setup_led(LEDST_ON);
679
Simon Glassb8196212023-02-05 15:39:42 -0700680#if IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)
Sughosh Ganue166b5e2022-10-21 18:15:58 +0530681 efi_guid_t image_type_guid = STM32MP_FIP_IMAGE_GUID;
682
683 guidcpy(&fw_images[0].image_type_id, &image_type_guid);
684 fw_images[0].fw_name = u"STM32MP-FIP";
685 fw_images[0].image_index = 1;
686#endif
Patrick Delaunay8eb3b1e2018-03-12 10:46:18 +0100687 return 0;
688}
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100689
690int board_late_init(void)
691{
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100692 const void *fdt_compat;
693 int fdt_compat_len;
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200694 int ret;
695 u32 otp;
696 struct udevice *dev;
697 char buf[10];
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200698 char dtb_name[256];
699 int buf_len;
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100700
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200701 if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) {
Patrick Delaunay4e506b02022-05-19 09:07:29 +0200702 fdt_compat = ofnode_get_property(ofnode_root(), "compatible",
703 &fdt_compat_len);
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200704 if (fdt_compat && fdt_compat_len) {
705 if (strncmp(fdt_compat, "st,", 3) != 0) {
706 env_set("board_name", fdt_compat);
707 } else {
708 env_set("board_name", fdt_compat + 3);
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200709
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200710 buf_len = sizeof(dtb_name);
711 strncpy(dtb_name, fdt_compat + 3, buf_len);
712 buf_len -= strlen(fdt_compat + 3);
713 strncat(dtb_name, ".dtb", buf_len);
714 env_set("fdtfile", dtb_name);
715 }
Patrick Delaunay4533a2c2020-04-22 14:29:14 +0200716 }
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200717 ret = uclass_get_device_by_driver(UCLASS_MISC,
Simon Glass65130cd2020-12-28 20:34:56 -0700718 DM_DRIVER_GET(stm32mp_bsec),
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200719 &dev);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200720
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200721 if (!ret)
722 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
723 &otp, sizeof(otp));
724 if (ret > 0 && otp) {
725 snprintf(buf, sizeof(buf), "0x%04x", otp >> 16);
726 env_set("board_id", buf);
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200727
Patrick Delaunayf118e4a2020-07-31 16:31:48 +0200728 snprintf(buf, sizeof(buf), "0x%04x",
729 ((otp >> 8) & 0xF) - 1 + 0xA);
730 env_set("board_rev", buf);
731 }
Patrick Delaunaye8566ec2019-07-30 19:16:37 +0200732 }
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100733
Patrice Chotard879cde52019-02-12 16:50:40 +0100734 /* for DK1/DK2 boards */
735 board_check_usb_power();
736
Patrick Delaunayd70e3f82019-02-27 17:01:11 +0100737 return 0;
738}
Patrice Chotard879cde52019-02-12 16:50:40 +0100739
740void board_quiesce_devices(void)
741{
742 setup_led(LEDST_OFF);
743}
Patrice Chotard41443cf2019-05-02 18:07:14 +0200744
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200745/* eth init function : weak called in eqos driver */
746int board_interface_eth_init(struct udevice *dev,
747 phy_interface_t interface_type)
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200748{
749 u8 *syscfg;
750 u32 value;
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200751 bool eth_clk_sel_reg = false;
752 bool eth_ref_clk_sel_reg = false;
753
754 /* Gigabit Ethernet 125MHz clock selection. */
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200755 eth_clk_sel_reg = dev_read_bool(dev, "st,eth-clk-sel");
Patrick Delaunaybff66f92019-08-01 11:29:03 +0200756
757 /* Ethernet 50Mhz RMII clock selection */
758 eth_ref_clk_sel_reg =
Patrick Delaunay00cf4a82021-06-04 18:25:55 +0200759 dev_read_bool(dev, "st,eth-ref-clk-sel");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200760
761 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
762
763 if (!syscfg)
764 return -ENODEV;
765
766 switch (interface_type) {
767 case PHY_INTERFACE_MODE_MII:
768 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
769 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100770 log_debug("PHY_INTERFACE_MODE_MII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200771 break;
772 case PHY_INTERFACE_MODE_GMII:
773 if (eth_clk_sel_reg)
774 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII |
775 SYSCFG_PMCSETR_ETH_CLK_SEL;
776 else
777 value = SYSCFG_PMCSETR_ETH_SEL_GMII_MII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100778 log_debug("PHY_INTERFACE_MODE_GMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200779 break;
780 case PHY_INTERFACE_MODE_RMII:
781 if (eth_ref_clk_sel_reg)
782 value = SYSCFG_PMCSETR_ETH_SEL_RMII |
783 SYSCFG_PMCSETR_ETH_REF_CLK_SEL;
784 else
785 value = SYSCFG_PMCSETR_ETH_SEL_RMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100786 log_debug("PHY_INTERFACE_MODE_RMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200787 break;
788 case PHY_INTERFACE_MODE_RGMII:
789 case PHY_INTERFACE_MODE_RGMII_ID:
790 case PHY_INTERFACE_MODE_RGMII_RXID:
791 case PHY_INTERFACE_MODE_RGMII_TXID:
792 if (eth_clk_sel_reg)
793 value = SYSCFG_PMCSETR_ETH_SEL_RGMII |
794 SYSCFG_PMCSETR_ETH_CLK_SEL;
795 else
796 value = SYSCFG_PMCSETR_ETH_SEL_RGMII;
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100797 log_debug("PHY_INTERFACE_MODE_RGMII\n");
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200798 break;
799 default:
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100800 log_debug("Do not manage %d interface\n",
801 interface_type);
Christophe Roullier69ac3f52019-05-17 15:08:43 +0200802 /* Do not manage others interfaces */
803 return -EINVAL;
804 }
805
806 /* clear and set ETH configuration bits */
807 writel(SYSCFG_PMCSETR_ETH_SEL_MASK | SYSCFG_PMCSETR_ETH_SELMII |
808 SYSCFG_PMCSETR_ETH_REF_CLK_SEL | SYSCFG_PMCSETR_ETH_CLK_SEL,
809 syscfg + SYSCFG_PMCCLRR);
810 writel(value, syscfg + SYSCFG_PMCSETR);
811
812 return 0;
813}
814
Patrice Chotard34320372019-05-02 18:28:05 +0200815enum env_location env_get_location(enum env_operation op, int prio)
816{
817 u32 bootmode = get_bootmode();
818
819 if (prio)
820 return ENVL_UNKNOWN;
821
822 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
Patrick Delaunay455b0652020-06-15 11:18:22 +0200823 case BOOT_FLASH_SD:
824 case BOOT_FLASH_EMMC:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200825 if (CONFIG_IS_ENABLED(ENV_IS_IN_MMC))
826 return ENVL_MMC;
827 else if (CONFIG_IS_ENABLED(ENV_IS_IN_EXT4))
828 return ENVL_EXT4;
829 else
830 return ENVL_NOWHERE;
831
Patrice Chotard34320372019-05-02 18:28:05 +0200832 case BOOT_FLASH_NAND:
Patrick Delaunayb5a7ca22020-03-18 09:22:52 +0100833 case BOOT_FLASH_SPINAND:
Simon Glassbd3ebf62023-02-05 15:39:48 -0700834 if (IS_ENABLED(CONFIG_ENV_IS_IN_UBI))
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200835 return ENVL_UBI;
836 else
837 return ENVL_NOWHERE;
838
Patrice Chotard2c461ec2019-05-09 14:25:36 +0200839 case BOOT_FLASH_NOR:
Patrick Delaunay821a9ba2020-07-31 16:31:49 +0200840 if (CONFIG_IS_ENABLED(ENV_IS_IN_SPI_FLASH))
841 return ENVL_SPI_FLASH;
842 else
843 return ENVL_NOWHERE;
844
Patrice Chotard34320372019-05-02 18:28:05 +0200845 default:
846 return ENVL_NOWHERE;
847 }
848}
849
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200850const char *env_ext4_get_intf(void)
851{
852 u32 bootmode = get_bootmode();
853
854 switch (bootmode & TAMP_BOOT_DEVICE_MASK) {
855 case BOOT_FLASH_SD:
856 case BOOT_FLASH_EMMC:
857 return "mmc";
858 default:
859 return "";
860 }
861}
862
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200863int mmc_get_boot(void)
864{
865 struct udevice *dev;
866 u32 boot_mode = get_bootmode();
867 unsigned int instance = (boot_mode & TAMP_BOOT_INSTANCE_MASK) - 1;
868 char cmd[20];
869 const u32 sdmmc_addr[] = {
870 STM32_SDMMC1_BASE,
871 STM32_SDMMC2_BASE,
872 STM32_SDMMC3_BASE
873 };
874
Rasmus Villemoes6d83f3c2023-03-24 08:55:19 +0100875 if (instance >= ARRAY_SIZE(sdmmc_addr))
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200876 return 0;
877
878 /* search associated sdmmc node in devicetree */
879 snprintf(cmd, sizeof(cmd), "mmc@%x", sdmmc_addr[instance]);
880 if (uclass_get_device_by_name(UCLASS_MMC, cmd, &dev)) {
881 log_err("mmc%d = %s not found in device tree!\n", instance, cmd);
882 return 0;
883 }
884
885 return dev_seq(dev);
886};
887
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200888const char *env_ext4_get_dev_part(void)
889{
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000890 static char *const env_dev_part =
891#ifdef CONFIG_ENV_EXT4_DEVICE_AND_PART
892 CONFIG_ENV_EXT4_DEVICE_AND_PART;
893#else
894 "";
895#endif
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200896 static char *const dev_part[] = {"0:auto", "1:auto", "2:auto"};
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000897
898 if (strlen(env_dev_part) > 0)
899 return env_dev_part;
900
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200901 return dev_part[mmc_get_boot()];
Patrice Chotarddad97bf2019-05-02 18:36:01 +0200902}
Manuel Reisbe9d3e22020-11-25 10:16:20 +0000903
Patrick Delaunay455b0652020-06-15 11:18:22 +0200904int mmc_get_env_dev(void)
905{
Patrick Delaunay520e2992022-01-11 16:37:21 +0100906 const int mmc_env_dev = CONFIG_IS_ENABLED(ENV_IS_IN_MMC, (CONFIG_SYS_MMC_ENV_DEV), (-1));
907
908 if (mmc_env_dev >= 0)
909 return mmc_env_dev;
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100910
Patrick Delaunayb6bc8532021-03-01 13:17:56 +0100911 /* use boot instance to select the correct mmc device identifier */
Patrick Delaunay5c2f6d72021-07-06 17:19:45 +0200912 return mmc_get_boot();
Patrick Delaunay455b0652020-06-15 11:18:22 +0200913}
Patrick Delaunay455b0652020-06-15 11:18:22 +0200914
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200915#if defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900916int ft_board_setup(void *blob, struct bd_info *bd)
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200917{
Patrick Delaunay67e95d52023-06-08 17:16:44 +0200918 fdt_copy_fixed_partitions(blob);
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200919
Simon Glass703f5bd2023-02-05 15:39:57 -0700920 if (IS_ENABLED(CONFIG_FDT_SIMPLEFB))
Patrick Delaunay028fddd2021-11-15 16:32:23 +0100921 fdt_simplefb_enable_and_mem_rsv(blob);
922
Patrick Delaunayde98cbf2019-07-02 13:26:07 +0200923 return 0;
924}
925#endif
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200926
927static void board_copro_image_process(ulong fw_image, size_t fw_size)
928{
929 int ret, id = 0; /* Copro id fixed to 0 as only one coproc on mp1 */
930
931 if (!rproc_is_initialized())
932 if (rproc_init()) {
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100933 log_err("Remote Processor %d initialization failed\n",
934 id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200935 return;
936 }
937
938 ret = rproc_load(id, fw_image, fw_size);
Patrick Delaunayf7b2a842020-11-06 19:01:59 +0100939 log_err("Load Remote Processor %d with data@addr=0x%08lx %u bytes:%s\n",
940 id, fw_image, fw_size, ret ? " Failed!" : " Success!");
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200941
Fabien Dessennead6cc942019-10-30 14:38:32 +0100942 if (!ret)
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200943 rproc_start(id);
Patrick Delaunayc17d7252019-08-02 15:07:20 +0200944}
945
946U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_COPRO, board_copro_image_process);
Sughosh Ganu73abe8e2022-10-21 18:16:00 +0530947
948#if defined(CONFIG_FWU_MULTI_BANK_UPDATE)
949
950#include <fwu.h>
951
952/**
953 * fwu_plat_get_bootidx() - Get the value of the boot index
954 * @boot_idx: Boot index value
955 *
956 * Get the value of the bank(partition) from which the platform
957 * has booted. This value is passed to U-Boot from the earlier
958 * stage bootloader which loads and boots all the relevant
959 * firmware images
960 *
961 */
962void fwu_plat_get_bootidx(uint *boot_idx)
963{
964 *boot_idx = (readl(TAMP_FWU_BOOT_INFO_REG) >>
965 TAMP_FWU_BOOT_IDX_OFFSET) & TAMP_FWU_BOOT_IDX_MASK;
966}
967#endif /* CONFIG_FWU_MULTI_BANK_UPDATE */